<p>Peter Lemenkov has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28976">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">Use macros instead of magic numbers<br><br>Coreboot still uses magic numbers instead of macros in some Lenovo<br>mainboards. Let's use macros instead.<br><br>Also removed some board names from comments since these functions<br>sometimes are very similar, so no need to add extra difference between<br>them.<br><br>Change-Id: I6468e3357f8eed434f8527a852e134380f486d9a<br>Signed-off-by: Peter Lemenkov <lemenkov@gmail.com><br>---<br>M src/mainboard/lenovo/l520/romstage.c<br>M src/mainboard/lenovo/s230u/romstage.c<br>M src/mainboard/lenovo/t520/romstage.c<br>M src/mainboard/lenovo/t530/romstage.c<br>M src/mainboard/lenovo/x1_carbon_gen1/romstage.c<br>M src/mainboard/lenovo/x201/romstage.c<br>M src/mainboard/lenovo/x220/romstage.c<br>M src/mainboard/lenovo/x230/romstage.c<br>8 files changed, 26 insertions(+), 21 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/28976/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/lenovo/l520/romstage.c b/src/mainboard/lenovo/l520/romstage.c</span><br><span>index 0f6ffed..1122e1c 100644</span><br><span>--- a/src/mainboard/lenovo/l520/romstage.c</span><br><span>+++ b/src/mainboard/lenovo/l520/romstage.c</span><br><span>@@ -25,16 +25,21 @@</span><br><span> </span><br><span> void pch_enable_lpc(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x3c0c);</span><br><span style="color: hsl(0, 100%, 40%);">- pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x84, 0x007c1611);</span><br><span style="color: hsl(0, 100%, 40%);">- pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x88, 0x00040069);</span><br><span style="color: hsl(0, 100%, 40%);">- pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x8c, 0x000c0701);</span><br><span style="color: hsl(0, 100%, 40%);">- pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x90, 0x00000000);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* EC Decode Range Port60/64, Port62/66 */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Enable EC, PS/2 Keyboard/Mouse, FDD, LPT */</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config16(PCH_LPC_DEV, LPC_EN,</span><br><span style="color: hsl(120, 100%, 40%);">+ CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN |</span><br><span style="color: hsl(120, 100%, 40%);">+ FDD_LPC_EN | LPT_LPC_EN);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0x7c1611);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, 0x040069);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config32(PCH_LPC_DEV, LPC_GEN3_DEC, 0x0c0701);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config32(PCH_LPC_DEV, LPC_GEN4_DEC, 0x000000);</span><br><span> }</span><br><span> </span><br><span> void mainboard_rcba_config(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- RCBA32(0x3414) = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ RCBA32(BUC) = 0;</span><br><span> }</span><br><span> const struct southbridge_usb_port mainboard_usb_ports[] = {</span><br><span> { 1, 0, -1 },</span><br><span>diff --git a/src/mainboard/lenovo/s230u/romstage.c b/src/mainboard/lenovo/s230u/romstage.c</span><br><span>index 7e002d4..8447fef 100644</span><br><span>--- a/src/mainboard/lenovo/s230u/romstage.c</span><br><span>+++ b/src/mainboard/lenovo/s230u/romstage.c</span><br><span>@@ -32,18 +32,18 @@</span><br><span> </span><br><span> void pch_enable_lpc(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x82, 0x0c00);</span><br><span style="color: hsl(0, 100%, 40%);">- pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x84, 0x00000000);</span><br><span style="color: hsl(0, 100%, 40%);">- pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x88, 0x000c0701);</span><br><span style="color: hsl(0, 100%, 40%);">- pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x8c, 0x000c0069);</span><br><span style="color: hsl(0, 100%, 40%);">- pci_write_config32(PCI_DEV(0, 0x1f, 0), 0x90, 0x000c06a1);</span><br><span style="color: hsl(0, 100%, 40%);">- pci_write_config32(PCI_DEV(0, 0x1f, 0), ETR3, 0x10000);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config16(PCH_LPC_DEV, LPC_EN, MC_LPC_EN | KBC_LPC_EN);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config32(PCH_LPC_DEV, LPC_GEN1_DEC, 0x00000);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config32(PCH_LPC_DEV, LPC_GEN2_DEC, 0xc0701);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config32(PCH_LPC_DEV, LPC_GEN3_DEC, 0xc0069);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config32(PCH_LPC_DEV, LPC_GEN4_DEC, 0xc06a1);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config32(PCH_LPC_DEV, ETR3, 0x10000);</span><br><span> </span><br><span> /* Memory map KB9012 EC registers */</span><br><span> pci_write_config32(</span><br><span style="color: hsl(0, 100%, 40%);">- PCI_DEV(0, 0x1f, 0), 0x98,</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_LPC_DEV, 0x98,</span><br><span> CONFIG_EC_BASE_ADDRESS | 1);</span><br><span style="color: hsl(0, 100%, 40%);">- pci_write_config16(PCI_DEV(0, 0x1f, 0), 0xd8, 0xffc0);</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config16(PCH_LPC_DEV, 0xd8, 0xffc0);</span><br><span> </span><br><span> /* Enable external USB port power. */</span><br><span> if (IS_ENABLED(CONFIG_USBDEBUG))</span><br><span>@@ -53,7 +53,7 @@</span><br><span> void mainboard_rcba_config(void)</span><br><span> {</span><br><span> /* Disable devices. */</span><br><span style="color: hsl(0, 100%, 40%);">- RCBA32(0x3414) = 0x00000020;</span><br><span style="color: hsl(120, 100%, 40%);">+ RCBA32(BUC) = 0x00000020;</span><br><span> }</span><br><span> const struct southbridge_usb_port mainboard_usb_ports[] = {</span><br><span> { 1, 1, 0 },</span><br><span>diff --git a/src/mainboard/lenovo/t520/romstage.c b/src/mainboard/lenovo/t520/romstage.c</span><br><span>index 4fcd651..8769f01 100644</span><br><span>--- a/src/mainboard/lenovo/t520/romstage.c</span><br><span>+++ b/src/mainboard/lenovo/t520/romstage.c</span><br><span>@@ -63,7 +63,7 @@</span><br><span> </span><br><span> void pch_enable_lpc(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- /* T520 EC Decode Range Port60/64, Port62/66 */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* EC Decode Range Port60/64, Port62/66 */</span><br><span> /* Enable EC, PS/2 Keyboard/Mouse */</span><br><span> pci_write_config16(PCH_LPC_DEV, LPC_EN,</span><br><span> CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN);</span><br><span>diff --git a/src/mainboard/lenovo/t530/romstage.c b/src/mainboard/lenovo/t530/romstage.c</span><br><span>index 88e07c1..ac8c514 100644</span><br><span>--- a/src/mainboard/lenovo/t530/romstage.c</span><br><span>+++ b/src/mainboard/lenovo/t530/romstage.c</span><br><span>@@ -55,7 +55,7 @@</span><br><span> </span><br><span> void pch_enable_lpc(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- /* X230 EC Decode Range Port60/64, Port62/66 */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* EC Decode Range Port60/64, Port62/66 */</span><br><span> /* Enable EC, PS/2 Keyboard/Mouse */</span><br><span> pci_write_config16(PCH_LPC_DEV, LPC_EN,</span><br><span> CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN);</span><br><span>diff --git a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c</span><br><span>index a34d1db..bd1c6a3 100644</span><br><span>--- a/src/mainboard/lenovo/x1_carbon_gen1/romstage.c</span><br><span>+++ b/src/mainboard/lenovo/x1_carbon_gen1/romstage.c</span><br><span>@@ -36,7 +36,7 @@</span><br><span> </span><br><span> void pch_enable_lpc(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- /* X230 EC Decode Range Port60/64, Port62/66 */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* EC Decode Range Port60/64, Port62/66 */</span><br><span> /* Enable EC, PS/2 Keyboard/Mouse */</span><br><span> pci_write_config16(PCH_LPC_DEV, LPC_EN,</span><br><span> CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN);</span><br><span>diff --git a/src/mainboard/lenovo/x201/romstage.c b/src/mainboard/lenovo/x201/romstage.c</span><br><span>index 8752949..b6efbd7 100644</span><br><span>--- a/src/mainboard/lenovo/x201/romstage.c</span><br><span>+++ b/src/mainboard/lenovo/x201/romstage.c</span><br><span>@@ -45,7 +45,7 @@</span><br><span> </span><br><span> static void pch_enable_lpc(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- /* X201 EC Decode Range Port60/64, Port62/66 */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* EC Decode Range Port60/64, Port62/66 */</span><br><span> /* Enable EC, PS/2 Keyboard/Mouse */</span><br><span> pci_write_config16(PCH_LPC_DEV, LPC_EN,</span><br><span> CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN |</span><br><span>diff --git a/src/mainboard/lenovo/x220/romstage.c b/src/mainboard/lenovo/x220/romstage.c</span><br><span>index 96e0284..fb25f79 100644</span><br><span>--- a/src/mainboard/lenovo/x220/romstage.c</span><br><span>+++ b/src/mainboard/lenovo/x220/romstage.c</span><br><span>@@ -36,7 +36,7 @@</span><br><span> </span><br><span> void pch_enable_lpc(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- /* X230 EC Decode Range Port60/64, Port62/66 */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* EC Decode Range Port60/64, Port62/66 */</span><br><span> /* Enable EC, PS/2 Keyboard/Mouse */</span><br><span> pci_write_config16(PCH_LPC_DEV, LPC_EN,</span><br><span> CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN);</span><br><span>diff --git a/src/mainboard/lenovo/x230/romstage.c b/src/mainboard/lenovo/x230/romstage.c</span><br><span>index 1ddaedf..91b90d2 100644</span><br><span>--- a/src/mainboard/lenovo/x230/romstage.c</span><br><span>+++ b/src/mainboard/lenovo/x230/romstage.c</span><br><span>@@ -34,7 +34,7 @@</span><br><span> </span><br><span> void pch_enable_lpc(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- /* X230 EC Decode Range Port60/64, Port62/66 */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* EC Decode Range Port60/64, Port62/66 */</span><br><span> /* Enable EC, PS/2 Keyboard/Mouse */</span><br><span> pci_write_config16(PCH_LPC_DEV, LPC_EN,</span><br><span> CNF2_LPC_EN | CNF1_LPC_EN | MC_LPC_EN | KBC_LPC_EN);</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28976">change 28976</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I6468e3357f8eed434f8527a852e134380f486d9a </div>
<div style="display:none"> Gerrit-Change-Number: 28976 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Peter Lemenkov <lemenkov@gmail.com> </div>