<p>Furquan Shaikh has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28924">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/common, mb/google, mb/siemens: Use lower case x for RXD<br><br>In order to make the macro name consistent for all PAD_CFG1_IOSSTATE_*<br>macros, this change uses lower case x for *RXD*. It helps avoid<br>confusion when using the macros.<br><br>Change-Id: I6b1ce259ed184bcf8224dff334fcf0a0289f1788<br>Signed-off-by: Furquan Shaikh <furquan@google.com><br>---<br>M src/mainboard/google/octopus/variants/baseboard/gpio.c<br>M src/mainboard/google/octopus/variants/bip/gpio.c<br>M src/mainboard/google/reef/variants/baseboard/gpio.c<br>M src/mainboard/google/reef/variants/coral/gpio.c<br>M src/mainboard/google/reef/variants/coral/mainboard.c<br>M src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c<br>M src/soc/intel/common/block/include/intelblocks/gpio_defs.h<br>7 files changed, 15 insertions(+), 15 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/28924/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c</span><br><span>index 2b9d4b4..4719a09 100644</span><br><span>--- a/src/mainboard/google/octopus/variants/baseboard/gpio.c</span><br><span>+++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c</span><br><span>@@ -146,7 +146,7 @@</span><br><span> PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_102, NONE, DEEP, NF1),/* PMU_SLP_S4_B */</span><br><span> PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_103, NONE, DEEP, NF1),/* SUSPWRDNACK */</span><br><span> PAD_NC(GPIO_104, UP_20K),/* EMMC_DNX_PWR_EN_B - unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_105, 1, DEEP, NONE, Tx1RXDCRx0, DISPUPD),/* GPIO_105 -- TOUCHSCREEN_RST */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_105, 1, DEEP, NONE, Tx1RxDCRx0, DISPUPD),/* GPIO_105 -- TOUCHSCREEN_RST */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_106, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* PMU_BATLOW_B */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_107, NONE, DEEP, NF1, TxDRxE, DISPUPD),/* PMU_RESETBUTTON_B */</span><br><span> PAD_NC(GPIO_108, NONE),/* PMU_SUSCLK -- unused */</span><br><span>@@ -202,7 +202,7 @@</span><br><span> PAD_CFG_GPI_APIC_IOS(GPIO_137, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_137 -- HP_INT_ODL */</span><br><span> PAD_CFG_GPI_APIC_IOS(GPIO_138, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_138 -- PEN_PDCT_ODL */</span><br><span> PAD_CFG_GPI_APIC_IOS(GPIO_139, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_139 -- PEN_INT_ODL */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_140, 1, DEEP, NONE, Tx1RXDCRx0, DISPUPD),/* GPIO_140 -- PEN_RESET */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_140, 1, DEEP, NONE, Tx1RxDCRx0, DISPUPD),/* GPIO_140 -- PEN_RESET */</span><br><span> // Also we may be able to use eSPI WAKE# Virtual Wire instead</span><br><span> PAD_CFG_GPI_SCI_IOS(GPIO_141, NONE, DEEP, EDGE_SINGLE, INVERT, IGNORE, DISPUPD),/* GPIO_141 -- EC_PCH_WAKE_ODL */</span><br><span> PAD_CFG_GPI_SCI_LOW(GPIO_142, NONE, DEEP, LEVEL),/* GPIO_142 -- TRACKPAD_INT2_1V8_ODL */</span><br><span>@@ -223,7 +223,7 @@</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_158, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* AVS_I2S0_WS_SYNC */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_159, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* AVS_I2S0_SDI */</span><br><span> PAD_NC(GPIO_160, DN_20K), /* AVS_I2S0_SDO -- unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_161, 1, DEEP, UP_20K, Tx1RXDCRx0, DISPUPD), /* AVS_I2S1_MCLK -- LTE_OFF_ODL */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_161, 1, DEEP, UP_20K, Tx1RxDCRx0, DISPUPD), /* AVS_I2S1_MCLK -- LTE_OFF_ODL */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_162, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* AVS_I2S1_BCLK */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_163, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* AVS_I2S1_WS_SYNC */</span><br><span> PAD_CFG_GPO(GPIO_164, 0, DEEP), /* WLAN_PE_RST */</span><br><span>@@ -244,7 +244,7 @@</span><br><span> /* SCC COMMUNITY GPIOS */</span><br><span> PAD_NC(GPIO_176, UP_20K), /* SMB_ALERTB -- unused */</span><br><span> PAD_NC(GPIO_177, UP_20K), /* SMB_CLK -- unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 1, DEEP, NONE, Tx1RXDCRx0, DISPUPD), /* EN_PP3300_WLAN */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 1, DEEP, NONE, Tx1RxDCRx0, DISPUPD), /* EN_PP3300_WLAN */</span><br><span> PAD_NC(GPIO_179, NONE), /* SDCARD_CLK -- unused */</span><br><span> PAD_NC(GPIO_180, NONE), /* SDCARD_CMD -- unused */</span><br><span> PAD_NC(GPIO_181, UP_20K), /* SDCARD_D0 -- unused */</span><br><span>@@ -335,7 +335,7 @@</span><br><span> /* GPIO settings before entering slp_s5. */</span><br><span> static const struct pad_config sleep_s5_gpio_table[] = {</span><br><span> /* BT_DISABLE_L */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_109, 0, DEEP, NONE, Tx0RXDCRx1, SAME),</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_109, 0, DEEP, NONE, Tx0RxDCRx1, SAME),</span><br><span> };</span><br><span> </span><br><span> const struct pad_config *__weak</span><br><span>diff --git a/src/mainboard/google/octopus/variants/bip/gpio.c b/src/mainboard/google/octopus/variants/bip/gpio.c</span><br><span>index 1e94b0e..b319a0e 100644</span><br><span>--- a/src/mainboard/google/octopus/variants/bip/gpio.c</span><br><span>+++ b/src/mainboard/google/octopus/variants/bip/gpio.c</span><br><span>@@ -144,7 +144,7 @@</span><br><span> PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_102, NONE, DEEP, NF1),/* PMU_SLP_S4_B */</span><br><span> PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_103, NONE, DEEP, NF1),/* SUSPWRDNACK */</span><br><span> PAD_NC(GPIO_104, UP_20K),/* EMMC_DNX_PWR_EN_B - unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_105, 1, DEEP, NONE, Tx1RXDCRx0, DISPUPD),/* GPIO_105 -- TOUCHSCREEN_RST */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_105, 1, DEEP, NONE, Tx1RxDCRx0, DISPUPD),/* GPIO_105 -- TOUCHSCREEN_RST */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_106, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* PMU_BATLOW_B */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_107, NONE, DEEP, NF1, TxDRxE, DISPUPD),/* PMU_RESETBUTTON_B */</span><br><span> PAD_NC(GPIO_108, NONE),/* PMU_SUSCLK -- unused */</span><br><span>@@ -201,7 +201,7 @@</span><br><span> DISPUPD),/* GPIO_137 -- HP_INT_ODL */</span><br><span> PAD_CFG_GPI_APIC_IOS(GPIO_138, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_138 -- PEN_PDCT_ODL */</span><br><span> PAD_CFG_GPI_APIC_IOS(GPIO_139, NONE, DEEP, LEVEL, INVERT, HIZCRx1, DISPUPD),/* GPIO_139 -- PEN_INT_ODL */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_140, 0, DEEP, NONE, Tx1RXDCRx0, DISPUPD),/* GPIO_140 -- PEN_RESET */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_140, 0, DEEP, NONE, Tx1RxDCRx0, DISPUPD),/* GPIO_140 -- PEN_RESET */</span><br><span> // Also we may be able to use eSPI WAKE# Virtual Wire instead</span><br><span> PAD_CFG_GPI_SCI_IOS(GPIO_141, NONE, DEEP, EDGE_SINGLE, INVERT, IGNORE, DISPUPD),/* GPIO_141 -- EC_PCH_WAKE_ODL */</span><br><span> PAD_CFG_GPI_SCI_LOW(GPIO_142, NONE, DEEP, LEVEL),/* GPIO_142 -- TRACKPAD_INT2_1V8_ODL */</span><br><span>@@ -243,7 +243,7 @@</span><br><span> /* SCC COMMUNITY GPIOS */</span><br><span> PAD_NC(GPIO_176, UP_20K), /* SMB_ALERTB -- unused */</span><br><span> PAD_NC(GPIO_177, UP_20K), /* SMB_CLK -- unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 1, DEEP, NONE, Tx1RXDCRx0, DISPUPD), /* EN_PP3300_WLAN */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 1, DEEP, NONE, Tx1RxDCRx0, DISPUPD), /* EN_PP3300_WLAN */</span><br><span> PAD_NC(GPIO_179, NONE), /* SDCARD_CLK -- unused */</span><br><span> PAD_NC(GPIO_180, NONE), /* SDCARD_CMD -- unused */</span><br><span> PAD_NC(GPIO_181, UP_20K), /* SDCARD_D0 -- unused */</span><br><span>diff --git a/src/mainboard/google/reef/variants/baseboard/gpio.c b/src/mainboard/google/reef/variants/baseboard/gpio.c</span><br><span>index 3cd765b..8df5873 100644</span><br><span>--- a/src/mainboard/google/reef/variants/baseboard/gpio.c</span><br><span>+++ b/src/mainboard/google/reef/variants/baseboard/gpio.c</span><br><span>@@ -327,7 +327,7 @@</span><br><span> PAD_CFG_GPO(GPIO_44, 1, DEEP), /* GPS_RST_ODL */</span><br><span> PAD_CFG_GPI(GPIO_45, NONE, DEEP), /* LPSS_UART1_CTS - MEM_CONFIG3 */</span><br><span> PAD_CFG_NF(GPIO_46, NATIVE, DEEP, NF1), /* LPSS_UART2_RXD */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE(GPIO_47, NATIVE, DEEP, NF1, Tx1RXDCRx0), /* LPSS_UART2_TXD */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_47, NATIVE, DEEP, NF1, Tx1RxDCRx0), /* LPSS_UART2_TXD */</span><br><span> PAD_CFG_GPI(GPIO_48, UP_20K, DEEP), /* LPSS_UART2_RTS - unused */</span><br><span> PAD_CFG_GPI_SMI_LOW(GPIO_49, NONE, DEEP, EDGE_SINGLE), /* LPSS_UART2_CTS - EC_SMI_L */</span><br><span> </span><br><span>diff --git a/src/mainboard/google/reef/variants/coral/gpio.c b/src/mainboard/google/reef/variants/coral/gpio.c</span><br><span>index e89e5b5..0c762c0 100644</span><br><span>--- a/src/mainboard/google/reef/variants/coral/gpio.c</span><br><span>+++ b/src/mainboard/google/reef/variants/coral/gpio.c</span><br><span>@@ -327,7 +327,7 @@</span><br><span> PAD_CFG_GPO(GPIO_44, 1, DEEP), /* GPS_RST_ODL */</span><br><span> PAD_CFG_GPI(GPIO_45, NONE, DEEP), /* LPSS_UART1_CTS - MEM_CONFIG3 */</span><br><span> PAD_CFG_NF(GPIO_46, NATIVE, DEEP, NF1), /* LPSS_UART2_RXD */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE(GPIO_47, NATIVE, DEEP, NF1, Tx1RXDCRx0), /* LPSS_UART2_TXD */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_47, NATIVE, DEEP, NF1, Tx1RxDCRx0), /* LPSS_UART2_TXD */</span><br><span> PAD_CFG_GPI(GPIO_48, UP_20K, DEEP), /* LPSS_UART2_RTS - unused */</span><br><span> PAD_CFG_GPI_SMI_LOW(GPIO_49, NONE, DEEP, EDGE_SINGLE), /* LPSS_UART2_CTS - EC_SMI_L */</span><br><span> </span><br><span>diff --git a/src/mainboard/google/reef/variants/coral/mainboard.c b/src/mainboard/google/reef/variants/coral/mainboard.c</span><br><span>index f998763..aad65f0 100644</span><br><span>--- a/src/mainboard/google/reef/variants/coral/mainboard.c</span><br><span>+++ b/src/mainboard/google/reef/variants/coral/mainboard.c</span><br><span>@@ -136,9 +136,9 @@</span><br><span> </span><br><span> static const struct pad_config nasher_gpio_tables[] = {</span><br><span> /* AVS_DMIC_CLK_A1 */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE(GPIO_79, NATIVE, DEEP, NF1, Tx1RXDCRx0),</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_79, NATIVE, DEEP, NF1, Tx1RxDCRx0),</span><br><span> /* AVS_DMIC_CLK_B1 */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE(GPIO_80, NATIVE, DEEP, NF1, Tx1RXDCRx0),</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_80, NATIVE, DEEP, NF1, Tx1RxDCRx0),</span><br><span> };</span><br><span> </span><br><span> const struct pad_config *variant_sku_gpio_table(size_t *num)</span><br><span>diff --git a/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c b/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c</span><br><span>index 28aad8a..c4dcc76 100644</span><br><span>--- a/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c</span><br><span>+++ b/src/mainboard/siemens/mc_apl1/variants/baseboard/gpio.c</span><br><span>@@ -332,7 +332,7 @@</span><br><span> PAD_CFG_GPI(GPIO_45, UP_20K, DEEP), /* LPSS_UART1_CTS - unused */</span><br><span> PAD_CFG_NF(GPIO_46, NATIVE, DEEP, NF1), /* LPSS_UART2_RXD */</span><br><span> /* LPSS_UART2_TXD */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NF_IOSSTATE(GPIO_47, NATIVE, DEEP, NF1, Tx1RXDCRx0),</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF_IOSSTATE(GPIO_47, NATIVE, DEEP, NF1, Tx1RxDCRx0),</span><br><span> PAD_CFG_GPI(GPIO_48, DN_20K, DEEP), /* LPSS_UART2_RTS - unused */</span><br><span> PAD_CFG_GPI(GPIO_49, UP_20K, DEEP), /* LPSS_UART2_CTS - unused */</span><br><span> </span><br><span>diff --git a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h</span><br><span>index a8d5ac9..855659a 100644</span><br><span>--- a/src/soc/intel/common/block/include/intelblocks/gpio_defs.h</span><br><span>+++ b/src/soc/intel/common/block/include/intelblocks/gpio_defs.h</span><br><span>@@ -84,10 +84,10 @@</span><br><span> #define PAD_CFG1_IOSSTATE_Tx0RxDCRx0 (0x1 << 14)</span><br><span> /* Tx enabled driving 0, Rx disabled and Rx driving 1 back to its controller</span><br><span> * internally */</span><br><span style="color: hsl(0, 100%, 40%);">-#define PAD_CFG1_IOSSTATE_Tx0RXDCRx1 (0x2 << 14)</span><br><span style="color: hsl(120, 100%, 40%);">+#define PAD_CFG1_IOSSTATE_Tx0RxDCRx1 (0x2 << 14)</span><br><span> /* Tx enabled driving 1, Rx disabled and Rx driving 0 back to its controller</span><br><span> * internally */</span><br><span style="color: hsl(0, 100%, 40%);">-#define PAD_CFG1_IOSSTATE_Tx1RXDCRx0 (0x3 << 14)</span><br><span style="color: hsl(120, 100%, 40%);">+#define PAD_CFG1_IOSSTATE_Tx1RxDCRx0 (0x3 << 14)</span><br><span> /* Tx enabled driving 1, Rx disabled and Rx driving 1 back to its controller</span><br><span> * internally */</span><br><span> #define PAD_CFG1_IOSSTATE_Tx1RxDCRx1 (0x4 << 14)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28924">change 28924</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I6b1ce259ed184bcf8224dff334fcf0a0289f1788 </div>
<div style="display:none"> Gerrit-Change-Number: 28924 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Furquan Shaikh <furquan@google.com> </div>