<p>Martin Roth has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28906">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/google/kahlee: Set 100MHz fast spi read for supported boards<br><br>BUG=b:116737547<br>TEST=Boot Careena, look at signal on a scope.<br><br>Change-Id: I9ad95c858376ad0e6c9e787055d3fa72b5682191<br>Signed-off-by: Martin Roth <martinroth@chromium.org><br>---<br>M src/mainboard/google/kahlee/bootblock/bootblock.c<br>1 file changed, 31 insertions(+), 15 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/28906/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/kahlee/bootblock/bootblock.c b/src/mainboard/google/kahlee/bootblock/bootblock.c</span><br><span>index 8531fc0..40fd390 100644</span><br><span>--- a/src/mainboard/google/kahlee/bootblock/bootblock.c</span><br><span>+++ b/src/mainboard/google/kahlee/bootblock/bootblock.c</span><br><span>@@ -14,6 +14,7 @@</span><br><span> */</span><br><span> </span><br><span> #include <baseboard/variants.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <boardid.h></span><br><span> #include <bootblock_common.h></span><br><span> #include <soc/gpio.h></span><br><span> #include <soc/southbridge.h></span><br><span>@@ -32,34 +33,49 @@</span><br><span> sb_program_gpios(gpios, num_gpios);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/* Use 100MHz on on boards that can support it */</span><br><span style="color: hsl(120, 100%, 40%);">+static int set_100mhz_fast_read(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t id = board_id();</span><br><span style="color: hsl(120, 100%, 40%);">+ if (IS_ENABLED(CONFIG_BOARD_GOOGLE_CAREENA) && (id <= 2 || id >= 5))</span><br><span style="color: hsl(120, 100%, 40%);">+ return 1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> void bootblock_mainboard_init(void)</span><br><span> {</span><br><span style="color: hsl(120, 100%, 40%);">+ uint16_t normal = SPI_SPEED_33M;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint16_t fast = SPI_SPEED_66M;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint16_t altio = SPI_SPEED_66M;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * W25Q128FW Setup</span><br><span style="color: hsl(120, 100%, 40%);">+ * Normal Read 40MHz</span><br><span style="color: hsl(120, 100%, 40%);">+ * Fast Read 104MHz</span><br><span style="color: hsl(120, 100%, 40%);">+ * Dual Read IO (1-2-2)</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> if (IS_ENABLED(CONFIG_EM100)) {</span><br><span> /*</span><br><span> * We should be able to rely on defaults, but it seems safer</span><br><span> * to explicitly set up these registers.</span><br><span> */</span><br><span> sb_read_mode(SPI_READ_MODE_NOM);</span><br><span style="color: hsl(0, 100%, 40%);">- sb_set_spi100(SPI_SPEED_16M, /* Normal */</span><br><span style="color: hsl(0, 100%, 40%);">- SPI_SPEED_16M, /* Fast */</span><br><span style="color: hsl(0, 100%, 40%);">- SPI_SPEED_16M, /* AltIO */</span><br><span style="color: hsl(0, 100%, 40%);">- SPI_SPEED_66M); /* TPM */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ normal = SPI_SPEED_16M;</span><br><span style="color: hsl(120, 100%, 40%);">+ fast = SPI_SPEED_16M;</span><br><span style="color: hsl(120, 100%, 40%);">+ altio = SPI_SPEED_16M;</span><br><span> } else {</span><br><span style="color: hsl(0, 100%, 40%);">- /*</span><br><span style="color: hsl(0, 100%, 40%);">- * W25Q128FW Setup</span><br><span style="color: hsl(0, 100%, 40%);">- * Normal Read 40MHz</span><br><span style="color: hsl(0, 100%, 40%);">- * Fast Read 104MHz</span><br><span style="color: hsl(0, 100%, 40%);">- * Dual Read IO (1-2-2)</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span> sb_read_mode(SPI_READ_MODE_DUAL122);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /* Set SPI speeds before verstage. Needed for TPM */</span><br><span style="color: hsl(0, 100%, 40%);">- sb_set_spi100(SPI_SPEED_33M, /* Normal */</span><br><span style="color: hsl(0, 100%, 40%);">- SPI_SPEED_66M, /* Fast */</span><br><span style="color: hsl(0, 100%, 40%);">- SPI_SPEED_66M, /* AltIO */</span><br><span style="color: hsl(0, 100%, 40%);">- SPI_SPEED_66M); /* TPM */</span><br><span style="color: hsl(120, 100%, 40%);">+ if (set_100mhz_fast_read())</span><br><span style="color: hsl(120, 100%, 40%);">+ fast = SPI_SPEED_100M;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+ /* Normal, Fast, AltIO, TPM */</span><br><span style="color: hsl(120, 100%, 40%);">+ sb_set_spi100(normal, fast, altio, SPI_SPEED_66M);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /* Setup TPM decode before verstage */</span><br><span> sb_tpm_decode_spi();</span><br><span> }</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28906">change 28906</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I9ad95c858376ad0e6c9e787055d3fa72b5682191 </div>
<div style="display:none"> Gerrit-Change-Number: 28906 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Martin Roth <martinroth@google.com> </div>