<p>Jonathan Neuschäfer has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28827">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">Documentation: Spell "blob" in lowercase<br><br>It's not an acronym (outside of database software).<br><br>Change-Id: I529561e4fc9889be7f9d6bd6d5f9a876e2007671<br>Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net><br>---<br>M Documentation/mainboard/lenovo/xx20_series.md<br>M Documentation/mainboard/lenovo/xx30_series.md<br>M Documentation/northbridge/intel/sandybridge/nri_features.md<br>3 files changed, 5 insertions(+), 5 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/28827/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/Documentation/mainboard/lenovo/xx20_series.md b/Documentation/mainboard/lenovo/xx20_series.md</span><br><span>index 976a29b..8603853 100644</span><br><span>--- a/Documentation/mainboard/lenovo/xx20_series.md</span><br><span>+++ b/Documentation/mainboard/lenovo/xx20_series.md</span><br><span>@@ -26,8 +26,8 @@</span><br><span> * Do **NOT** accidently swap pins or power on the board while a SPI flasher</span><br><span> is connected. It will destroy your device.</span><br><span> * It's recommended to only flash the BIOS region. In that case you don't</span><br><span style="color: hsl(0, 100%, 40%);">- need to extract BLOBs from vendor firmware.</span><br><span style="color: hsl(0, 100%, 40%);">- If you want to flash the whole chip, you need BLOBs when building</span><br><span style="color: hsl(120, 100%, 40%);">+ need to extract blobs from vendor firmware.</span><br><span style="color: hsl(120, 100%, 40%);">+ If you want to flash the whole chip, you need blobs when building</span><br><span> coreboot.</span><br><span> * The shipped *Flash layout* allocates 3MiB to the BIOS region, which is the space</span><br><span> usable by coreboot.</span><br><span>diff --git a/Documentation/mainboard/lenovo/xx30_series.md b/Documentation/mainboard/lenovo/xx30_series.md</span><br><span>index e65a3f2..ad85605 100644</span><br><span>--- a/Documentation/mainboard/lenovo/xx30_series.md</span><br><span>+++ b/Documentation/mainboard/lenovo/xx30_series.md</span><br><span>@@ -26,8 +26,8 @@</span><br><span> * Do **NOT** accidently swap pins or power on the board while a SPI flasher</span><br><span> is connected. It will permanently brick your device.</span><br><span> * It's recommended to only flash the BIOS region. In that case you don't</span><br><span style="color: hsl(0, 100%, 40%);">- need to extract BLOBs from vendor firmware.</span><br><span style="color: hsl(0, 100%, 40%);">- If you want to flash the whole chip, you need BLOBs when building</span><br><span style="color: hsl(120, 100%, 40%);">+ need to extract blobs from vendor firmware.</span><br><span style="color: hsl(120, 100%, 40%);">+ If you want to flash the whole chip, you need blobs when building</span><br><span> coreboot.</span><br><span> * The *Flash layout* shows that by default 7MiB of space are available for</span><br><span> the use with coreboot.</span><br><span>diff --git a/Documentation/northbridge/intel/sandybridge/nri_features.md b/Documentation/northbridge/intel/sandybridge/nri_features.md</span><br><span>index 51297bd..d700b54 100644</span><br><span>--- a/Documentation/northbridge/intel/sandybridge/nri_features.md</span><br><span>+++ b/Documentation/northbridge/intel/sandybridge/nri_features.md</span><br><span>@@ -8,7 +8,7 @@</span><br><span> * There might be errors to fix.</span><br><span> * Position in romstage doesn't matter.</span><br><span> 2. mrc.bin raminit</span><br><span style="color: hsl(0, 100%, 40%);">- * Closed Source (aka BLOB)</span><br><span style="color: hsl(120, 100%, 40%);">+ * Closed Source (aka blob)</span><br><span> * No known errors.</span><br><span> * Needs to be placed at fixed offset in romstage.</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28827">change 28827</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28827"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I529561e4fc9889be7f9d6bd6d5f9a876e2007671 </div>
<div style="display:none"> Gerrit-Change-Number: 28827 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer@gmx.net> </div>