<p>Patrick Georgi <strong>merged</strong> this change.</p><p><a href="https://review.coreboot.org/28740">View Change</a></p><div style="white-space:pre-wrap">Approvals:
  build bot (Jenkins): Verified
  Duncan Laurie: Looks good to me, approved

</div><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/cannonlake: Move SkipMpInit config to FSPM<br><br>SkipMpInit UPD had ben moved from Fsp SiliconInit UPD to Fsp MemoryInit<br>UPD, hence change the settings in coreboot side as well. The old options<br>in SiliconInit get deprecated, so leave the code as is will be<br>harmless. Make the changes limited to coffeelake itself.<br><br>Change-Id: If968de78117068668e4f0006c412442c50658ba9<br>Signed-off-by: Lijian Zhao <lijian.zhao@intel.com><br>Reviewed-on: https://review.coreboot.org/28740<br>Reviewed-by: Duncan Laurie <dlaurie@chromium.org><br>Tested-by: build bot (Jenkins) <no-reply@coreboot.org><br>---<br>M src/soc/intel/cannonlake/romstage/romstage.c<br>1 file changed, 4 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c</span><br><span>index ae1ba4d..8bdabbf 100644</span><br><span>--- a/src/soc/intel/cannonlake/romstage/romstage.c</span><br><span>+++ b/src/soc/intel/cannonlake/romstage/romstage.c</span><br><span>@@ -22,6 +22,7 @@</span><br><span> #include <compiler.h></span><br><span> #include <console/console.h></span><br><span> #include <fsp/util.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <intelblocks/chip.h></span><br><span> #include <intelblocks/cse.h></span><br><span> #include <intelblocks/pmclib.h></span><br><span> #include <memory_info.h></span><br><span>@@ -175,6 +176,9 @@</span><br><span>                 m_cfg->VmxEnable = 0;</span><br><span>     else</span><br><span>                 m_cfg->VmxEnable = config->VmxEnable;</span><br><span style="color: hsl(120, 100%, 40%);">+#if IS_ENABLED(CONFIG_SOC_INTEL_COFFEELAKE)</span><br><span style="color: hsl(120, 100%, 40%);">+      m_cfg->SkipMpInit = !chip_get_fsp_mp_init();</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span> }</span><br><span> </span><br><span> void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28740">change 28740</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28740"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: merged </div>
<div style="display:none"> Gerrit-Change-Id: If968de78117068668e4f0006c412442c50658ba9 </div>
<div style="display:none"> Gerrit-Change-Number: 28740 </div>
<div style="display:none"> Gerrit-PatchSet: 2 </div>
<div style="display:none"> Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Duncan Laurie <dlaurie@chromium.org> </div>
<div style="display:none"> Gerrit-Reviewer: Hannah Williams <hannah.williams@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Lijian Zhao <lijian.zhao@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Patrick Georgi <pgeorgi@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: Subrata Banik <subrata.banik@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>