<p>Subrata Banik has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28790">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/common/pch: Select Kconfig for ITSS polarity configuration<br><br>This patch selects Kconfig for Intel Core Platform in order to ensure<br>proper ITSS IPCx programming.<br><br>Change-Id: I81e75e17ceb23c364b78300c3950144be1580700<br>Signed-off-by: Subrata Banik <subrata.banik@intel.com><br>---<br>M src/soc/intel/common/block/gpio/Kconfig<br>M src/soc/intel/common/pch/Kconfig<br>2 files changed, 2 insertions(+), 2 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/28790/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/common/block/gpio/Kconfig b/src/soc/intel/common/block/gpio/Kconfig</span><br><span>index 6d712e9..1811e25 100644</span><br><span>--- a/src/soc/intel/common/block/gpio/Kconfig</span><br><span>+++ b/src/soc/intel/common/block/gpio/Kconfig</span><br><span>@@ -10,8 +10,7 @@</span><br><span>  help</span><br><span>           This option enables GPIO debug messages</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-# Used in small core SOCs to invert the polarity as ITSS only takes</span><br><span style="color: hsl(0, 100%, 40%);">-# active high signals</span><br><span style="color: hsl(120, 100%, 40%);">+# Use to invert the polarity as ITSS only takes active high signals</span><br><span> config SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG</span><br><span>        depends on SOC_INTEL_COMMON_BLOCK_GPIO</span><br><span>       bool</span><br><span>diff --git a/src/soc/intel/common/pch/Kconfig b/src/soc/intel/common/pch/Kconfig</span><br><span>index 1157eb4..2bf6d68 100644</span><br><span>--- a/src/soc/intel/common/pch/Kconfig</span><br><span>+++ b/src/soc/intel/common/pch/Kconfig</span><br><span>@@ -23,6 +23,7 @@</span><br><span>        select SOC_INTEL_COMMON_BLOCK_EBDA</span><br><span>   select SOC_INTEL_COMMON_BLOCK_FAST_SPI</span><br><span>       select SOC_INTEL_COMMON_BLOCK_GPIO</span><br><span style="color: hsl(120, 100%, 40%);">+    select SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG</span><br><span>      select SOC_INTEL_COMMON_BLOCK_GRAPHICS</span><br><span>       select SOC_INTEL_COMMON_BLOCK_ITSS</span><br><span>   select SOC_INTEL_COMMON_BLOCK_I2C</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28790">change 28790</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28790"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I81e75e17ceb23c364b78300c3950144be1580700 </div>
<div style="display:none"> Gerrit-Change-Number: 28790 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Subrata Banik <subrata.banik@intel.com> </div>