<p><a href="https://review.coreboot.org/28767">View Change</a></p><p>3 comments:</p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/28767/1/src/soc/amd/stoneyridge/southbridge.c">File src/soc/amd/stoneyridge/southbridge.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/28767/1/src/soc/amd/stoneyridge/southbridge.c@910">Patch Set #1, Line 910:</a> </p><p><blockquote style="border-left: 1px solid #aaa; margin: 10px 0; padding: 0 10px;"><pre style="font-family: monospace,monospace; white-space: pre-wrap;">   sd = dev_find_slot(0, SD_DEVFN);<br><br></pre></blockquote></p><p><blockquote style="border-left: 1px solid #aaa; margin: 10px 0; padding: 0 10px;">Use is_aoac_device_enabled(FCH_AOAC_D3_STATE_SD), declaring FCH_AOAC_D3_STATE_SD = 0x70</blockquote></p><p style="white-space: pre-wrap; word-wrap: break-word;">Sorry, 0x71 is the state</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/28767/1/src/soc/amd/stoneyridge/southbridge.c@912">Patch Set #1, Line 912:</a> </p><p><blockquote style="border-left: 1px solid #aaa; margin: 10px 0; padding: 0 10px;"><pre style="font-family: monospace,monospace; white-space: pre-wrap;">  sata = dev_find_slot(0, SATA_DEVFN);<br><br></pre></blockquote></p><p><blockquote style="border-left: 1px solid #aaa; margin: 10px 0; padding: 0 10px;">Use is_aoac_device_enabled(FCH_AOAC_D3_STATE_SATA), declaring FCH_AOAC_D3_STATE_SATA = 0x5E</blockquote></p><p style="white-space: pre-wrap; word-wrap: break-word;">Sorry, 0x5F is the state</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/28767/1/src/soc/amd/stoneyridge/southbridge.c@914">Patch Set #1, Line 914:</a> <code style="font-family:monospace,monospace">1;</code></p><p><blockquote style="border-left: 1px solid #aaa; margin: 10px 0; padding: 0 10px;">Can you be sure it'll be enabled? ESPI is not the same as SPI. […]</blockquote></p><p style="white-space: pre-wrap; word-wrap: break-word;">Sorry, 0x77 is the state</p></li></ul></li></ul><p>To view, visit <a href="https://review.coreboot.org/28767">change 28767</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28767"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: comment </div>
<div style="display:none"> Gerrit-Change-Id: I8af69c030eb2353ad75beeb2bfd3bef24abff04c </div>
<div style="display:none"> Gerrit-Change-Number: 28767 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marshall Dawson <marshalldawson3rd@gmail.com> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>
<div style="display:none"> Gerrit-CC: Richard Spiegel <richard.spiegel@silverbackltd.com> </div>
<div style="display:none"> Gerrit-Comment-Date: Thu, 27 Sep 2018 16:56:43 +0000 </div>
<div style="display:none"> Gerrit-HasComments: Yes </div>
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