<p>Duncan Laurie has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28755">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/cannonlake: Fix ACPI FADT table generation<br><br>The function to fill out the FADT table exits early if the devicetree<br>config option to disable the legacy timer is set.  This means it never<br>gets to the later check for s0ix config option and so the flag to<br>indicate that it supports low-power idle in S0 is not set.<br><br>Change-Id: Ia0416f21b6445f6feecb6f0301d48fdf2522b8a6<br>Signed-off-by: Duncan Laurie <dlaurie@google.com><br>---<br>M src/soc/intel/cannonlake/acpi.c<br>1 file changed, 11 insertions(+), 12 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/28755/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c</span><br><span>index 155756c..a27055a 100644</span><br><span>--- a/src/soc/intel/cannonlake/acpi.c</span><br><span>+++ b/src/soc/intel/cannonlake/acpi.c</span><br><span>@@ -176,19 +176,18 @@</span><br><span>      const struct device *dev = PCH_DEV_LPC;</span><br><span>      const struct soc_intel_cannonlake_config *config = dev->chip_info;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-       if (config->PmTimerDisabled != 0)</span><br><span style="color: hsl(0, 100%, 40%);">-            return;</span><br><span style="color: hsl(120, 100%, 40%);">+       if (!config->PmTimerDisabled) {</span><br><span style="color: hsl(120, 100%, 40%);">+            fadt->pm_tmr_blk = pmbase + PM1_TMR;</span><br><span style="color: hsl(120, 100%, 40%);">+               fadt->pm_tmr_len = 4;</span><br><span style="color: hsl(120, 100%, 40%);">+              fadt->x_pm_tmr_blk.space_id = 1;</span><br><span style="color: hsl(120, 100%, 40%);">+           fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8;</span><br><span style="color: hsl(120, 100%, 40%);">+            fadt->x_pm_tmr_blk.bit_offset = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+         fadt->x_pm_tmr_blk.resv = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+               fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR;</span><br><span style="color: hsl(120, 100%, 40%);">+               fadt->x_pm_tmr_blk.addrh = 0x0;</span><br><span style="color: hsl(120, 100%, 40%);">+    }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-   fadt->pm_tmr_blk = pmbase + PM1_TMR;</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->pm_tmr_len = 4;</span><br><span style="color: hsl(0, 100%, 40%);">-        fadt->x_pm_tmr_blk.space_id = 1;</span><br><span style="color: hsl(0, 100%, 40%);">-     fadt->x_pm_tmr_blk.bit_width = fadt->pm_tmr_len * 8;</span><br><span style="color: hsl(0, 100%, 40%);">-      fadt->x_pm_tmr_blk.bit_offset = 0;</span><br><span style="color: hsl(0, 100%, 40%);">-   fadt->x_pm_tmr_blk.resv = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR;</span><br><span style="color: hsl(0, 100%, 40%);">- fadt->x_pm_tmr_blk.addrh = 0x0;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-      if(config->s0ix_enable)</span><br><span style="color: hsl(120, 100%, 40%);">+    if (config->s0ix_enable)</span><br><span>          fadt->flags |= ACPI_FADT_LOW_PWR_IDLE_S0;</span><br><span> }</span><br><span> uint32_t soc_read_sci_irq_select(void)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28755">change 28755</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28755"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ia0416f21b6445f6feecb6f0301d48fdf2522b8a6 </div>
<div style="display:none"> Gerrit-Change-Number: 28755 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Duncan Laurie <dlaurie@chromium.org> </div>