<p>Marc Jones has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28753">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/amd/stoneyridge: Add IOMMU support<br><br>Enable the IOMMU in AGESA and copy the AGESA generated IVRS ACPI table.<br><br>BUG=b:116196614<br>TEST=Check dmesg for AMD-Vi messages.<br><br>Change-Id: I688d867c7bd4949a57b27c1b6a793c6a6e4a717a<br>Signed-off-by: Marc Jones <marc.jones@scarletltd.com><br>---<br>M src/include/device/pci_ids.h<br>M src/soc/amd/common/block/pi/agesawrapper.c<br>M src/soc/amd/stoneyridge/Makefile.inc<br>A src/soc/amd/stoneyridge/iommu.c<br>M src/soc/amd/stoneyridge/northbridge.c<br>5 files changed, 66 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/28753/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h</span><br><span>index a6ed6d9..3de1e85 100644</span><br><span>--- a/src/include/device/pci_ids.h</span><br><span>+++ b/src/include/device/pci_ids.h</span><br><span>@@ -298,6 +298,7 @@</span><br><span> #define PCI_DEVICE_ID_AMD_15H_NB_IOMMU 0x1419</span><br><span> #define PCI_DEVICE_ID_AMD_15H_MODEL_303F_NB_IOMMU 0x1423</span><br><span> #define PCI_DEVICE_ID_AMD_16H_MODEL_303F_NB_IOMMU 0x1567</span><br><span style="color: hsl(120, 100%, 40%);">+#define PCI_DEVICE_ID_AMD_15H_MODEL_707F_NB_IOMMU 0x1577</span><br><span> </span><br><span> #define PCI_DEVICE_ID_ATI_SB600_LPC 0x438D</span><br><span> #define PCI_DEVICE_ID_ATI_SB600_SATA 0x4380</span><br><span>diff --git a/src/soc/amd/common/block/pi/agesawrapper.c b/src/soc/amd/common/block/pi/agesawrapper.c</span><br><span>index 5cd04ba..fdde226 100644</span><br><span>--- a/src/soc/amd/common/block/pi/agesawrapper.c</span><br><span>+++ b/src/soc/amd/common/block/pi/agesawrapper.c</span><br><span>@@ -321,6 +321,9 @@</span><br><span> */</span><br><span> AMD_LATE_PARAMS *LateParams = create_struct(&AmdParamStruct);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+ LateParams->GnbLateConfiguration.GnbIoapicId = CONFIG_MAX_CPUS + 1;</span><br><span style="color: hsl(120, 100%, 40%);">+ LateParams->GnbLateConfiguration.FchIoapicId = CONFIG_MAX_CPUS;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> timestamp_add_now(TS_AGESA_INIT_LATE_START);</span><br><span> Status = AmdInitLate(LateParams);</span><br><span> timestamp_add_now(TS_AGESA_INIT_LATE_DONE);</span><br><span>diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc</span><br><span>index a8db2c2..c54b652 100644</span><br><span>--- a/src/soc/amd/stoneyridge/Makefile.inc</span><br><span>+++ b/src/soc/amd/stoneyridge/Makefile.inc</span><br><span>@@ -97,6 +97,7 @@</span><br><span> ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c</span><br><span> ramstage-y += gpio.c</span><br><span> ramstage-y += hda.c</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-y += iommu.c</span><br><span> ramstage-y += monotonic_timer.c</span><br><span> ramstage-y += southbridge.c</span><br><span> ramstage-y += sb_util.c</span><br><span>diff --git a/src/soc/amd/stoneyridge/iommu.c b/src/soc/amd/stoneyridge/iommu.c</span><br><span>new file mode 100644</span><br><span>index 0000000..8c45457</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/amd/stoneyridge/iommu.c</span><br><span>@@ -0,0 +1,60 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2013 Rudolf Marek <r.marek@assembler.cz></span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/device.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pci.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pci_ids.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pci_ops.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <lib.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void iommu_read_resources(struct device *dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ struct resource *res;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Get the normal pci resources of this device */</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_dev_read_resources(dev);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Add an extra subtractive resource for both memory and I/O. */</span><br><span style="color: hsl(120, 100%, 40%);">+ res = new_resource(dev, 0x44);</span><br><span style="color: hsl(120, 100%, 40%);">+ res->size = 512 * 1024;</span><br><span style="color: hsl(120, 100%, 40%);">+ res->align = log2(res->size);</span><br><span style="color: hsl(120, 100%, 40%);">+ res->gran = log2(res->size);</span><br><span style="color: hsl(120, 100%, 40%);">+ res->limit = 0xffffffff; /* 4G */</span><br><span style="color: hsl(120, 100%, 40%);">+ res->flags = IORESOURCE_MEM;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void iommu_set_resources(struct device *dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_dev_set_resources(dev);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static struct pci_operations lops_pci = {</span><br><span style="color: hsl(120, 100%, 40%);">+ .set_subsystem = pci_dev_set_subsystem,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static struct device_operations iommu_ops = {</span><br><span style="color: hsl(120, 100%, 40%);">+ .read_resources = iommu_read_resources,</span><br><span style="color: hsl(120, 100%, 40%);">+ .set_resources = iommu_set_resources,</span><br><span style="color: hsl(120, 100%, 40%);">+ .enable_resources = pci_dev_enable_resources,</span><br><span style="color: hsl(120, 100%, 40%);">+ .init = 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ .scan_bus = 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ .ops_pci = &lops_pci,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static const struct pci_driver iommu_driver __pci_driver = {</span><br><span style="color: hsl(120, 100%, 40%);">+ .ops = &iommu_ops,</span><br><span style="color: hsl(120, 100%, 40%);">+ .vendor = PCI_VENDOR_ID_AMD,</span><br><span style="color: hsl(120, 100%, 40%);">+ .device = PCI_DEVICE_ID_AMD_15H_MODEL_707F_NB_IOMMU,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span>diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c</span><br><span>index 912daa0..95c2a07 100644</span><br><span>--- a/src/soc/amd/stoneyridge/northbridge.c</span><br><span>+++ b/src/soc/amd/stoneyridge/northbridge.c</span><br><span>@@ -508,7 +508,7 @@</span><br><span> </span><br><span> void SetNbEnvParams(GNB_ENV_CONFIGURATION *params)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- params->IommuSupport = FALSE;</span><br><span style="color: hsl(120, 100%, 40%);">+ params->IommuSupport = TRUE;</span><br><span> set_board_env_params(params);</span><br><span> }</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28753">change 28753</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I688d867c7bd4949a57b27c1b6a793c6a6e4a717a </div>
<div style="display:none"> Gerrit-Change-Number: 28753 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marc Jones <marc@marcjonesconsulting.com> </div>