<p>PraveenX Hodagatta Pranesh <strong>uploaded patch set #2</strong> to this change.</p><p><a href="https://review.coreboot.org/28718">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/cannonlake: Add new cannon lake PCH-H support<br><br>Cannon lake PCH-H is added to support coffeelake RVP11 and coffeelake<br>RVP8 platforms.<br><br>- Add new device IDs for LPC, PCIE, PMC, I2C, UART, SMBUS, XHCI, P2SB,<br>  SRAM, AUDIO, CSE0, XDCI, SD, Northbridge and Graphics device.<br><br>- Add new device IDs to intel common code respectively.<br><br>- Add CPU,LPC,GD,MCH entry to report_platform.c to identify RVP11 & RVP8.<br><br>- CNL PCH-H supports 24 pcie root ports and 4 I2C controllers, hence chip.c<br>  is modified accordingly.<br><br>- Add board type UserBd UPD to BOARD_TYPE_DESKTOP for both RVP11 & RVP8.<br><br>BUG=None<br>TEST=successfully boot both CFL RVP11 & RVP8, verified all the enabled devices<br>     are enumerated and cross checked devices ids in serial logs and UEFI shell.<br><br>Change-Id: I4b6af88d467382250aecb4102878b1c5af92ccd4<br>Signed-off-by: praveen hodagatta pranesh <praveenx.hodagatta.pranesh@intel.com><br>---<br>M src/include/device/pci_ids.h<br>M src/soc/intel/cannonlake/Kconfig<br>M src/soc/intel/cannonlake/bootblock/report_platform.c<br>M src/soc/intel/cannonlake/chip.c<br>M src/soc/intel/cannonlake/include/soc/pci_devs.h<br>M src/soc/intel/cannonlake/romstage/romstage.c<br>M src/soc/intel/common/block/cse/cse.c<br>M src/soc/intel/common/block/dsp/dsp.c<br>M src/soc/intel/common/block/graphics/graphics.c<br>M src/soc/intel/common/block/i2c/i2c.c<br>M src/soc/intel/common/block/lpc/lpc.c<br>M src/soc/intel/common/block/p2sb/p2sb.c<br>M src/soc/intel/common/block/pcie/pcie.c<br>M src/soc/intel/common/block/pmc/pmc.c<br>M src/soc/intel/common/block/scs/sd.c<br>M src/soc/intel/common/block/systemagent/systemagent.c<br>M src/soc/intel/common/block/uart/uart.c<br>M src/soc/intel/common/block/xdci/xdci.c<br>M src/soc/intel/common/block/xhci/xhci.c<br>19 files changed, 148 insertions(+), 14 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/28718/2</pre><p>To view, visit <a href="https://review.coreboot.org/28718">change 28718</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28718"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newpatchset </div>
<div style="display:none"> Gerrit-Change-Id: I4b6af88d467382250aecb4102878b1c5af92ccd4 </div>
<div style="display:none"> Gerrit-Change-Number: 28718 </div>
<div style="display:none"> Gerrit-PatchSet: 2 </div>
<div style="display:none"> Gerrit-Owner: PraveenX Hodagatta Pranesh <praveenx.hodagatta.pranesh@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>