<p>Martin Roth <strong>merged</strong> this change.</p><p><a href="https://review.coreboot.org/28692">View Change</a></p><div style="white-space:pre-wrap">Approvals:
build bot (Jenkins): Verified
Jonathan Neuschäfer: Looks good to me, approved
</div><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/broadwell: Don't use device_t<br><br>Use of device_t is deprecated.<br><br>Change-Id: Ifdf3d1870500812a417eaa5e93fcc168629c094f<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>Reviewed-on: https://review.coreboot.org/28692<br>Tested-by: build bot (Jenkins) <no-reply@coreboot.org><br>Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net><br>---<br>M src/soc/intel/broadwell/include/soc/pch.h<br>M src/soc/intel/broadwell/include/soc/xhci.h<br>M src/soc/intel/broadwell/pch.c<br>M src/soc/intel/broadwell/xhci.c<br>4 files changed, 9 insertions(+), 9 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/broadwell/include/soc/pch.h b/src/soc/intel/broadwell/include/soc/pch.h</span><br><span>index 690af9f..19ba2e0b 100644</span><br><span>--- a/src/soc/intel/broadwell/include/soc/pch.h</span><br><span>+++ b/src/soc/intel/broadwell/include/soc/pch.h</span><br><span>@@ -43,6 +43,6 @@</span><br><span> int pch_is_wpt_ulx(void);</span><br><span> u32 pch_read_soft_strap(int id);</span><br><span> void pch_log_state(void);</span><br><span style="color: hsl(0, 100%, 40%);">-void pch_disable_devfn(device_t dev);</span><br><span style="color: hsl(120, 100%, 40%);">+void pch_disable_devfn(struct device *dev);</span><br><span> </span><br><span> #endif</span><br><span>diff --git a/src/soc/intel/broadwell/include/soc/xhci.h b/src/soc/intel/broadwell/include/soc/xhci.h</span><br><span>index cf1b135..33e4c2d 100644</span><br><span>--- a/src/soc/intel/broadwell/include/soc/xhci.h</span><br><span>+++ b/src/soc/intel/broadwell/include/soc/xhci.h</span><br><span>@@ -51,7 +51,7 @@</span><br><span> #define XHCI_PLSW_ENABLE (5 << 5) /* Transition from disabled */</span><br><span> </span><br><span> #ifdef __SMM__</span><br><span style="color: hsl(0, 100%, 40%);">-void usb_xhci_sleep_prepare(device_t dev, u8 slp_typ);</span><br><span style="color: hsl(120, 100%, 40%);">+void usb_xhci_sleep_prepare(pci_devfn_t dev, u8 slp_typ);</span><br><span> #endif</span><br><span> </span><br><span> #endif</span><br><span>diff --git a/src/soc/intel/broadwell/pch.c b/src/soc/intel/broadwell/pch.c</span><br><span>index a8b25cf..c5df1ad 100644</span><br><span>--- a/src/soc/intel/broadwell/pch.c</span><br><span>+++ b/src/soc/intel/broadwell/pch.c</span><br><span>@@ -77,7 +77,7 @@</span><br><span> #ifndef __PRE_RAM__</span><br><span> </span><br><span> /* Put device in D3Hot Power State */</span><br><span style="color: hsl(0, 100%, 40%);">-static void pch_enable_d3hot(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pch_enable_d3hot(struct device *dev)</span><br><span> {</span><br><span> u32 reg32 = pci_read_config32(dev, PCH_PCS);</span><br><span> reg32 |= PCH_PCS_PS_D3HOT;</span><br><span>@@ -92,7 +92,7 @@</span><br><span> }</span><br><span> </span><br><span> /* Set bit in Function Disable register to hide this device */</span><br><span style="color: hsl(0, 100%, 40%);">-void pch_disable_devfn(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+void pch_disable_devfn(struct device *dev)</span><br><span> {</span><br><span> switch (dev->path.pci.devfn) {</span><br><span> case PCH_DEVFN_ADSP: /* Audio DSP */</span><br><span>@@ -183,7 +183,7 @@</span><br><span> }</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void broadwell_pch_enable_dev(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+void broadwell_pch_enable_dev(struct device *dev)</span><br><span> {</span><br><span> u32 reg32;</span><br><span> </span><br><span>diff --git a/src/soc/intel/broadwell/xhci.c b/src/soc/intel/broadwell/xhci.c</span><br><span>index 75a63cf..8b4c7b1 100644</span><br><span>--- a/src/soc/intel/broadwell/xhci.c</span><br><span>+++ b/src/soc/intel/broadwell/xhci.c</span><br><span>@@ -25,7 +25,7 @@</span><br><span> #include <soc/cpu.h></span><br><span> </span><br><span> #ifdef __SMM__</span><br><span style="color: hsl(0, 100%, 40%);">-static u8 *usb_xhci_mem_base(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static u8 *usb_xhci_mem_base(pci_devfn_t dev)</span><br><span> {</span><br><span> u32 mem_base = pci_read_config32(dev, PCI_BASE_ADDRESS_0);</span><br><span> </span><br><span>@@ -36,7 +36,7 @@</span><br><span> return (u8 *)(mem_base & ~0xf);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static int usb_xhci_port_count_usb3(device_t dev)</span><br><span style="color: hsl(120, 100%, 40%);">+static int usb_xhci_port_count_usb3(pci_devfn_t dev)</span><br><span> {</span><br><span> /* PCH-LP has 4 SS ports */</span><br><span> return 4;</span><br><span>@@ -69,7 +69,7 @@</span><br><span> * b) Poll for warm reset complete</span><br><span> * c) Write 1 to port change status bits</span><br><span> */</span><br><span style="color: hsl(0, 100%, 40%);">-static void usb_xhci_reset_usb3(device_t dev, int all)</span><br><span style="color: hsl(120, 100%, 40%);">+static void usb_xhci_reset_usb3(pci_devfn_t dev, int all)</span><br><span> {</span><br><span> u32 status, port_disabled;</span><br><span> int timeout, port;</span><br><span>@@ -140,7 +140,7 @@</span><br><span> }</span><br><span> </span><br><span> /* Handler for XHCI controller on entry to S3/S4/S5 */</span><br><span style="color: hsl(0, 100%, 40%);">-void usb_xhci_sleep_prepare(device_t dev, u8 slp_typ)</span><br><span style="color: hsl(120, 100%, 40%);">+void usb_xhci_sleep_prepare(pci_devfn_t dev, u8 slp_typ)</span><br><span> {</span><br><span> u16 reg16;</span><br><span> u32 reg32;</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28692">change 28692</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: merged </div>
<div style="display:none"> Gerrit-Change-Id: Ifdf3d1870500812a417eaa5e93fcc168629c094f </div>
<div style="display:none"> Gerrit-Change-Number: 28692 </div>
<div style="display:none"> Gerrit-PatchSet: 2 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>
<div style="display:none"> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer@gmx.net> </div>
<div style="display:none"> Gerrit-Reviewer: Martin Roth <martinroth@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>