<p>Jonathan Neuschäfer has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28665">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">[RFC] Documentation: Remove Kconfig.tex and related files<br><br>This part of our documentation has bitrotted for a long time.<br>Any remaining information should ideally be moved to<br>Documentation/getting_started/kconfig.md.<br><br>Change-Id: I3920d002813c2838285446dc0ed8dacfa5364581<br>Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net><br>---<br>M .gitignore<br>D Documentation/Kconfig.tex<br>M Documentation/Makefile<br>3 files changed, 3 insertions(+), 511 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/28665/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/.gitignore b/.gitignore</span><br><span>index 7523a5f..6801bcd 100644</span><br><span>--- a/.gitignore</span><br><span>+++ b/.gitignore</span><br><span>@@ -127,10 +127,6 @@</span><br><span> documentation/*.toc</span><br><span> documentation/*.out</span><br><span> documentation/*.pdf</span><br><span style="color: hsl(0, 100%, 40%);">-documentation/cpukconfig.tex</span><br><span style="color: hsl(0, 100%, 40%);">-documentation/mainboardkconfig.tex</span><br><span style="color: hsl(0, 100%, 40%);">-documentation/skconfig.tex</span><br><span style="color: hsl(0, 100%, 40%);">-documentation/socketfkconfig.tex</span><br><span> Documentation/_build</span><br><span> </span><br><span> doxygen/*</span><br><span>diff --git a/Documentation/Kconfig.tex b/Documentation/Kconfig.tex</span><br><span>deleted file mode 100644</span><br><span>index bac8f2b..0000000</span><br><span>--- a/Documentation/Kconfig.tex</span><br><span>+++ /dev/null</span><br><span>@@ -1,480 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-\documentclass[10pt,letterpaper]{article}</span><br><span style="color: hsl(0, 100%, 40%);">-\usepackage[latin1]{inputenc}</span><br><span style="color: hsl(0, 100%, 40%);">-\usepackage{amsmath}</span><br><span style="color: hsl(0, 100%, 40%);">-\usepackage{amsfonts}</span><br><span style="color: hsl(0, 100%, 40%);">-\usepackage{amssymb}</span><br><span style="color: hsl(0, 100%, 40%);">-\author{Ron Minnich}</span><br><span style="color: hsl(0, 100%, 40%);">-\title{Kconfig usage in coreboot v2}</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{document}</span><br><span style="color: hsl(0, 100%, 40%);">-\section{Introduction}</span><br><span style="color: hsl(0, 100%, 40%);">-This document describes how to use Kconfig in v2. We describe our usage of Kconfig files, Makefile.inc files, when and where to use them, how to use them, and, interestingly, when and where not to use them.</span><br><span style="color: hsl(0, 100%, 40%);">-\section{Kconfig variations}</span><br><span style="color: hsl(0, 100%, 40%);">-Most Kconfig files set variables, which can be set as part of the Kconfig dialog. Not all Kconfig variables are set by the user, however; some are too dangerous. These are merely enabled by the mainboard.</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-For variables set by the user, see src/console/Kconfig.</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-For variables not set by the user, see src/mainboard/amd/serengeti\_cheetah/Kconfig. Users should never set such variables as the cache as RAM base. These are highly mainboard dependent.</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-Kconfig files use the source command to include subdirectories. In most cases, save for limited cases described below, subdirectories have Kconfig files. They are always sourced unconditionally.</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\section{Makefile and Makefile.inc}</span><br><span style="color: hsl(0, 100%, 40%);">-There is only one Makefile, at the top level. All other makefiles are included as Makefile.inc. All the next-level Makefile.inc files are selected in the top level Makefile. Directories that are platform-independent are in BUILD-y; platform-dependent (e.g. Makefile.inc's that depend on architecture) are included in PLATFORM-y.</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-Make is not recursive. There is only one make process.</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{subdirs usage}</span><br><span style="color: hsl(0, 100%, 40%);">-Further includes of Makefile.inc, if needed, are done via subdirs-y commands. As in Linux, the subdirs can be conditional or unconditional. Conditional includes are done via subdirs-\$(CONFIG\_VARIABLE) usage; unconditional are done via subdirs-y.</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-We define the common rules for which variation to use below.</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{object file specification}</span><br><span style="color: hsl(0, 100%, 40%);">-There are several different types of objects specified in the tree. They are:</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{description}</span><br><span style="color: hsl(0, 100%, 40%);">-\item[obj]objects for the RAM part of the code</span><br><span style="color: hsl(0, 100%, 40%);">-\item[driver]drivers for the RAM part. Drivers are not represented in the device tree but do have a driver struct attached in the driver section.</span><br><span style="color: hsl(0, 100%, 40%);">-\item[initobj]seperately-compiled code for the ROM section of coreboot</span><br><span style="color: hsl(0, 100%, 40%);">-\end{description}</span><br><span style="color: hsl(0, 100%, 40%);">-These items are specified via the -y syntax as well. Conditional object inclusion is done via the -\$(CONFIG\_VARIABLE) syntax.</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\section{Example: AMD serengeti cheetah}</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{mainboard/Kconfig}</span><br><span style="color: hsl(0, 100%, 40%);">-Defines Vendor variables. Currently defined variables are:</span><br><span style="color: hsl(0, 100%, 40%);">-Sources all Kconfig files in the vendor directories.</span><br><span style="color: hsl(0, 100%, 40%);">-\input{ mainboardkconfig.tex}</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{mainboard/Makefile.inc}</span><br><span style="color: hsl(0, 100%, 40%);">-There is none at this time.</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{mainboard/$<$vendor$>$/Kconfig}</span><br><span style="color: hsl(0, 100%, 40%);">-We use the amd as a model. The only action currently taken is to source all Kconfig's in the</span><br><span style="color: hsl(0, 100%, 40%);">-subdirectories.</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{mainboard/$<$vendor$>$/Makefile.inc}</span><br><span style="color: hsl(0, 100%, 40%);">-We use amd as a model. There is currently no Makefile.inc at this level.</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{mainboard/$<$vendor$>$/$<$board$>$/Kconfig}</span><br><span style="color: hsl(0, 100%, 40%);">-The mainboard Kconfig and Makefile.inc are designed to be the heart of the build. The defines</span><br><span style="color: hsl(0, 100%, 40%);">-and rules in here determine everything about how a mainboard target is built.</span><br><span style="color: hsl(0, 100%, 40%);">-We will use serengeti\_cheetah as a model. It defines these variables.</span><br><span style="color: hsl(0, 100%, 40%);">-\input{ mainboardkconfig.tex}</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{mainboard/$<$vendor$>$/$<$board$>$/Makefile.inc}</span><br><span style="color: hsl(0, 100%, 40%);">-This is a fairly complex Makefile.inc. Because this is such a critical component, we are going to excerpt and take it piece by piece.</span><br><span style="color: hsl(0, 100%, 40%);">-Note that this is the mainboard as of August, 2009, and it may change over time.</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{objects}</span><br><span style="color: hsl(0, 100%, 40%);">-We define objects in the first part. The mainbard itself is a driver and included unconditionally. Other objects are conditional:</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-driver-y += mainboard.o</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#needed by irq_tables and mptable and acpi_tables</span><br><span style="color: hsl(0, 100%, 40%);">-obj-y += get_bus_conf.o</span><br><span style="color: hsl(0, 100%, 40%);">-obj-$(CONFIG_HAVE_MP_TABLE) += mptable.o</span><br><span style="color: hsl(0, 100%, 40%);">-obj-$(CONFIG_HAVE_PIRQ_TABLE) += irq_tables.o</span><br><span style="color: hsl(0, 100%, 40%);">-obj-$(CONFIG_HAVE_ACPI_TABLES) += dsdt.o</span><br><span style="color: hsl(0, 100%, 40%);">-obj-$(CONFIG_HAVE_ACPI_TABLES) += acpi_tables.o</span><br><span style="color: hsl(0, 100%, 40%);">-obj-$(CONFIG_HAVE_ACPI_TABLES) += fadt.o</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#./ssdt.o is in northbridge/amd/amdk8/Config.lb</span><br><span style="color: hsl(0, 100%, 40%);">-obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt2.o</span><br><span style="color: hsl(0, 100%, 40%);">-obj-$(CONFIG_ACPI_SSDTX_NUM) += ssdt3.o</span><br><span style="color: hsl(0, 100%, 40%);">-obj-$(CONFIG_HAVE_ACPI_TABLES) += ssdt4.o</span><br><span style="color: hsl(0, 100%, 40%);">-driver-y += ../../../drivers/i2c/i2cmux/i2cmux.o</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-# This is part of the conversion to init-obj and away from included code.</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-initobj-y += crt0.o</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{romcc legacy support}</span><br><span style="color: hsl(0, 100%, 40%);">-We hope to move away from romcc soon, but for now, if one is using romcc, the Makefile.inc must define</span><br><span style="color: hsl(0, 100%, 40%);">-crt0 include files (assembly code for startup, usually); and several ldscripts. These are taken directly from the</span><br><span style="color: hsl(0, 100%, 40%);">-old Config.lb. Note that these use the -y syntax and can use the ability to be included conditionally.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-crt0-y += ../../../../src/cpu/x86/16bit/entry16.inc</span><br><span style="color: hsl(0, 100%, 40%);">-crt0-y += ../../../../src/cpu/x86/32bit/entry32.inc</span><br><span style="color: hsl(0, 100%, 40%);">-crt0-y += ../../../../src/cpu/x86/16bit/reset16.inc</span><br><span style="color: hsl(0, 100%, 40%);">-crt0-y += ../../../../src/arch/i386/lib/id.inc</span><br><span style="color: hsl(0, 100%, 40%);">-crt0-y += ../../../../src/cpu/amd/car/cache_as_ram.inc</span><br><span style="color: hsl(0, 100%, 40%);">-crt0-y += auto.inc</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-ldscript-y += ../../../../src/arch/i386/init/ldscript_fallback_cbfs.lb</span><br><span style="color: hsl(0, 100%, 40%);">-ldscript-y += ../../../../src/cpu/x86/16bit/entry16.lds</span><br><span style="color: hsl(0, 100%, 40%);">-ldscript-y += ../../../../src/cpu/x86/16bit/reset16.lds</span><br><span style="color: hsl(0, 100%, 40%);">-ldscript-y += ../../../../src/arch/i386/lib/id.lds</span><br><span style="color: hsl(0, 100%, 40%);">-ldscript-y += ../../../../src/arch/i386/lib/failover.lds</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{POST\_EVALUATION}</span><br><span style="color: hsl(0, 100%, 40%);">-POST\_EVALUATION rules should be placed after this section:</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-ifdef POST_EVALUATION</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-to ensure that the values of variables are correct.</span><br><span style="color: hsl(0, 100%, 40%);">-Here are the post-evaluation rules for this mainboard:</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-$(obj)/dsdt.c: $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl</span><br><span style="color: hsl(0, 100%, 40%);">- iasl -p dsdt -tc $(src)/mainboard/$(MAINBOARDDIR)/dsdt.asl</span><br><span style="color: hsl(0, 100%, 40%);">- mv dsdt.hex $@</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-$(obj)/mainboard/$(MAINBOARDDIR)/dsdt.o: $(obj)/dsdt.c</span><br><span style="color: hsl(0, 100%, 40%);">- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c $< -o $@</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-$(obj)/ssdt2.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci2.asl</span><br><span style="color: hsl(0, 100%, 40%);">- iasl -p $(CURDIR)/pci2 -tc $(CONFIG_MAINBOARD)/dx/pci2.asl</span><br><span style="color: hsl(0, 100%, 40%);">- perl -pi -e 's/AmlCode/AmlCode_ssdt2/g' pci2.hex</span><br><span style="color: hsl(0, 100%, 40%);">- mv pci2.hex ssdt2.c</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-$(obj)/ssdt3.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci3.asl"</span><br><span style="color: hsl(0, 100%, 40%);">- iasl -p $(CURDIR)/pci3 -tc $(CONFIG_MAINBOARD)/</span><br><span style="color: hsl(0, 100%, 40%);">- perl -pi -e 's/AmlCode/AmlCode_ssdt3/g' pci3.hex</span><br><span style="color: hsl(0, 100%, 40%);">- mv pci3.hex ssdt3.c</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-$(obj)/ssdt4.c: $(src)/mainboard/$(MAINBOARDDIR)/dx/pci4.asl"</span><br><span style="color: hsl(0, 100%, 40%);">- iasl -p $(CURDIR)/pci4 -tc $(CONFIG_MAINBOARD)/dx/pci4.asl</span><br><span style="color: hsl(0, 100%, 40%);">- perl -pi -e 's/AmlCode/AmlCode_ssdt4/g' pci4.hex</span><br><span style="color: hsl(0, 100%, 40%);">- mv pci4.hex ssdt4.c</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-$(obj)/mainboard/$(MAINBOARDDIR)/auto.inc: $(src)/mainboard/$(MAINBOARDDIR)/rom.c $(obj)/option_table.h</span><br><span style="color: hsl(0, 100%, 40%);">- $(CC) $(DISTRO_CFLAGS) $(CFLAGS) $(CPPFLAGS) $(DEBUG_CFLAGS) -I$(src) -I. -c -S $(src)/mainboard/$(MAINBOARDDIR)/rom.c -o $@</span><br><span style="color: hsl(0, 100%, 40%);">- perl -e 's/\.rodata/.rom.data/g' -pi $@</span><br><span style="color: hsl(0, 100%, 40%);">- perl -e 's/\.text/.section .rom.text/g' -pi $@</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-The last rule is for romcc, and, again, we hope to eliminate romcc usage and this rule soon. The first set of rules concern ACPI tables.</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{devicetree.cb}</span><br><span style="color: hsl(0, 100%, 40%);">-Most of the old Config.lb is gone, but one piece remains: the device tree specification. This tree is still required to build a mainboard</span><br><span style="color: hsl(0, 100%, 40%);">-properly, as it defines topology and chips that can be defined no other way.</span><br><span style="color: hsl(0, 100%, 40%);">-Let's go through the tree.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-chip northbridge/amd/amdk8/root_complex</span><br><span style="color: hsl(0, 100%, 40%);">- device cpu_cluster 0 on</span><br><span style="color: hsl(0, 100%, 40%);">- chip cpu/amd/socket_F</span><br><span style="color: hsl(0, 100%, 40%);">- device lapic 0 on end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-This topology is always somewhat confusing to newcomers, and even to coreboot veterans.</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-We root the tree at the pci-e {\it root complex}. There is always the question of how and where to root the tree. Over the years we</span><br><span style="color: hsl(0, 100%, 40%);">-have found that the one part that never goes away is the root complex. CPU sockets may be empty or full; but there is always a northbridge</span><br><span style="color: hsl(0, 100%, 40%);">-somewhere, since it runs memory.</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-What is the APIC? Northbridges always have an Advanced Programmable Interrupt Controller, and that {\it APIC cluster} is a topological connection to the</span><br><span style="color: hsl(0, 100%, 40%);">-CPU socket. So the tree is rooted at the northbridge, which has a link to a CPU cluster, and then the CPU. The CPU contains</span><br><span style="color: hsl(0, 100%, 40%);">-its own APIC, and will define any parameters needed. In this case, we have a northbridge of type</span><br><span style="color: hsl(0, 100%, 40%);">-{\it northbridge/amd/amdk8/root\_complex}, with its own cpu\_cluster device which we turn on,</span><br><span style="color: hsl(0, 100%, 40%);">-which connects to a {\it cpu/amd/socket\_F},</span><br><span style="color: hsl(0, 100%, 40%);">-which has a local apic, which is on.</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-Note that we do not enumerate all CPUs, even on this SMP mainboard. The reason is they may not all be there. The CPU we define here</span><br><span style="color: hsl(0, 100%, 40%);">-is the so-called Boot Strap Processor, or BSP; the other CPUs will come along later, as the are discovered. We do not require (unlike many</span><br><span style="color: hsl(0, 100%, 40%);">-BIOSes) that the BSP be CPU 0; any CPU will do.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">- device domain 0 on</span><br><span style="color: hsl(0, 100%, 40%);">- chip northbridge/amd/amdk8</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 18.0 on # northbridge</span><br><span style="color: hsl(0, 100%, 40%);">- # devices on link 0, link 0 == LDT 0</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-Here begins the pci domain, which usually starts with 0. Then there is the northbridge, which bridges to the PCI bus. On</span><br><span style="color: hsl(0, 100%, 40%);">-Opterons, certain CPU control registers are managed in PCI config space in device 18.0 (BSP), 19.0 (AP), and up.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">- chip southbridge/amd/amd8132</span><br><span style="color: hsl(0, 100%, 40%);">- # the on/off keyword is mandatory</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 0.0 on end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 0.1 on end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1.0 on end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1.1 on end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-This is the 8132, a bridge to a secondary PCI bus.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">- chip southbridge/amd/amd8111</span><br><span style="color: hsl(0, 100%, 40%);">- # this "device pci 0.0" is the parent the next one</span><br><span style="color: hsl(0, 100%, 40%);">- # PCI bridge</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 0.0 on</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 0.0 on end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 0.1 on end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 0.2 off end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1.0 off end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-The 8111 is a bridge to other busses and to the legacy ISA devices such as superio.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1.0 on</span><br><span style="color: hsl(0, 100%, 40%);">- chip superio/winbond/w83627hf</span><br><span style="color: hsl(0, 100%, 40%);">- device pnp 2e.0 off # Floppy</span><br><span style="color: hsl(0, 100%, 40%);">- io 0x60 = 0x3f0</span><br><span style="color: hsl(0, 100%, 40%);">- irq 0x70 = 6</span><br><span style="color: hsl(0, 100%, 40%);">- drq 0x74 = 2</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- device pnp 2e.1 off # Parallel Port</span><br><span style="color: hsl(0, 100%, 40%);">- io 0x60 = 0x378</span><br><span style="color: hsl(0, 100%, 40%);">- irq 0x70 = 7</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- device pnp 2e.2 on # Com1</span><br><span style="color: hsl(0, 100%, 40%);">- io 0x60 = 0x3f8</span><br><span style="color: hsl(0, 100%, 40%);">- irq 0x70 = 4</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- device pnp 2e.3 off # Com2</span><br><span style="color: hsl(0, 100%, 40%);">- io 0x60 = 0x2f8</span><br><span style="color: hsl(0, 100%, 40%);">- irq 0x70 = 3</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- device pnp 2e.5 on # Keyboard</span><br><span style="color: hsl(0, 100%, 40%);">- io 0x60 = 0x60</span><br><span style="color: hsl(0, 100%, 40%);">- io 0x62 = 0x64</span><br><span style="color: hsl(0, 100%, 40%);">- irq 0x70 = 1</span><br><span style="color: hsl(0, 100%, 40%);">- irq 0x72 = 12</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- device pnp 2e.6 off # CIR</span><br><span style="color: hsl(0, 100%, 40%);">- io 0x60 = 0x100</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- device pnp 2e.7 off # GAME_MIDI_GIPO1</span><br><span style="color: hsl(0, 100%, 40%);">- io 0x60 = 0x220</span><br><span style="color: hsl(0, 100%, 40%);">- io 0x62 = 0x300</span><br><span style="color: hsl(0, 100%, 40%);">- irq 0x70 = 9</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- device pnp 2e.8 off end # GPIO2</span><br><span style="color: hsl(0, 100%, 40%);">- device pnp 2e.9 off end # GPIO3</span><br><span style="color: hsl(0, 100%, 40%);">- device pnp 2e.a off end # ACPI</span><br><span style="color: hsl(0, 100%, 40%);">- device pnp 2e.b on # HW Monitor</span><br><span style="color: hsl(0, 100%, 40%);">- io 0x60 = 0x290</span><br><span style="color: hsl(0, 100%, 40%);">- irq 0x70 = 5</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-The pnp refers to the many Plug N Play devices on a superio. 2e refers to the base I/O address of the superio, and the number following the</span><br><span style="color: hsl(0, 100%, 40%);">-2e (i.e. 2e.1) is the Logical Device Number, or LDN. Each LDN has a common configuration (base, irq, etc.) and these are set by the statements under the LDN.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1.1 on end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1.2 on end</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-More devices. These statements set up placeholders in the device tree.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1.3 on</span><br><span style="color: hsl(0, 100%, 40%);">- chip drivers/i2c/i2cmux # pca9556 smbus mux</span><br><span style="color: hsl(0, 100%, 40%);">- device i2c 18 on #0 pca9516 1</span><br><span style="color: hsl(0, 100%, 40%);">- chip drivers/generic/generic #dimm 0-0-0</span><br><span style="color: hsl(0, 100%, 40%);">- device i2c 50 on end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- chip drivers/generic/generic #dimm 0-0-1</span><br><span style="color: hsl(0, 100%, 40%);">- device i2c 51 on end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- chip drivers/generic/generic #dimm 0-1-0</span><br><span style="color: hsl(0, 100%, 40%);">- device i2c 52 on end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- chip drivers/generic/generic #dimm 0-1-1</span><br><span style="color: hsl(0, 100%, 40%);">- device i2c 53 on end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- device i2c 18 on #1 pca9516 2</span><br><span style="color: hsl(0, 100%, 40%);">- chip drivers/generic/generic #dimm 1-0-0</span><br><span style="color: hsl(0, 100%, 40%);">- device i2c 50 on end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- chip drivers/generic/generic #dimm 1-0-1</span><br><span style="color: hsl(0, 100%, 40%);">- device i2c 51 on end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- chip drivers/generic/generic #dimm 1-1-0</span><br><span style="color: hsl(0, 100%, 40%);">- device i2c 52 on end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- chip drivers/generic/generic #dimm 1-1-1</span><br><span style="color: hsl(0, 100%, 40%);">- device i2c 53 on end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- chip drivers/generic/generic #dimm 1-2-0</span><br><span style="color: hsl(0, 100%, 40%);">- device i2c 54 on end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- chip drivers/generic/generic #dimm 1-2-1</span><br><span style="color: hsl(0, 100%, 40%);">- device i2c 55 on end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- chip drivers/generic/generic #dimm 1-3-0</span><br><span style="color: hsl(0, 100%, 40%);">- device i2c 56 on end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- chip drivers/generic/generic #dimm 1-3-1</span><br><span style="color: hsl(0, 100%, 40%);">- device i2c 57 on end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- end # acpi</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-These are the i2c devices.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1.5 off end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1.6 off end</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-More placeholders.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">- register "ide0_enable" = "1"</span><br><span style="color: hsl(0, 100%, 40%);">- register "ide1_enable" = "1"</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- end # device pci 18.0</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-These "register" commands set controls in the southbridge.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 18.0 on end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 18.0 on end</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-These are the other two hypertransport links.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 18.1 on end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 18.2 on end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 18.3 on end</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-The 18.1 devices are, again, northbridge control for various k8 functions.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- \end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-That's it for the BSP I/O and HT busses. Now we begin the AP busses. Not much here.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">- chip northbridge/amd/amdk8</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 19.0 on # northbridge</span><br><span style="color: hsl(0, 100%, 40%);">- chip southbridge/amd/amd8151</span><br><span style="color: hsl(0, 100%, 40%);">- # the on/off keyword is mandatory</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 0.0 on end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 1.0 on end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">- end # device pci 19.0</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 19.0 on end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 19.0 on end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 19.1 on end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 19.2 on end</span><br><span style="color: hsl(0, 100%, 40%);">- device pci 19.3 on end</span><br><span style="color: hsl(0, 100%, 40%);">- end</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{cpu socket}</span><br><span style="color: hsl(0, 100%, 40%);">-The CPU socket is the key link from mainboard to its CPUs. Since many models of CPU can go in a socket, the mainboard mentions only</span><br><span style="color: hsl(0, 100%, 40%);">-the socket, and the socket, in turn, references the various model CPUs which can be plugged into it. The socket is thus the focus</span><br><span style="color: hsl(0, 100%, 40%);">-of all defines and Makefile controls for building the CPU components of a board.</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{ cpu/Kconfig}</span><br><span style="color: hsl(0, 100%, 40%);">-Defines variables. Current variables are:</span><br><span style="color: hsl(0, 100%, 40%);">-\input{cpukconfig.tex}</span><br><span style="color: hsl(0, 100%, 40%);">-Sources all Kconfig files in the vendor directories.</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{ cpu/Makefile.inc}</span><br><span style="color: hsl(0, 100%, 40%);">-Unconditionally sources all Makefile.inc in the vendor directories.</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{cpu/$<$vendor$>$/Kconfig}</span><br><span style="color: hsl(0, 100%, 40%);">-The only action currently taken is to source all Kconfig's in the</span><br><span style="color: hsl(0, 100%, 40%);">-subdirectories.</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{cpu/$<$vendor$>$/Makefile.inc}</span><br><span style="color: hsl(0, 100%, 40%);">-{\em Conditionally} source the socket directories.</span><br><span style="color: hsl(0, 100%, 40%);">-Example:</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-subdirs-$(CONFIG_CPU_AMD_SOCKET_F) += socket_F</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-.</span><br><span style="color: hsl(0, 100%, 40%);">-CONFIG\_CPU\_AMD\_SOCKET\_F is set in a mainboard file.</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{cpu/$<$vendor$>$/$<$socket$>$/Kconfig}</span><br><span style="color: hsl(0, 100%, 40%);">-Set variables that relate to this {\em socket}, and {\em any models that plug into this socket}. Note that</span><br><span style="color: hsl(0, 100%, 40%);">-the socket, as much as possible, should control the models, because the models may plug into many sockets.</span><br><span style="color: hsl(0, 100%, 40%);">-Socket\_F currently sets:</span><br><span style="color: hsl(0, 100%, 40%);">-\input{socketfkconfig.tex}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-It sources only those Kconfigs that relate to this particular socket, i.e. not all possible models are sourced.</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{cpu/$<$vendor$>$/$<$model$>$/Kconfig}</span><br><span style="color: hsl(0, 100%, 40%);">-CPU Model Kconfigs only set variables, We do not expect that they will source any other Kconfig. The socket Kconfig should do that</span><br><span style="color: hsl(0, 100%, 40%);">-if needed.</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{cpu/$<$vendor$>$/$<$model$>$/Makefile.inc}</span><br><span style="color: hsl(0, 100%, 40%);">-The Makefile.inc {\em unconditionally} specifies drivers and objects to be included in the build. There is no conditional</span><br><span style="color: hsl(0, 100%, 40%);">-compilation at this point. IF a socket is included, it includes the models. If a model is included, it should include {em all}</span><br><span style="color: hsl(0, 100%, 40%);">-objects, because it is not possible to determine at build time what options may be needed for a given model CPU.</span><br><span style="color: hsl(0, 100%, 40%);">-This Makefile.inc includes no other Makefile.inc files; any inclusion should be done in the socket Makefile.inc.</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{northbridge}</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{northbridge/Kconfig}</span><br><span style="color: hsl(0, 100%, 40%);">-No variables. Source all vendor directory Kconfigs.</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{northbridge/Makefile.inc}</span><br><span style="color: hsl(0, 100%, 40%);">-No variables. unconditionally include all vendor Makefile.inc</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{northbridge/$<$vendor$>$/Kconfig}</span><br><span style="color: hsl(0, 100%, 40%);">-No variables. Source all chip directory Kconfigs.</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{northbridge/$<$vendor$>$/Makefile.inc}</span><br><span style="color: hsl(0, 100%, 40%);">-No variables. {\em Conditionally} include all chipset Makefile.inc. The variable</span><br><span style="color: hsl(0, 100%, 40%);">-is the name of the part, e.g.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-subdirs-$(CONFIG_NORTHBRIDGE_AMD_AMDK8) += amdk8</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-.</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{northbridge/$<$vendor$>$/$<$chip$>$/Kconfig}</span><br><span style="color: hsl(0, 100%, 40%);">-Typically a small number of variables. One defines the part name. Here is an example</span><br><span style="color: hsl(0, 100%, 40%);">-of the variables defined for the K8.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-config NORTHBRIDGE_AMD_AMDK8</span><br><span style="color: hsl(0, 100%, 40%);">- bool</span><br><span style="color: hsl(0, 100%, 40%);">- default n</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-config AGP_APERTURE_SIZE</span><br><span style="color: hsl(0, 100%, 40%);">- hex</span><br><span style="color: hsl(0, 100%, 40%);">- default 0x4000000</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{northbridge/$<$vendor$>$/$<$chip$>$/Makefile.inc}</span><br><span style="color: hsl(0, 100%, 40%);">-Typically very small set of rules, and very simple.</span><br><span style="color: hsl(0, 100%, 40%);">-Since this file is already conditionally included,</span><br><span style="color: hsl(0, 100%, 40%);">-we don't need to test for the chipset CONFIG variable. We</span><br><span style="color: hsl(0, 100%, 40%);">-can therefore test other variables (which is part of the reason</span><br><span style="color: hsl(0, 100%, 40%);">-we set up conditional inclusion of this file, instead</span><br><span style="color: hsl(0, 100%, 40%);">-of unconditionally including it). Here is an example from AMD K8.</span><br><span style="color: hsl(0, 100%, 40%);">-Note that we can make a variable conditional on the ACPI tables.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-driver-y += northbridge.o</span><br><span style="color: hsl(0, 100%, 40%);">-driver-y += misc_control.o</span><br><span style="color: hsl(0, 100%, 40%);">-obj-y += get_sblk_pci1234.o</span><br><span style="color: hsl(0, 100%, 40%);">-obj-$(CONFIG_HAVE_ACPI_TABLES) += amdk8_acpi.o</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{southbridge}</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{southbridge/Kconfig}</span><br><span style="color: hsl(0, 100%, 40%);">-No variables. Source all vendor directory Kconfigs.</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{southbridge/Makefile.inc}</span><br><span style="color: hsl(0, 100%, 40%);">-No variables. {\em Unconditionally} include all vendor Makefile.inc</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{southbridge/$<$vendor$>$/Kconfig}</span><br><span style="color: hsl(0, 100%, 40%);">-No variables. Source all chip directory Kconfigs.</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{southbridge/$<$vendor$>$/Makefile.inc}</span><br><span style="color: hsl(0, 100%, 40%);">-No variables. {\em Conditionally} include all chipset Makefile.inc. The variable</span><br><span style="color: hsl(0, 100%, 40%);">-is the name of the part, e.g.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-subdirs-$(CONFIG_SOUTHBRIDGE_AMD_AMD8111) += amd8111</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-.</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{southbridge/$<$vendor$>$/$<$chip$>$/Kconfig}</span><br><span style="color: hsl(0, 100%, 40%);">-Typically a small number of variables. One defines the part name. Here is an example</span><br><span style="color: hsl(0, 100%, 40%);">-of the variables defined for the K8.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-config SOUTHBRIDGE_AMD_AMD8111</span><br><span style="color: hsl(0, 100%, 40%);">- bool</span><br><span style="color: hsl(0, 100%, 40%);">- default n</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{southbridge/$<$vendor$>$/$<$chip$>$/Makefile.inc}</span><br><span style="color: hsl(0, 100%, 40%);">-Typically very small set of rules, and very simple.</span><br><span style="color: hsl(0, 100%, 40%);">-Since this file is already conditionally included,</span><br><span style="color: hsl(0, 100%, 40%);">-we don't need to test for the chipset CONFIG variable. We</span><br><span style="color: hsl(0, 100%, 40%);">-can therefore test other variables (which is part of the reason</span><br><span style="color: hsl(0, 100%, 40%);">-we set up conditional inclusion of this file, instead</span><br><span style="color: hsl(0, 100%, 40%);">-of unconditionally including it). Here is an example from AMD 8111.</span><br><span style="color: hsl(0, 100%, 40%);">-No conditionals in this one yet.</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-driver-y += amd8111.o</span><br><span style="color: hsl(0, 100%, 40%);">-driver-y += amd8111_usb.o</span><br><span style="color: hsl(0, 100%, 40%);">-driver-y += amd8111_lpc.o</span><br><span style="color: hsl(0, 100%, 40%);">-driver-y += amd8111_ide.o</span><br><span style="color: hsl(0, 100%, 40%);">-driver-y += amd8111_acpi.o</span><br><span style="color: hsl(0, 100%, 40%);">-driver-y += amd8111_usb2.o</span><br><span style="color: hsl(0, 100%, 40%);">-driver-y += amd8111_ac97.o</span><br><span style="color: hsl(0, 100%, 40%);">-driver-y += amd8111_nic.o</span><br><span style="color: hsl(0, 100%, 40%);">-driver-y += amd8111_pci.o</span><br><span style="color: hsl(0, 100%, 40%);">-driver-y += amd8111_smbus.o</span><br><span style="color: hsl(0, 100%, 40%);">-obj-y += amd8111_reset.o</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{vendor and part}</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{southbridge}</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{vendor and part}</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{superio}</span><br><span style="color: hsl(0, 100%, 40%);">-\subsection{drivers/i2c}</span><br><span style="color: hsl(0, 100%, 40%);">-This is a rather special case. There are no Kconfig files or Makefile.inc files here. They are not needed.</span><br><span style="color: hsl(0, 100%, 40%);">-To compile in one of these files, name the .o directory. E.g. in serengeti\_cheetah we have:</span><br><span style="color: hsl(0, 100%, 40%);">-\begin{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-\end{verbatim}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\subsubsection{vendor and part}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-\end{document}</span><br><span>diff --git a/Documentation/Makefile b/Documentation/Makefile</span><br><span>index 0fb21f5..ed08936 100644</span><br><span>--- a/Documentation/Makefile</span><br><span>+++ b/Documentation/Makefile</span><br><span>@@ -7,7 +7,7 @@</span><br><span> </span><br><span> FIGS=codeflow.pdf hypertransport.pdf</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-all: corebootPortingGuide.pdf Kconfig.pdf</span><br><span style="color: hsl(120, 100%, 40%);">+all: corebootPortingGuide.pdf</span><br><span> </span><br><span> SVG2PDF=$(shell which svg2pdf)</span><br><span> INKSCAPE=$(shell which inkscape)</span><br><span>@@ -39,30 +39,6 @@</span><br><span> corebootPortingGuide.pdf: $(FIGS) corebootBuildingGuide.tex corebootPortingGuide.toc</span><br><span> $(PDFLATEX) corebootBuildingGuide.tex</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-Kconfig.pdf: Kconfig.tex mainboardkconfig.tex cpukconfig.tex socketfkconfig.tex</span><br><span style="color: hsl(0, 100%, 40%);">- $(PDFLATEX) $<</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-# quick, somebody! make me a macro!</span><br><span style="color: hsl(0, 100%, 40%);">-mainboardkconfig.tex: ../src/mainboard/Kconfig</span><br><span style="color: hsl(0, 100%, 40%);">- cat beginverbatim.tex > $@</span><br><span style="color: hsl(0, 100%, 40%);">- grep '^config' $< | awk '{print $2}' >>$@</span><br><span style="color: hsl(0, 100%, 40%);">- cat endverbatim.tex >> $@</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-skconfig.tex: ../src/mainboard/amd/serengeti_cheetah/Kconfig</span><br><span style="color: hsl(0, 100%, 40%);">- cat beginverbatim.tex > $@</span><br><span style="color: hsl(0, 100%, 40%);">- grep '^config' $< | awk '{print $2}' >>$@</span><br><span style="color: hsl(0, 100%, 40%);">- cat endverbatim.tex >> $@</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-cpukconfig.tex: ../src/cpu/Kconfig</span><br><span style="color: hsl(0, 100%, 40%);">- cat beginverbatim.tex > $@</span><br><span style="color: hsl(0, 100%, 40%);">- grep '^config' $< | awk '{print $2}' >>$@</span><br><span style="color: hsl(0, 100%, 40%);">- cat endverbatim.tex >> $@</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-socketfkconfig.tex: ../src/cpu/amd/socket_F/Kconfig</span><br><span style="color: hsl(0, 100%, 40%);">- cat beginverbatim.tex > $@</span><br><span style="color: hsl(0, 100%, 40%);">- grep '^config' $< | awk '{print $2}' >>$@</span><br><span style="color: hsl(0, 100%, 40%);">- cat endverbatim.tex >> $@</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> sphinx:</span><br><span> $(MAKE) -f Makefile.sphinx html</span><br><span> </span><br><span>@@ -70,10 +46,10 @@</span><br><span> $(MAKE) -f Makefile.sphinx clean</span><br><span> </span><br><span> clean: clean-sphinx</span><br><span style="color: hsl(0, 100%, 40%);">- rm -f *.aux *.idx *.log *.toc *.out $(FIGS) mainboardkconfig.tex skconfig.tex cpukconfig.tex socketfkconfig.tex</span><br><span style="color: hsl(120, 100%, 40%);">+ rm -f *.aux *.idx *.log *.toc *.out $(FIGS)</span><br><span> </span><br><span> distclean: clean</span><br><span style="color: hsl(0, 100%, 40%);">- rm -f corebootPortingGuide.pdf Kconfig.pdf</span><br><span style="color: hsl(120, 100%, 40%);">+ rm -f corebootPortingGuide.pdf</span><br><span> </span><br><span> livesphinx:</span><br><span> $(MAKE) -f Makefile.sphinx livehtml</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28665">change 28665</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28665"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I3920d002813c2838285446dc0ed8dacfa5364581 </div>
<div style="display:none"> Gerrit-Change-Number: 28665 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer@gmx.net> </div>