<p>Matt DeVillier has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28613">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">google/buddy: Add board as variant of google/auron<br><br>Add google/buddy (Acer Chromeboase 24) as a variant of google/auron,<br>with the following changes:<br><br>- add buddy-specific variant code<br>- add handling to auron for buddy's lan init, which no other variants have<br>- add handling to auron's mainboard ACPI due buddy having different PCIe<br> port assigments than all other variants<br><br>Ported from Chromium branch firmware-buddy-6301.202.B, commit<br>ebb82ce [Buddy: Lock management engine + SPI descriptor]<br><br>Test: build/boot Linux on google/buddy using SeaBIOS and Tianocore payloads<br><br>Change-Id: Ib76eef47677b72ddaef81a2decef189a5f20c20a<br>Signed-off-by: Matt DeVillier <matt.devillier@gmail.com><br>---<br>M src/mainboard/google/auron/Kconfig<br>M src/mainboard/google/auron/Kconfig.name<br>M src/mainboard/google/auron/Makefile.inc<br>M src/mainboard/google/auron/acpi/mainboard.asl<br>M src/mainboard/google/auron/mainboard.c<br>M src/mainboard/google/auron/variant.h<br>A src/mainboard/google/auron/variants/buddy/devicetree.cb<br>A src/mainboard/google/auron/variants/buddy/include/variant/acpi/ec.asl<br>A src/mainboard/google/auron/variants/buddy/include/variant/acpi/mainboard.asl<br>A src/mainboard/google/auron/variants/buddy/include/variant/acpi/usb.asl<br>A src/mainboard/google/auron/variants/buddy/include/variant/gpio.h<br>A src/mainboard/google/auron/variants/buddy/include/variant/hda_verb.h<br>A src/mainboard/google/auron/variants/buddy/include/variant/onboard.h<br>A src/mainboard/google/auron/variants/buddy/include/variant/spd.h<br>A src/mainboard/google/auron/variants/buddy/include/variant/thermal.h<br>A src/mainboard/google/auron/variants/buddy/pei_data.c<br>A src/mainboard/google/auron/variants/buddy/spd/Makefile.inc<br>A src/mainboard/google/auron/variants/buddy/spd/spd.c<br>A src/mainboard/google/auron/variants/buddy/variant.c<br>19 files changed, 932 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/28613/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/auron/Kconfig b/src/mainboard/google/auron/Kconfig</span><br><span>index ea0e01f..095f181 100644</span><br><span>--- a/src/mainboard/google/auron/Kconfig</span><br><span>+++ b/src/mainboard/google/auron/Kconfig</span><br><span>@@ -12,7 +12,7 @@</span><br><span> select MAINBOARD_HAS_LPC_TPM</span><br><span> select MAINBOARD_HAS_TPM1</span><br><span> select INTEL_INT15</span><br><span style="color: hsl(0, 100%, 40%);">- select SYSTEM_TYPE_LAPTOP</span><br><span style="color: hsl(120, 100%, 40%);">+ select SYSTEM_TYPE_LAPTOP if !BOARD_GOOGLE_BUDDY</span><br><span> </span><br><span> if BOARD_GOOGLE_BASEBOARD_AURON</span><br><span> </span><br><span>@@ -32,6 +32,7 @@</span><br><span> string</span><br><span> default "auron_paine" if BOARD_GOOGLE_AURON_PAINE</span><br><span> default "auron_yuna" if BOARD_GOOGLE_AURON_YUNA</span><br><span style="color: hsl(120, 100%, 40%);">+ default "buddy" if BOARD_GOOGLE_BUDDY</span><br><span> default "gandof" if BOARD_GOOGLE_GANDOF</span><br><span> default "lulu" if BOARD_GOOGLE_LULU</span><br><span> default "samus" if BOARD_GOOGLE_SAMUS</span><br><span>@@ -40,6 +41,7 @@</span><br><span> string</span><br><span> default "Auron_Paine" if BOARD_GOOGLE_AURON_PAINE</span><br><span> default "Auron_Yuna" if BOARD_GOOGLE_AURON_YUNA</span><br><span style="color: hsl(120, 100%, 40%);">+ default "Buddy" if BOARD_GOOGLE_BUDDY</span><br><span> default "Gandof" if BOARD_GOOGLE_GANDOF</span><br><span> default "Lulu" if BOARD_GOOGLE_LULU</span><br><span> default "Samus" if BOARD_GOOGLE_SAMUS</span><br><span>@@ -49,6 +51,7 @@</span><br><span> depends on CHROMEOS</span><br><span> default "PAINE TEST A-A 8843" if BOARD_GOOGLE_AURON_PAINE</span><br><span> default "YUNA TEST A-A 3347" if BOARD_GOOGLE_AURON_YUNA</span><br><span style="color: hsl(120, 100%, 40%);">+ default "BUDDY TEST A-A 6186" if BOARD_GOOGLE_BUDDY</span><br><span> default "GANDOF TEST A-A 7705" if BOARD_GOOGLE_GANDOF</span><br><span> default "LULU TEST A-A 7705" if BOARD_GOOGLE_LULU</span><br><span> default "SAMUS TEST 8028" if BOARD_GOOGLE_SAMUS</span><br><span>@@ -57,6 +60,7 @@</span><br><span> string</span><br><span> default "variants/auron_paine/devicetree.cb" if BOARD_GOOGLE_AURON_PAINE</span><br><span> default "variants/auron_yuna/devicetree.cb" if BOARD_GOOGLE_AURON_YUNA</span><br><span style="color: hsl(120, 100%, 40%);">+ default "variants/buddy/devicetree.cb" if BOARD_GOOGLE_BUDDY</span><br><span> default "variants/gandof/devicetree.cb" if BOARD_GOOGLE_GANDOF</span><br><span> default "variants/lulu/devicetree.cb" if BOARD_GOOGLE_LULU</span><br><span> default "variants/samus/devicetree.cb" if BOARD_GOOGLE_SAMUS</span><br><span>diff --git a/src/mainboard/google/auron/Kconfig.name b/src/mainboard/google/auron/Kconfig.name</span><br><span>index 324c3ee..19fd4d7 100644</span><br><span>--- a/src/mainboard/google/auron/Kconfig.name</span><br><span>+++ b/src/mainboard/google/auron/Kconfig.name</span><br><span>@@ -8,6 +8,10 @@</span><br><span> bool "-> Auron_Yuna (Acer Chromebook 15 (C910/CB5-531))"</span><br><span> select BOARD_GOOGLE_BASEBOARD_AURON</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+config BOARD_GOOGLE_BUDDY</span><br><span style="color: hsl(120, 100%, 40%);">+ bool "-> Buddy (Acer Chromebase 24)"</span><br><span style="color: hsl(120, 100%, 40%);">+ select BOARD_GOOGLE_BASEBOARD_AURON</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> config BOARD_GOOGLE_GANDOF</span><br><span> bool "-> Gandof (Toshiba Chromebook 2 (2015))"</span><br><span> select BOARD_GOOGLE_BASEBOARD_AURON</span><br><span>diff --git a/src/mainboard/google/auron/Makefile.inc b/src/mainboard/google/auron/Makefile.inc</span><br><span>index d54a1c0..170e168 100644</span><br><span>--- a/src/mainboard/google/auron/Makefile.inc</span><br><span>+++ b/src/mainboard/google/auron/Makefile.inc</span><br><span>@@ -23,7 +23,9 @@</span><br><span> romstage-y += variants/$(VARIANT_DIR)/pei_data.c</span><br><span> ramstage-y += variants/$(VARIANT_DIR)/pei_data.c</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+ifneq ($(CONFIG_BOARD_GOOGLE_BUDDY),y)</span><br><span> romstage-y += variants/$(VARIANT_DIR)/variant.c</span><br><span style="color: hsl(120, 100%, 40%);">+endif</span><br><span> ramstage-y += variants/$(VARIANT_DIR)/variant.c</span><br><span> </span><br><span> subdirs-y += variants/$(VARIANT_DIR)</span><br><span>diff --git a/src/mainboard/google/auron/acpi/mainboard.asl b/src/mainboard/google/auron/acpi/mainboard.asl</span><br><span>index 907590d..204c1c4 100644</span><br><span>--- a/src/mainboard/google/auron/acpi/mainboard.asl</span><br><span>+++ b/src/mainboard/google/auron/acpi/mainboard.asl</span><br><span>@@ -16,6 +16,7 @@</span><br><span> </span><br><span> #include <variant/onboard.h></span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#if !IS_ENABLED(CONFIG_BOARD_GOOGLE_BUDDY)</span><br><span> Scope (\_SB.PCI0.RP01)</span><br><span> {</span><br><span> Device (WLAN)</span><br><span>@@ -34,6 +35,7 @@</span><br><span> }</span><br><span> }</span><br><span> }</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span> </span><br><span> #include <variant/acpi/mainboard.asl></span><br><span> </span><br><span>diff --git a/src/mainboard/google/auron/mainboard.c b/src/mainboard/google/auron/mainboard.c</span><br><span>index 9eece73..2cbd0e7 100644</span><br><span>--- a/src/mainboard/google/auron/mainboard.c</span><br><span>+++ b/src/mainboard/google/auron/mainboard.c</span><br><span>@@ -20,9 +20,14 @@</span><br><span> #include "variant.h"</span><br><span> </span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+__weak void lan_init(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> static void mainboard_init(struct device *dev)</span><br><span> {</span><br><span> mainboard_ec_init();</span><br><span style="color: hsl(120, 100%, 40%);">+ lan_init();</span><br><span> }</span><br><span> </span><br><span> static int mainboard_smbios_data(struct device *dev, int *handle,</span><br><span>diff --git a/src/mainboard/google/auron/variant.h b/src/mainboard/google/auron/variant.h</span><br><span>index 41c157f..b11ea1e 100644</span><br><span>--- a/src/mainboard/google/auron/variant.h</span><br><span>+++ b/src/mainboard/google/auron/variant.h</span><br><span>@@ -20,5 +20,6 @@</span><br><span> </span><br><span> int variant_smbios_data(device_t dev, int *handle, unsigned long *current);</span><br><span> void variant_romstage_entry(struct romstage_params *rp);</span><br><span style="color: hsl(120, 100%, 40%);">+void lan_init(void);</span><br><span> </span><br><span> #endif</span><br><span>diff --git a/src/mainboard/google/auron/variants/buddy/devicetree.cb b/src/mainboard/google/auron/variants/buddy/devicetree.cb</span><br><span>new file mode 100644</span><br><span>index 0000000..e662794</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/auron/variants/buddy/devicetree.cb</span><br><span>@@ -0,0 +1,111 @@</span><br><span style="color: hsl(120, 100%, 40%);">+chip soc/intel/broadwell</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ # Enable eDP Hotplug with 6ms pulse</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gpu_dp_d_hotplug" = "0x06"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ # Disable DisplayPort C Hotplug</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gpu_dp_c_hotplug" = "0x00"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ # Enable HDMI Hotplug with 6ms pulse</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gpu_dp_b_hotplug" = "0x06"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ # Set backlight PWM values for eDP</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gpu_cpu_backlight" = "0x00000200"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gpu_pch_backlight" = "0x04000000"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ # Enable Panel and configure power delays</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gpu_panel_port_select" = "1" # eDP</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gpu_panel_power_cycle_delay" = "5" # 400ms</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gpu_panel_power_up_delay" = "400" # 40ms</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gpu_panel_power_down_delay" = "150" # 15ms</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gpu_panel_power_backlight_on_delay" = "70" # 7ms</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gpu_panel_power_backlight_off_delay" = "2100" # 210ms</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ register "pirqa_routing" = "0x8b"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "pirqb_routing" = "0x8a"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "pirqc_routing" = "0x8b"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "pirqd_routing" = "0x8b"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "pirqe_routing" = "0x80"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "pirqf_routing" = "0x80"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "pirqg_routing" = "0x80"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "pirqh_routing" = "0x80"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ # EC range is 0x800-0x9ff</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gen1_dec" = "0x00fc0801"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gen2_dec" = "0x00fc0901"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ # EC_SMI is GPIO34</span><br><span style="color: hsl(120, 100%, 40%);">+ register "alt_gp_smi_en" = "0x0004"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gpe0_en_1" = "0x00000000"</span><br><span style="color: hsl(120, 100%, 40%);">+ # EC_SCI is GPIO36</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gpe0_en_2" = "0x00000010"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gpe0_en_3" = "0x00000000"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "gpe0_en_4" = "0x00000000"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ register "sata_port_map" = "0x1"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "sata_devslp_disable" = "0x1"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ register "sio_acpi_mode" = "1"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "sio_i2c0_voltage" = "1" # 1.8V</span><br><span style="color: hsl(120, 100%, 40%);">+ register "sio_i2c1_voltage" = "0" # 3.3V</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ # DTLE DATA / EDGE values</span><br><span style="color: hsl(120, 100%, 40%);">+ register "sata_port0_gen3_dtle" = "0x5"</span><br><span style="color: hsl(120, 100%, 40%);">+ register "sata_port1_gen3_dtle" = "0x5"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ # Force enable ASPM for PCIe Port 5</span><br><span style="color: hsl(120, 100%, 40%);">+ register "pcie_port_force_aspm" = "0x10"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ # Enable port coalescing</span><br><span style="color: hsl(120, 100%, 40%);">+ register "pcie_port_coalesce" = "1"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ # Disable PCIe CLKOUT 1,5 and CLKOUT_XDP</span><br><span style="color: hsl(120, 100%, 40%);">+ register "icc_clock_disable" = "0x01220000"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ register "s0ix_enable" = "0"</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ device cpu_cluster 0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ device lapic 0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ device domain 0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 00.0 on end # host bridge</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 02.0 on end # vga controller</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 03.0 on end # mini-hd audio</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 13.0 on end # Smart Sound Audio DSP</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 14.0 on end # USB3 XHCI</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 15.0 on end # Serial I/O DMA</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 15.1 on end # I2C0</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 15.2 on end # I2C1</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 15.3 off end # GSPI0</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 15.4 off end # GSPI1</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 15.5 off end # UART0</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 15.6 off end # UART1</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 16.0 on end # Management Engine Interface 1</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 16.1 off end # Management Engine Interface 2</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 16.2 off end # Management Engine IDE-R</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 16.3 off end # Management Engine KT</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 17.0 off end # SDIO</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 19.0 off end # GbE</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1b.0 off end # High Definition Audio</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1c.0 off end # PCIe Port #1</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1c.1 off end # PCIe Port #2</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1c.2 on end # PCIe Port #3</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1c.3 on end # PCIe Port #4</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1c.4 on end # PCIe Port #5</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1c.5 off end # PCIe Port #6</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1d.0 on end # USB2 EHCI</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1e.0 off end # PCI bridge</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+ chip ec/google/chromeec</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c09.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+ end # LPC bridge</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1f.2 on end # SATA Controller</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1f.3 on end # SMBus</span><br><span style="color: hsl(120, 100%, 40%);">+ device pci 1f.6 on end # Thermal</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span style="color: hsl(120, 100%, 40%);">+end</span><br><span>diff --git a/src/mainboard/google/auron/variants/buddy/include/variant/acpi/ec.asl b/src/mainboard/google/auron/variants/buddy/include/variant/acpi/ec.asl</span><br><span>new file mode 100644</span><br><span>index 0000000..e69de29</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/auron/variants/buddy/include/variant/acpi/ec.asl</span><br><span>diff --git a/src/mainboard/google/auron/variants/buddy/include/variant/acpi/mainboard.asl b/src/mainboard/google/auron/variants/buddy/include/variant/acpi/mainboard.asl</span><br><span>new file mode 100644</span><br><span>index 0000000..788fbdc</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/auron/variants/buddy/include/variant/acpi/mainboard.asl</span><br><span>@@ -0,0 +1,143 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2014 Google Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(120, 100%, 40%);">+ * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(120, 100%, 40%);">+ * published by the Free Software Foundation; version 2 of</span><br><span style="color: hsl(120, 100%, 40%);">+ * the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Scope (\_SB.PCI0.I2C0)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ Device (RTEK)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_HID, "10EC5650")</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_CID, "10EC5650")</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_DDN, "RTEK Codec Controller ")</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_UID, 1)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_CRS, ResourceTemplate()</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ I2cSerialBus (</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x1A, // SlaveAddress</span><br><span style="color: hsl(120, 100%, 40%);">+ ControllerInitiated, // SlaveMode</span><br><span style="color: hsl(120, 100%, 40%);">+ 400000, // ConnectionSpeed</span><br><span style="color: hsl(120, 100%, 40%);">+ AddressingMode7Bit, // AddressingMode</span><br><span style="color: hsl(120, 100%, 40%);">+ "\\_SB.PCI0.I2C0", // ResourceSource</span><br><span style="color: hsl(120, 100%, 40%);">+ )</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Interrupt (ResourceConsumer, Edge, ActiveLow){ 37 }</span><br><span style="color: hsl(120, 100%, 40%);">+ })</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Method (_STA)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ If (LEqual (\S1EN, 1)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ Return (0xF)</span><br><span style="color: hsl(120, 100%, 40%);">+ } Else {</span><br><span style="color: hsl(120, 100%, 40%);">+ Return (0x0)</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Scope (\_SB.PCI0.I2C1)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ Device (ETSA)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_HID, "ELAN0001")</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_DDN, "Elan Touchscreen")</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_UID, 6)</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (ISTP, 0) /* Touchscreen */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_CRS, ResourceTemplate()</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ I2cSerialBus (</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x10, // SlaveAddress</span><br><span style="color: hsl(120, 100%, 40%);">+ ControllerInitiated, // SlaveMode</span><br><span style="color: hsl(120, 100%, 40%);">+ 400000, // ConnectionSpeed</span><br><span style="color: hsl(120, 100%, 40%);">+ AddressingMode7Bit, // AddressingMode</span><br><span style="color: hsl(120, 100%, 40%);">+ "\\_SB.PCI0.I2C1", // ResourceSource</span><br><span style="color: hsl(120, 100%, 40%);">+ )</span><br><span style="color: hsl(120, 100%, 40%);">+ Interrupt (ResourceConsumer, Level, ActiveLow)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ BOARD_TOUCHSCREEN_IRQ</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ })</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Method (_STA)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ If (LEqual (\S2EN, 1)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ Return (0xF)</span><br><span style="color: hsl(120, 100%, 40%);">+ } Else {</span><br><span style="color: hsl(120, 100%, 40%);">+ Return (0x0)</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_PRW, Package() { BOARD_TOUCHSCREEN_WAKE_GPIO, 0x3 })</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Method (_DSW, 3, NotSerialized)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ Store (BOARD_TOUCHSCREEN_WAKE_GPIO, Local0)</span><br><span style="color: hsl(120, 100%, 40%);">+ If (LEqual (Arg0, 1)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ // Enable GPIO as wake source</span><br><span style="color: hsl(120, 100%, 40%);">+ \_SB.PCI0.LPCB.GPIO.GWAK (Local0)</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Allow device to power off in S0 */</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_S0W, 4)</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * LAN connected to Root Port 3, becomes Root Port 1 after coalesce</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+Scope (\_SB.PCI0.RP01)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ Device (ETH0)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_ADR, 0x00000000)</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_PRW, Package() { BUDDY_NIC_WAKE_GPIO, 3 })</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Method (_DSW, 3, NotSerialized)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ Store (BUDDY_NIC_WAKE_GPIO, Local0)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ If (LEqual (Arg0, 1)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ // Enable GPIO as wake source</span><br><span style="color: hsl(120, 100%, 40%);">+ \_SB.PCI0.LPCB.GPIO.GWAK (Local0)</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * WLAN connected to Root Port 4, becomes Root Port 2 after coalesce</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+Scope (\_SB.PCI0.RP02)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ Device (WLAN)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_ADR, 0x00000000)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* GPIO10 is WLAN_WAKE_L_Q */</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (GPIO, BOARD_WLAN_WAKE_GPIO)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_PRW, Package() { GPIO, 3 })</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Method (_DSW, 3, NotSerialized)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ If (LEqual (Arg0, 1)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ // Enable GPIO as wake source</span><br><span style="color: hsl(120, 100%, 40%);">+ \_SB.PCI0.LPCB.GPIO.GWAK (^GPIO)</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/mainboard/google/auron/variants/buddy/include/variant/acpi/usb.asl b/src/mainboard/google/auron/variants/buddy/include/variant/acpi/usb.asl</span><br><span>new file mode 100644</span><br><span>index 0000000..e69de29</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/auron/variants/buddy/include/variant/acpi/usb.asl</span><br><span>diff --git a/src/mainboard/google/auron/variants/buddy/include/variant/gpio.h b/src/mainboard/google/auron/variants/buddy/include/variant/gpio.h</span><br><span>new file mode 100644</span><br><span>index 0000000..efa720f</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/auron/variants/buddy/include/variant/gpio.h</span><br><span>@@ -0,0 +1,121 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2014 Google Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(120, 100%, 40%);">+ * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(120, 100%, 40%);">+ * published by the Free Software Foundation; version 2 of</span><br><span style="color: hsl(120, 100%, 40%);">+ * the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef BUDDY_GPIO_H</span><br><span style="color: hsl(120, 100%, 40%);">+#define BUDDY_GPIO_H</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/gpio.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static const struct gpio_config mainboard_gpio_config[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 0: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 1: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 2: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 3: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_ACPI_SCI, /* 8: LAN_WAKE_L_Q */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_OUT_HIGH, /* 9: PP3300_WLAN_EN */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 11: SMBALERT */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_INPUT_INVERT, /* 12: RECOVERY_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_OUT_HIGH, /* 13: BT_DISABLE_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_INPUT, /* 14: EC_IN_RW */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 15: UNUSED (STRAP) */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 16: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_OUT_HIGH, /* 17: PP3300_VP8_EN */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 18: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 19: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 20: NATIVE: CLK_PCIE_REQ2# */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 21: NATIVE: CLK_PCIE_REQ3# */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 22: NATIVE: CLK_PCIE_REQ4# */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 23: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_OUT_HIGH, /* 24: WLAN_OFF_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_INPUT_INVERT, /* 25: TOUCH_INT_L (WAKE) */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_OUT_HIGH, /* 26: USB_CTL_1 */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 27: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_OUT_LOW, /* 28: USB_ILIM_SEL */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 29: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSPWRACK_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 31: NATIVE: PCH_ACPRESENT */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 32: NATIVE: CLKRUN# */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_ACPI_SMI, /* 34: EC_SMI_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_ACPI_SCI, /* 36: EC_SCI_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 37: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 38: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 39: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 41: NATIVE: USB_OC1# */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 43: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 44: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_OUT_HIGH, /* 45: PP3300_CODEC_EN */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 46: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 47: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 48: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 49: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_OUT_HIGH, /* 50: VP8_DISABLE_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 51: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 52: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_PIRQ_INVERT, /* 53: CODEC_INT */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_PIRQ, /* 54: TOUCH_INT_L_DX */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 55: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_OUT_HIGH, /* 56: USB_CHARGE_EN */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 57: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_INPUT, /* 58: PCH_SPI_WP_D */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_OUT_HIGH, /* 59: PP3300_LAN_EN */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 60: NATIVE: SMB0ALERT# */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 61: SUS_STAT# */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 62: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 64: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 65: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 66: UNUSED (STRAP) */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 67: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 68: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 69: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 70: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 72: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 73: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 76: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 77: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 78: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 79: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 80: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 81: NATIVE: SPKR */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 83: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 84: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 85: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 86: UNUSED (STRAP) */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 87: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 88: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 89: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 90: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 91: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 92: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 93: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_UNUSED, /* 94: UNUSED */</span><br><span style="color: hsl(120, 100%, 40%);">+ PCH_GPIO_END</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span>diff --git a/src/mainboard/google/auron/variants/buddy/include/variant/hda_verb.h b/src/mainboard/google/auron/variants/buddy/include/variant/hda_verb.h</span><br><span>new file mode 100644</span><br><span>index 0000000..7fd9853</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/auron/variants/buddy/include/variant/hda_verb.h</span><br><span>@@ -0,0 +1,121 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2014 Google Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(120, 100%, 40%);">+ * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(120, 100%, 40%);">+ * published by the Free Software Foundation; version 2 of</span><br><span style="color: hsl(120, 100%, 40%);">+ * the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/azalia_device.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+const u32 cim_verb_data[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* coreboot specific header */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x10ec0283, // Codec Vendor / Device ID: Realtek ALC283</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x10ec0283, // Subsystem ID</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x0000000d, // Number of jacks (NID entries)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x0017ff00, // Function Reset</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x0017ff00, // Double Function Reset</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x000F0000, // Pad - get vendor id</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x000F0002, // Pad - get revision id</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Bits 31:28 - Codec Address */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Bits 27:20 - NID */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Bits 19:8 - Verb ID */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Bits 7:0 - Payload */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* NID 0x01, HDA Codec Subsystem ID Verb Table: 0x10ec0283 */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x00172083,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x00172102,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x001722ec,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x00172310,</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Pin Widget Verb Table */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Pin Complex (NID 0x12) DMIC - Disabled */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01271cf0, //</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01271d11, //</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01271e11, //</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01271f41, //</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Pin Complex (NID 0x14) SPKR-OUT - Internal Speakers */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01471c10, // group 1, cap 0</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01471d01, // no connector, no jack detect</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01471e17, // speaker out, analog</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01471f90, // fixed function, internal, Location N/A</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Pin Complex (NID 0x17) MONO Out - Disabled */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01771cf0, //</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01771d11, //</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01771e11, //</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01771f41, //</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Pin Complex (NID 0x18) Disabled */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01871cf0, //</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01871d11, //</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01871e11, //</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01871f41, //</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Pin Complex (NID 0x19) MIC2 - 3.5mm Jack */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01971c20, // group2, cap 0</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01971d10, // black, jack detect</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01971ea1, // Mic in, 3.5mm Jack</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01971f03, // connector, External left panel</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Pin Complex (NID 0x1A) LINE1 - Internal Mic */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01a71c11, // group 1, cap 1</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01a71d01, // no connector, no jack detect</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01a71ea7, // mic in, analog connection</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01a71f90, // Fixed function, internal, Location N/A</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Pin Complex (NID 0x1B) LINE2 - Disabled */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01b71cf0, //</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01b71d11, //</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01b71e11, //</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01b71f41, //</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Pin Complex (NID 0x1D) PCBeep */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01d71c2d, // eapd low on ex-amp, laptop, custom enable</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01d71d81, // mute spkr on hpout</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01d71e15, // pcbeep en able, checksum</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01d71f40, // no physical, Internal, Location N/A</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Pin Complex (NID 0x1E) SPDIF-OUT - Disabled*/</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01e71cf0, //</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01e71d11, //</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01e71e11, //</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01e71f41, //</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Pin Complex (NID 0x21) HP-OUT - 3.5mm Jack*/</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x02171c21, // group2, cap 1</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x02171d10, // black, jack detect</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x02171e21, // HPOut, 3.5mm Jack</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x02171f03, // connector, left panel</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Undocumented settings from Realtek (needed for beep_gen) */</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Widget node 0x20 */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x02050010,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x02040c20,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x0205001b,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x0204081b,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+const u32 pc_beep_verbs[] = {</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x00170500, /* power up everything (codec, dac, adc, mixers) */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01470c00, /* set speaker EAPD pin to low */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01470740, /* enable speaker out */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x0143b01f, /* unmute speaker */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x00c37100, /* unmute mixer nid 0xc input 1 */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x01470c02, /* set speaker EAPD pin to high */</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+AZALIA_ARRAY_SIZES;</span><br><span>diff --git a/src/mainboard/google/auron/variants/buddy/include/variant/onboard.h b/src/mainboard/google/auron/variants/buddy/include/variant/onboard.h</span><br><span>new file mode 100644</span><br><span>index 0000000..0b2c664</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/auron/variants/buddy/include/variant/onboard.h</span><br><span>@@ -0,0 +1,41 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2014 Google Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(120, 100%, 40%);">+ * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(120, 100%, 40%);">+ * published by the Free Software Foundation; version 2 of</span><br><span style="color: hsl(120, 100%, 40%);">+ * the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef ONBOARD_H</span><br><span style="color: hsl(120, 100%, 40%);">+#define ONBOARD_H</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* defines for programming the MAC address */</span><br><span style="color: hsl(120, 100%, 40%);">+#define BUDDY_NIC_VENDOR_ID 0x10EC</span><br><span style="color: hsl(120, 100%, 40%);">+#define BUDDY_NIC_DEVICE_ID 0x8168</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* 0x00: White LINK LED and Amber ACTIVE LED */</span><br><span style="color: hsl(120, 100%, 40%);">+#define BUDDY_NIC_LED_MODE 0x00</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define BOARD_TOUCHSCREEN_NAME "touchscreen"</span><br><span style="color: hsl(120, 100%, 40%);">+#define BOARD_TOUCHSCREEN_IRQ 38 /* PIRQW */</span><br><span style="color: hsl(120, 100%, 40%);">+#define BOARD_TOUCHSCREEN_WAKE_GPIO 25 /* GPIO25 */</span><br><span style="color: hsl(120, 100%, 40%);">+#define BOARD_TOUCHSCREEN_I2C_BUS 2 /* I2C1 */</span><br><span style="color: hsl(120, 100%, 40%);">+#define BOARD_TOUCHSCREEN_I2C_ADDR 0x10</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* NIC wake is GPIO 8 */</span><br><span style="color: hsl(120, 100%, 40%);">+#define BUDDY_NIC_WAKE_GPIO 8</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* WLAN wake is GPIO 10 */</span><br><span style="color: hsl(120, 100%, 40%);">+#define BOARD_WLAN_WAKE_GPIO 10</span><br><span style="color: hsl(120, 100%, 40%);">+#define BOARD_PP3300_CODEC_GPIO 45 /* GPIO45 */</span><br><span style="color: hsl(120, 100%, 40%);">+#define BOARD_WLAN_DISABLE_GPIO 46 /* GPIO46 */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span>diff --git a/src/mainboard/google/auron/variants/buddy/include/variant/spd.h b/src/mainboard/google/auron/variants/buddy/include/variant/spd.h</span><br><span>new file mode 100644</span><br><span>index 0000000..cfdaca0</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/auron/variants/buddy/include/variant/spd.h</span><br><span>@@ -0,0 +1,23 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2014 Google Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(120, 100%, 40%);">+ * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(120, 100%, 40%);">+ * published by the Free Software Foundation; version 2 of</span><br><span style="color: hsl(120, 100%, 40%);">+ * the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef MAINBOARD_SPD_H</span><br><span style="color: hsl(120, 100%, 40%);">+#define MAINBOARD_SPD_H</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+struct pei_data;</span><br><span style="color: hsl(120, 100%, 40%);">+void mainboard_fill_spd_data(struct pei_data *pei_data);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span>diff --git a/src/mainboard/google/auron/variants/buddy/include/variant/thermal.h b/src/mainboard/google/auron/variants/buddy/include/variant/thermal.h</span><br><span>new file mode 100644</span><br><span>index 0000000..ae5c8f0</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/auron/variants/buddy/include/variant/thermal.h</span><br><span>@@ -0,0 +1,36 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2014 Google Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(120, 100%, 40%);">+ * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(120, 100%, 40%);">+ * published by the Free Software Foundation; version 2 of</span><br><span style="color: hsl(120, 100%, 40%);">+ * the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifndef THERMAL_H</span><br><span style="color: hsl(120, 100%, 40%);">+#define THERMAL_H</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* Control TDP Settings */</span><br><span style="color: hsl(120, 100%, 40%);">+#define CTL_TDP_SENSOR_ID 0 /* PECI */</span><br><span style="color: hsl(120, 100%, 40%);">+#define CTL_TDP_POWER_LIMIT 12 /* 12W */</span><br><span style="color: hsl(120, 100%, 40%);">+#define CTL_TDP_THRESHILD_NORMAL 0 /*Normal TDP Threshold*/</span><br><span style="color: hsl(120, 100%, 40%);">+#define CTL_TDP_THRESHOLD_OFF 85 /* Normal at 85C */</span><br><span style="color: hsl(120, 100%, 40%);">+#define CTL_TDP_THRESHOLD_ON 90 /* Limited at 90C */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* Temperature which OS will shutdown at */</span><br><span style="color: hsl(120, 100%, 40%);">+#define CRITICAL_TEMPERATURE 104</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* Temperature which OS will throttle CPU */</span><br><span style="color: hsl(120, 100%, 40%);">+#define PASSIVE_TEMPERATURE 95</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* Tj_max value for calculating PECI CPU temperature */</span><br><span style="color: hsl(120, 100%, 40%);">+#define MAX_TEMPERATURE 105</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span>diff --git a/src/mainboard/google/auron/variants/buddy/pei_data.c b/src/mainboard/google/auron/variants/buddy/pei_data.c</span><br><span>new file mode 100644</span><br><span>index 0000000..159d5f6</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/auron/variants/buddy/pei_data.c</span><br><span>@@ -0,0 +1,60 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2014 Google Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(120, 100%, 40%);">+ * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(120, 100%, 40%);">+ * published by the Free Software Foundation; version 2 of</span><br><span style="color: hsl(120, 100%, 40%);">+ * the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <stdint.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <string.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/gpio.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/pei_data.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/pei_wrapper.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void mainboard_fill_pei_data(struct pei_data *pei_data)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data->ec_present = 1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* P0: Side USB3.0 port, USB3S1 */</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data_usb2_port(pei_data, 0, 0x0150, 1, 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ USB_PORT_INTERNAL);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* P1: Rear USB3.0 port, USB3R1 */</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data_usb2_port(pei_data, 1, 0x0040, 1, 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ USB_PORT_INTERNAL);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* P2: Rear USB3.0 port, USB3R2 */</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data_usb2_port(pei_data, 2, 0x0080, 1, 1,</span><br><span style="color: hsl(120, 100%, 40%);">+ USB_PORT_INTERNAL);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* P3: Card Rearder, CRS1 */</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data_usb2_port(pei_data, 3, 0x0040, 1, USB_OC_PIN_SKIP,</span><br><span style="color: hsl(120, 100%, 40%);">+ USB_PORT_INTERNAL);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* P4: Rear USB2.0 port, USB2R1 */</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data_usb2_port(pei_data, 4, 0x0040, 1, 2,</span><br><span style="color: hsl(120, 100%, 40%);">+ USB_PORT_INTERNAL);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* P5: 2D Camera */</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data_usb2_port(pei_data, 5, 0x0000, 1, USB_OC_PIN_SKIP,</span><br><span style="color: hsl(120, 100%, 40%);">+ USB_PORT_INTERNAL);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* P6: VP8 */</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data_usb2_port(pei_data, 6, 0x0150, 1, USB_OC_PIN_SKIP,</span><br><span style="color: hsl(120, 100%, 40%);">+ USB_PORT_MINI_PCIE);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* P7: WLAN & BT */</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data_usb2_port(pei_data, 7, 0x0000, 1, USB_OC_PIN_SKIP,</span><br><span style="color: hsl(120, 100%, 40%);">+ USB_PORT_MINI_PCIE);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* P1: Side USB3.0 port, USB3S1 */</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data_usb3_port(pei_data, 0, 1, 0, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* P2: Rear USB3.0 port, USB3R1 */</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data_usb3_port(pei_data, 1, 1, 0, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* P3: Rear USB3.0 port, USB3R2 */</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data_usb3_port(pei_data, 2, 1, 1, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* P4: Card Rearder, CRS1 */</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data_usb3_port(pei_data, 3, 1, USB_OC_PIN_SKIP, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/mainboard/google/auron/variants/buddy/spd/Makefile.inc b/src/mainboard/google/auron/variants/buddy/spd/Makefile.inc</span><br><span>new file mode 100644</span><br><span>index 0000000..275d983</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/auron/variants/buddy/spd/Makefile.inc</span><br><span>@@ -0,0 +1,16 @@</span><br><span style="color: hsl(120, 100%, 40%);">+##</span><br><span style="color: hsl(120, 100%, 40%);">+## This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+##</span><br><span style="color: hsl(120, 100%, 40%);">+## Copyright (C) 2014 Google Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+##</span><br><span style="color: hsl(120, 100%, 40%);">+## This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+## it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+## the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+##</span><br><span style="color: hsl(120, 100%, 40%);">+## This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+## but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+## GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+##</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-y += spd.c</span><br><span>diff --git a/src/mainboard/google/auron/variants/buddy/spd/spd.c b/src/mainboard/google/auron/variants/buddy/spd/spd.c</span><br><span>new file mode 100644</span><br><span>index 0000000..93e9fb2</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/auron/variants/buddy/spd/spd.c</span><br><span>@@ -0,0 +1,32 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2014 Google Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(120, 100%, 40%);">+ * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(120, 100%, 40%);">+ * published by the Free Software Foundation; version 2 of</span><br><span style="color: hsl(120, 100%, 40%);">+ * the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/pei_data.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <variant/spd.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/* Copy SPD data for on-board memory */</span><br><span style="color: hsl(120, 100%, 40%);">+void mainboard_fill_spd_data(struct pei_data *pei_data)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data->spd_addresses[0] = 0xa0;</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data->spd_addresses[1] = 0x00;</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data->spd_addresses[2] = 0xa4;</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data->spd_addresses[3] = 0x00;</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data->dimm_channel0_disabled = 2;</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data->dimm_channel1_disabled = 2;</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Enable 2x refresh mode */</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data->ddr_refresh_2x = 1;</span><br><span style="color: hsl(120, 100%, 40%);">+ pei_data->dq_pins_interleaved = 1;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/mainboard/google/auron/variants/buddy/variant.c b/src/mainboard/google/auron/variants/buddy/variant.c</span><br><span>new file mode 100644</span><br><span>index 0000000..c682e36</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/google/auron/variants/buddy/variant.c</span><br><span>@@ -0,0 +1,209 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <cbfs.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <fmap.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <types.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <string.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/io.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/device.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pci.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <smbios.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <soc/pch.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <variant/onboard.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <mainboard/google/auron/variant.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+int variant_smbios_data(device_t dev, int *handle,</span><br><span style="color: hsl(120, 100%, 40%);">+ unsigned long *current)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ int len = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ len += smbios_write_type41(</span><br><span style="color: hsl(120, 100%, 40%);">+ current, handle,</span><br><span style="color: hsl(120, 100%, 40%);">+ BOARD_TOUCHSCREEN_NAME, /* name */</span><br><span style="color: hsl(120, 100%, 40%);">+ BOARD_TOUCHSCREEN_IRQ, /* instance */</span><br><span style="color: hsl(120, 100%, 40%);">+ BOARD_TOUCHSCREEN_I2C_BUS, /* segment */</span><br><span style="color: hsl(120, 100%, 40%);">+ BOARD_TOUCHSCREEN_I2C_ADDR, /* bus */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0, /* device */</span><br><span style="color: hsl(120, 100%, 40%);">+ 0); /* function */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return len;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static unsigned int search(char *p, u8 *a, unsigned int lengthp,</span><br><span style="color: hsl(120, 100%, 40%);">+ unsigned int lengtha)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ int i, j;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Searching */</span><br><span style="color: hsl(120, 100%, 40%);">+ for (j = 0; j <= lengtha - lengthp; j++) {</span><br><span style="color: hsl(120, 100%, 40%);">+ for (i = 0; i < lengthp && p[i] == a[i + j]; i++)</span><br><span style="color: hsl(120, 100%, 40%);">+ ;</span><br><span style="color: hsl(120, 100%, 40%);">+ if (i >= lengthp)</span><br><span style="color: hsl(120, 100%, 40%);">+ return j;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ return lengtha;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static unsigned char get_hex_digit(u8 *offset)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ unsigned char retval = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ retval = *offset - '0';</span><br><span style="color: hsl(120, 100%, 40%);">+ if (retval > 0x09) {</span><br><span style="color: hsl(120, 100%, 40%);">+ retval = *offset - 'A' + 0x0A;</span><br><span style="color: hsl(120, 100%, 40%);">+ if (retval > 0x0F)</span><br><span style="color: hsl(120, 100%, 40%);">+ retval = *offset - 'a' + 0x0a;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ if (retval > 0x0F) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "Error: Invalid Hex digit found: %c - 0x%02x\n",</span><br><span style="color: hsl(120, 100%, 40%);">+ *offset, *offset);</span><br><span style="color: hsl(120, 100%, 40%);">+ retval = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return retval;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static int get_mac_address(u32 *high_dword, u32 *low_dword,</span><br><span style="color: hsl(120, 100%, 40%);">+ u8 *search_address, u32 search_length)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ char key[] = "ethernet_mac";</span><br><span style="color: hsl(120, 100%, 40%);">+ unsigned int offset;</span><br><span style="color: hsl(120, 100%, 40%);">+ int i;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ offset = search(key, search_address, sizeof(key) - 1, search_length);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (offset == search_length) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG,</span><br><span style="color: hsl(120, 100%, 40%);">+ "Error: Could not locate '%s' in VPD\n", key);</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "Located '%s' in VPD\n", key);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ offset += sizeof(key); /* move to next character */</span><br><span style="color: hsl(120, 100%, 40%);">+ *high_dword = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Fetch the MAC address and put the octets in the correct order to</span><br><span style="color: hsl(120, 100%, 40%);">+ * be programmed.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * From RTL8105E_Series_EEPROM-Less_App_Note_1.1</span><br><span style="color: hsl(120, 100%, 40%);">+ * If the MAC address is 001122334455h:</span><br><span style="color: hsl(120, 100%, 40%);">+ * Write 33221100h to I/O register offset 0x00 via double word access</span><br><span style="color: hsl(120, 100%, 40%);">+ * Write 00005544h to I/O register offset 0x04 via double word access</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ for (i = 0; i < 4; i++) {</span><br><span style="color: hsl(120, 100%, 40%);">+ *high_dword |= (get_hex_digit(search_address + offset)</span><br><span style="color: hsl(120, 100%, 40%);">+ << (4 + (i * 8)));</span><br><span style="color: hsl(120, 100%, 40%);">+ *high_dword |= (get_hex_digit(search_address + offset + 1)</span><br><span style="color: hsl(120, 100%, 40%);">+ << (i * 8));</span><br><span style="color: hsl(120, 100%, 40%);">+ offset += 3;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ *low_dword = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ for (i = 0; i < 2; i++) {</span><br><span style="color: hsl(120, 100%, 40%);">+ *low_dword |= (get_hex_digit(search_address + offset)</span><br><span style="color: hsl(120, 100%, 40%);">+ << (4 + (i * 8)));</span><br><span style="color: hsl(120, 100%, 40%);">+ *low_dword |= (get_hex_digit(search_address + offset + 1)</span><br><span style="color: hsl(120, 100%, 40%);">+ << (i * 8));</span><br><span style="color: hsl(120, 100%, 40%);">+ offset += 3;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return *high_dword | *low_dword;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void program_mac_address(u16 io_base)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ void *search_address = NULL;</span><br><span style="color: hsl(120, 100%, 40%);">+ size_t search_length = -1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Default MAC Address of A0:00:BA:D0:0B:AD */</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 high_dword = 0xD0BA00A0; /* high dword of mac address */</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 low_dword = 0x0000AD0B; /* low word of mac address as a dword */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (IS_ENABLED(CONFIG_CHROMEOS)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ struct region_device rdev;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (fmap_locate_area_as_rdev("RO_VPD", &rdev) == 0) {</span><br><span style="color: hsl(120, 100%, 40%);">+ search_address = rdev_mmap_full(&rdev);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (search_address != NULL)</span><br><span style="color: hsl(120, 100%, 40%);">+ search_length = region_device_sz(&rdev);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ search_address = cbfs_boot_map_with_leak("vpd.bin",</span><br><span style="color: hsl(120, 100%, 40%);">+ CBFS_TYPE_RAW,</span><br><span style="color: hsl(120, 100%, 40%);">+ &search_length);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (search_address == NULL)</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_ERR, "LAN: VPD not found.\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ else</span><br><span style="color: hsl(120, 100%, 40%);">+ get_mac_address(&high_dword, &low_dword, search_address,</span><br><span style="color: hsl(120, 100%, 40%);">+ search_length);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (io_base) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "Realtek NIC io_base = 0x%04x\n", io_base);</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_DEBUG, "Programming MAC Address\n");</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Disable register protection */</span><br><span style="color: hsl(120, 100%, 40%);">+ outb(0xc0, io_base + 0x50);</span><br><span style="color: hsl(120, 100%, 40%);">+ outl(high_dword, io_base);</span><br><span style="color: hsl(120, 100%, 40%);">+ outl(low_dword, io_base + 0x04);</span><br><span style="color: hsl(120, 100%, 40%);">+ outb(0x60, io_base + 54);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Enable register protection again */</span><br><span style="color: hsl(120, 100%, 40%);">+ outb(0x00, io_base + 0x50);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void lan_init(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ u16 io_base = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct device *ethernet_dev = NULL;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Get NIC's IO base address */</span><br><span style="color: hsl(120, 100%, 40%);">+ ethernet_dev = dev_find_device(BUDDY_NIC_VENDOR_ID,</span><br><span style="color: hsl(120, 100%, 40%);">+ BUDDY_NIC_DEVICE_ID, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (ethernet_dev != NULL) {</span><br><span style="color: hsl(120, 100%, 40%);">+ io_base = pci_read_config16(ethernet_dev, 0x10) & 0xfffe;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Battery life time - LAN PCIe should enter ASPM L1 to save</span><br><span style="color: hsl(120, 100%, 40%);">+ * power when LAN connection is idle.</span><br><span style="color: hsl(120, 100%, 40%);">+ * enable CLKREQ: LAN pci config space 0x81h=01</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ pci_write_config8(ethernet_dev, 0x81, 0x01);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (io_base) {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Program MAC address based on VPD data */</span><br><span style="color: hsl(120, 100%, 40%);">+ program_mac_address(io_base);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Program NIC LEDS</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * RTL8105E Series EEPROM-Less Application Note,</span><br><span style="color: hsl(120, 100%, 40%);">+ * Section 5.6 LED Mode Configuration</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Step1: Write C0h to I/O register 0x50 via byte access to</span><br><span style="color: hsl(120, 100%, 40%);">+ * disable 'register protection'</span><br><span style="color: hsl(120, 100%, 40%);">+ * Step2: Write xx001111b to I/O register 0x52 via byte access</span><br><span style="color: hsl(120, 100%, 40%);">+ * (bit7 is LEDS1 and bit6 is LEDS0)</span><br><span style="color: hsl(120, 100%, 40%);">+ * Step3: Write 0x00 to I/O register 0x50 via byte access to</span><br><span style="color: hsl(120, 100%, 40%);">+ * enable 'register protection'</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ outb(0xc0, io_base + 0x50); /* Disable protection */</span><br><span style="color: hsl(120, 100%, 40%);">+ outb((BUDDY_NIC_LED_MODE << 6) | 0x0f, io_base + 0x52);</span><br><span style="color: hsl(120, 100%, 40%);">+ outb(0x00, io_base + 0x50); /* Enable register protection */</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28613">change 28613</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28613"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ib76eef47677b72ddaef81a2decef189a5f20c20a </div>
<div style="display:none"> Gerrit-Change-Number: 28613 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Matt DeVillier <matt.devillier@gmail.com> </div>