<p>Philipp Hug <strong>uploaded patch set #2</strong> to this change.</p><p><a href="https://review.coreboot.org/28582">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/sifive/fu540: Update clock settings according SiFive bootloader<br><br>The documentation unfortunately doesn't match what SiFive uses in their FSBL.<br>Use the same values as in FSBL to make DDR RAM work.<br><br>Change-Id: I844cc41ed197333adeae495e71ea70b4a9603650<br>Signed-off-by: Philipp Hug <philipp@hug.cx><br>---<br>M src/soc/sifive/fu540/clock.c<br>1 file changed, 30 insertions(+), 8 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/28582/2</pre><p>To view, visit <a href="https://review.coreboot.org/28582">change 28582</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28582"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newpatchset </div>
<div style="display:none"> Gerrit-Change-Id: I844cc41ed197333adeae495e71ea70b4a9603650 </div>
<div style="display:none"> Gerrit-Change-Number: 28582 </div>
<div style="display:none"> Gerrit-PatchSet: 2 </div>
<div style="display:none"> Gerrit-Owner: Philipp Hug <philipp@hug.cx> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>