<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28506">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">nb/intel/x4x: Don't use cached settings if CPU FSB has been changed<br><br>Using the cached CPU FSB setting can simply be wrong, in which case it won't<br>boot. Since the selected timings also depend on the CPU FSB, it is also best to<br>not use cached timings at all when a change is detected.<br><br>UNTESTED.<br><br>Change-Id: I12d91d0e892c15778409d7c00b27652ee52ca80c<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/northbridge/intel/x4x/raminit.c<br>1 file changed, 8 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/28506/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c</span><br><span>index 9d37ada..b4f103b 100644</span><br><span>--- a/src/northbridge/intel/x4x/raminit.c</span><br><span>+++ b/src/northbridge/intel/x4x/raminit.c</span><br><span>@@ -669,9 +669,16 @@</span><br><span>            /* check SPD checksum to make sure the DIMMs haven't been</span><br><span>                 * replaced */</span><br><span>               fast_boot = verify_spds(spd_map, ctrl_cached) == CB_SUCCESS;</span><br><span style="color: hsl(0, 100%, 40%);">-            if (!fast_boot)</span><br><span style="color: hsl(120, 100%, 40%);">+               if (!fast_boot) {</span><br><span>                    printk(BIOS_DEBUG, "SPD checksums don't match,"</span><br><span>                                " dimm's have been replaced\n");</span><br><span style="color: hsl(120, 100%, 40%);">+                } else {</span><br><span style="color: hsl(120, 100%, 40%);">+                      find_fsb_speed(&s);</span><br><span style="color: hsl(120, 100%, 40%);">+                       fast_boot = s.max_fsb == ctrl_cached->max_fsb;</span><br><span style="color: hsl(120, 100%, 40%);">+                     if (!fast_boot)</span><br><span style="color: hsl(120, 100%, 40%);">+                               printk(BIOS_DEBUG,</span><br><span style="color: hsl(120, 100%, 40%);">+                                   "CPU FSB does match and has been replaced\n");</span><br><span style="color: hsl(120, 100%, 40%);">+               }</span><br><span>    } else {</span><br><span>             fast_boot = boot_path == BOOT_PATH_RESUME;</span><br><span>   }</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28506">change 28506</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28506"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I12d91d0e892c15778409d7c00b27652ee52ca80c </div>
<div style="display:none"> Gerrit-Change-Number: 28506 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>