<p>Furquan Shaikh has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28507">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/google/octopus: Configure H1 interrupt pad using Rx level config<br><br>This change configures GPIO_63 (which is used for H1 interrupts) as Rx<br>Level. This ensures that the signal gets passed on to the next logic<br>state as is and the APIC entry can be configured to trigger interrupt<br>on level or edge as per the kernel driver expectation.<br><br>TEST=Verified that no H1 interrupt timeouts are seen with 100<br>iterations of warm and 100 iterations of cold reboot.<br><br>Change-Id: I7aac30300a4251d9b40276dcca7ebc6a6d814c40<br>Signed-off-by: Furquan Shaikh <furquan@google.com><br>---<br>M src/mainboard/google/octopus/variants/baseboard/gpio.c<br>M src/mainboard/google/octopus/variants/bip/gpio.c<br>M src/mainboard/google/octopus/variants/bobba/gpio.c<br>M src/mainboard/google/octopus/variants/fleex/gpio.c<br>M src/mainboard/google/octopus/variants/meep/gpio.c<br>M src/mainboard/google/octopus/variants/phaser/gpio.c<br>6 files changed, 8 insertions(+), 8 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/28507/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c</span><br><span>index 2942601..2b9d4b4 100644</span><br><span>--- a/src/mainboard/google/octopus/variants/baseboard/gpio.c</span><br><span>+++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c</span><br><span>@@ -91,7 +91,7 @@</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_60, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART0_RXD */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_61, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART0_TXD */</span><br><span> PAD_NC(GPIO_62, UP_20K), /* UART0-RTS_B -- unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, EDGE_SINGLE, INVERT, TxDRxE, DISPUPD), /* H1_PCH_INT_ODL */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD), /* H1_PCH_INT_ODL */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_64, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART2_RXD */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_65, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), /* LPSS_UART2_TXD */</span><br><span> PAD_NC(GPIO_66, UP_20K), /* UART2-RTS_B -- unused */</span><br><span>@@ -297,7 +297,7 @@</span><br><span> static const struct pad_config early_gpio_table[] = {</span><br><span> PAD_CFG_GPI(GPIO_190, NONE, DEEP), /* PCH_WP_OD */</span><br><span> /* GSPI0_INT */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, EDGE_SINGLE, INVERT, TxDRxE,</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE,</span><br><span> DISPUPD), /* H1_PCH_INT_ODL */</span><br><span> /* GSPI0_CLK */</span><br><span> PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1), /* H1_SLAVE_SPI_CLK_R */</span><br><span>diff --git a/src/mainboard/google/octopus/variants/bip/gpio.c b/src/mainboard/google/octopus/variants/bip/gpio.c</span><br><span>index 647a903..1e94b0e 100644</span><br><span>--- a/src/mainboard/google/octopus/variants/bip/gpio.c</span><br><span>+++ b/src/mainboard/google/octopus/variants/bip/gpio.c</span><br><span>@@ -89,7 +89,7 @@</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_60, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART0_RXD */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_61, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART0_TXD */</span><br><span> PAD_NC(GPIO_62, UP_20K), /* UART0-RTS_B -- unused */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, EDGE_SINGLE, INVERT, TxDRxE, DISPUPD), /* H1_PCH_INT_ODL */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE, DISPUPD), /* H1_PCH_INT_ODL */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_64, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD), /* LPSS_UART2_RXD */</span><br><span> PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_65, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD), /* LPSS_UART2_TXD */</span><br><span> PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_66, 1, DEEP, UP_20K, HIZCRx0, DISPUPD), /* UART2-RTS_B -- LTE_OFF_ODL*/</span><br><span>@@ -290,7 +290,7 @@</span><br><span> static const struct pad_config early_gpio_table[] = {</span><br><span> PAD_CFG_GPI(GPIO_190, NONE, DEEP), /* PCH_WP_OD */</span><br><span> /* GSPI0_INT */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, EDGE_SINGLE, INVERT, TxDRxE,</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE,</span><br><span> DISPUPD), /* H1_PCH_INT_ODL */</span><br><span> /* GSPI0_CLK */</span><br><span> PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1), /* H1_SLAVE_SPI_CLK_R */</span><br><span>diff --git a/src/mainboard/google/octopus/variants/bobba/gpio.c b/src/mainboard/google/octopus/variants/bobba/gpio.c</span><br><span>index 8ce2c51..de0f1b2 100644</span><br><span>--- a/src/mainboard/google/octopus/variants/bobba/gpio.c</span><br><span>+++ b/src/mainboard/google/octopus/variants/bobba/gpio.c</span><br><span>@@ -55,7 +55,7 @@</span><br><span> /* PCH_WP_OD */</span><br><span> PAD_CFG_GPI(GPIO_190, NONE, DEEP),</span><br><span> /* H1_PCH_INT_ODL */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, EDGE_SINGLE, INVERT, TxDRxE,</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE,</span><br><span> DISPUPD),</span><br><span> /* H1_SLAVE_SPI_CLK_R */</span><br><span> PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1),</span><br><span>diff --git a/src/mainboard/google/octopus/variants/fleex/gpio.c b/src/mainboard/google/octopus/variants/fleex/gpio.c</span><br><span>index 741eeaf..34dd07a 100644</span><br><span>--- a/src/mainboard/google/octopus/variants/fleex/gpio.c</span><br><span>+++ b/src/mainboard/google/octopus/variants/fleex/gpio.c</span><br><span>@@ -92,7 +92,7 @@</span><br><span> /* PCH_WP_OD */</span><br><span> PAD_CFG_GPI(GPIO_190, NONE, DEEP),</span><br><span> /* H1_PCH_INT_ODL */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, EDGE_SINGLE, INVERT, TxDRxE,</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE,</span><br><span> DISPUPD),</span><br><span> /* H1_SLAVE_SPI_CLK_R */</span><br><span> PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1),</span><br><span>diff --git a/src/mainboard/google/octopus/variants/meep/gpio.c b/src/mainboard/google/octopus/variants/meep/gpio.c</span><br><span>index 0f31388..6f2abc4 100644</span><br><span>--- a/src/mainboard/google/octopus/variants/meep/gpio.c</span><br><span>+++ b/src/mainboard/google/octopus/variants/meep/gpio.c</span><br><span>@@ -44,7 +44,7 @@</span><br><span> /* PCH_WP_OD */</span><br><span> PAD_CFG_GPI(GPIO_190, NONE, DEEP),</span><br><span> /* H1_PCH_INT_ODL */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, EDGE_SINGLE, INVERT, TxDRxE,</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE,</span><br><span> DISPUPD),</span><br><span> /* H1_SLAVE_SPI_CLK_R */</span><br><span> PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1),</span><br><span>diff --git a/src/mainboard/google/octopus/variants/phaser/gpio.c b/src/mainboard/google/octopus/variants/phaser/gpio.c</span><br><span>index fd8777b..1c39e65 100644</span><br><span>--- a/src/mainboard/google/octopus/variants/phaser/gpio.c</span><br><span>+++ b/src/mainboard/google/octopus/variants/phaser/gpio.c</span><br><span>@@ -72,7 +72,7 @@</span><br><span> /* PCH_WP_OD */</span><br><span> PAD_CFG_GPI(GPIO_190, NONE, DEEP),</span><br><span> /* H1_PCH_INT_ODL */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, EDGE_SINGLE, INVERT, TxDRxE,</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_GPI_APIC_IOS(GPIO_63, NONE, DEEP, LEVEL, INVERT, TxDRxE,</span><br><span> DISPUPD),</span><br><span> /* H1_SLAVE_SPI_CLK_R */</span><br><span> PAD_CFG_NF(GPIO_79, NONE, DEEP, NF1),</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28507">change 28507</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I7aac30300a4251d9b40276dcca7ebc6a6d814c40 </div>
<div style="display:none"> Gerrit-Change-Number: 28507 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Furquan Shaikh <furquan@google.com> </div>