<p>Marshall Dawson has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28481">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">NOT_FOR_MERGE: Add fake MCA errors to test BERT<br><br>Fill the BERT region with some sample errors. The first core's<br>errors should be reported by the ACPI driver as:<br><br>[Hardware Error]: event severity: fatal<br>[Hardware Error]: precise tstamp: 2018-09-04 16:58:11<br>[Hardware Error]: Error 0, type: fatal<br>[Hardware Error]: section_type: general processor error<br>[Hardware Error]: processor_type: 0, IA32/X64<br>[Hardware Error]: error_type: 0x01<br>[Hardware Error]: cache error<br>[Hardware Error]: version_info: 0x0000000000670f00<br>[Hardware Error]: processor_id: 0x0000000000000010<br>[Hardware Error]: precise tstamp: 2018-09-04 16:58:11<br>[Hardware Error]: Error 1, type: fatal<br>[Hardware Error]: section type: unknown, dc3ea0b0-a144-4797-b95b-53fa242b6e1d<br>[Hardware Error]: section length: 0x100<br>[Hardware Error]: 00000000: 00000307 00000000 00000010 00000000 ................<br>[Hardware Error]: 00000010: 00670f00 00000000 00020800 00000000 ..g.............<br>[Hardware Error]: 00000020: 76d8320b 00000000 178bfbff 00000000 .2.v............<br>[Hardware Error]: 00000030: 00000000 00000000 00000000 00000000 ................<br>[Hardware Error]: 00000040: a55701f5 43dee3ef 9b2472ac 2cad3f57 ..W....C.r$.W?.,<br>[Hardware Error]: 00000050: 00000000 00000000 00000000 00000000 ................<br>[Hardware Error]: 00000060: 00000000 00000000 00000000 00000000 ................<br>[Hardware Error]: 00000070: 00000000 00000000 00000000 00000000 ................<br>[Hardware Error]: 00000080: 00180001 00000179 00000000 00000000 ....y...........<br>[Hardware Error]: 00000090: 00000107 00000000 00000000 00000000 ................<br>[Hardware Error]: 000000a0: 00000000 00000000 00000000 00000000 ................<br>[Hardware Error]: 000000b0: 00200001 00000404 00000000 00000000 .. .............<br>[Hardware Error]: 000000c0: 00000000 00000000 00100153 fe000000 ........S.......<br>[Hardware Error]: 000000d0: 00000009 00000000 00000000 d01a0003 ................<br>[Hardware Error]: 000000e0: 00080001 c0010045 00000000 00000000 ....E...........<br>[Hardware Error]: 000000f0: 00000080 00000000 00000000 00000000 ................<br><br>Change-Id: I413955fb0fcf0d98a89da647f6f70b0df25a923a<br>Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com><br>---<br>M src/arch/x86/acpi_bert_storage.c<br>M src/soc/amd/stoneyridge/mca.c<br>2 files changed, 97 insertions(+), 2 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/28481/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/arch/x86/acpi_bert_storage.c b/src/arch/x86/acpi_bert_storage.c</span><br><span>index 826c14c..c15989c 100644</span><br><span>--- a/src/arch/x86/acpi_bert_storage.c</span><br><span>+++ b/src/arch/x86/acpi_bert_storage.c</span><br><span>@@ -487,6 +487,8 @@</span><br><span> return NULL;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+void fake_msr_reads(msr_t *p, u32 addr, int num);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /* Helper to add an MSR context to an existing IA32/X64-type error entry */</span><br><span> cper_ia32x64_context_t *cper_new_ia32x64_context_msr(</span><br><span> acpi_generic_error_status_t *status,</span><br><span>@@ -506,8 +508,11 @@</span><br><span> </span><br><span> dest = (msr_t *)((u8 *)(ctx + 1)); /* point to the Register Array */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- for (i = 0 ; i < num ; i++)</span><br><span style="color: hsl(0, 100%, 40%);">- *(dest + i) = rdmsr(addr + i);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (1)</span><br><span style="color: hsl(120, 100%, 40%);">+ fake_msr_reads(dest, addr, num);</span><br><span style="color: hsl(120, 100%, 40%);">+ else</span><br><span style="color: hsl(120, 100%, 40%);">+ for (i = 0 ; i < num ; i++)</span><br><span style="color: hsl(120, 100%, 40%);">+ *(dest + i) = rdmsr(addr + i);</span><br><span> return ctx;</span><br><span> }</span><br><span> </span><br><span>diff --git a/src/soc/amd/stoneyridge/mca.c b/src/soc/amd/stoneyridge/mca.c</span><br><span>index 81d95fb..e762134 100644</span><br><span>--- a/src/soc/amd/stoneyridge/mca.c</span><br><span>+++ b/src/soc/amd/stoneyridge/mca.c</span><br><span>@@ -13,7 +13,9 @@</span><br><span> * GNU General Public License for more details.</span><br><span> */</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/x86/mp.h></span><br><span> #include <cpu/x86/msr.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cpu/x86/lapic.h></span><br><span> #include <arch/acpi.h></span><br><span> #include <cpu/amd/amdfam15.h></span><br><span> #include <soc/cpu.h></span><br><span>@@ -31,6 +33,84 @@</span><br><span> msr_t cmask;</span><br><span> };</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+void fake_msr_reads(msr_t *p, u32 addr, int num);</span><br><span style="color: hsl(120, 100%, 40%);">+void fake_msr_reads(msr_t *p, u32 addr, int num)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ int i;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* These are taken from actual failures we've seen */</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (addr) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0x404: /* 1 */</span><br><span style="color: hsl(120, 100%, 40%);">+ p[0].hi = 0x00000000; p[0].lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ p[1].hi = 0xfe000000; p[1].lo = 0x00100153;</span><br><span style="color: hsl(120, 100%, 40%);">+ p[2].hi = 0x00000000; p[2].lo = 0x00000009;</span><br><span style="color: hsl(120, 100%, 40%);">+ p[3].hi = 0xd01a0003; p[3].lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0x408: /* 2 */</span><br><span style="color: hsl(120, 100%, 40%);">+ p[0].hi = 0x00000000; p[0].lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ p[1].hi = 0xb6000000; p[1].lo = 0x0012010a;</span><br><span style="color: hsl(120, 100%, 40%);">+ p[2].hi = 0x00000000; p[2].lo = 0x00004500;</span><br><span style="color: hsl(120, 100%, 40%);">+ p[3].hi = 0xd0100000; p[3].lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0x410: /* 4 */</span><br><span style="color: hsl(120, 100%, 40%);">+ p[0].hi = 0x00000000; p[0].lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ p[1].hi = 0xb2000010; p[1].lo = 0x00020c0f;</span><br><span style="color: hsl(120, 100%, 40%);">+ p[2].hi = 0x00000000; p[2].lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ p[3].hi = 0xd0000000; p[3].lo = 0x01000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0x418: /* 6 */</span><br><span style="color: hsl(120, 100%, 40%);">+ p[0].hi = 0x00000000, p[0].lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ p[1].hi = 0xb2000000, p[1].lo = 0x00030e0f;</span><br><span style="color: hsl(120, 100%, 40%);">+ p[2].hi = 0x00000000, p[2].lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ p[3].hi = 0x00000000, p[3].lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0x400: /* 0 */</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0x40c: /* 3 */</span><br><span style="color: hsl(120, 100%, 40%);">+ case 0x414: /* 5 */</span><br><span style="color: hsl(120, 100%, 40%);">+ default:</span><br><span style="color: hsl(120, 100%, 40%);">+ for (i = 0 ; i < num ; i++)</span><br><span style="color: hsl(120, 100%, 40%);">+ p[i] = rdmsr(addr + i);</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void load_fake_msr_info(struct mca_bank *mci, int bank);</span><br><span style="color: hsl(120, 100%, 40%);">+void load_fake_msr_info(struct mca_bank *mci, int bank)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* These are taken from actual failures we've seen */</span><br><span style="color: hsl(120, 100%, 40%);">+ switch (bank) {</span><br><span style="color: hsl(120, 100%, 40%);">+ case 1: /* 1 */</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->bank = 1;</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->ctl.hi = 0x00000000; mci->ctl.lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->sts.hi = 0xfe000000; mci->sts.lo = 0x00100153;</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->addr.hi = 0x00000000; mci->addr.lo = 0x00000009;</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->misc.hi = 0xd01a0003; mci->misc.lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 2: /* 2 */</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->bank = 2;</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->ctl.hi = 0x00000000; mci->ctl.lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->sts.hi = 0xb6000000; mci->sts.lo = 0x0012010a;</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->addr.hi = 0x00000000; mci->addr.lo = 0x00004500;</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->misc.hi = 0xd0100000; mci->misc.lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 4: /* 4 */</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->bank = 4;</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->ctl.hi = 0x00000000; mci->ctl.lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->sts.hi = 0xb2000010; mci->sts.lo = 0x00020c0f;</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->addr.hi = 0x00000000; mci->addr.lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->misc.hi = 0xd0000000; mci->misc.lo = 0x01000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ case 6: /* 6 */</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->bank = 6;</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->ctl.hi = 0x00000000, mci->ctl.lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->sts.hi = 0xb2000000, mci->sts.lo = 0x00030e0f;</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->addr.hi = 0x00000000, mci->addr.lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ mci->misc.hi = 0x00000000, mci->misc.lo = 0x00000000;</span><br><span style="color: hsl(120, 100%, 40%);">+ break;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> static inline size_t mca_report_size_reqd(void)</span><br><span> {</span><br><span> size_t size;</span><br><span>@@ -180,6 +260,16 @@</span><br><span> cap = rdmsr(MCG_CAP);</span><br><span> num_banks = cap.lo & MCA_BANKS_MASK;</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(0, "======================= Adding Fake MC Errors ====================\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ if (boot_cpu()) {</span><br><span style="color: hsl(120, 100%, 40%);">+ load_fake_msr_info(&mci, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+ build_bert_mca_error(&mci);</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ load_fake_msr_info(&mci, 4);</span><br><span style="color: hsl(120, 100%, 40%);">+ build_bert_mca_error(&mci);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> if (is_warm_reset()) {</span><br><span> for (i = 0 ; i < num_banks ; i++) {</span><br><span> if (i == 3) /* Reserved in Family 15h */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28481">change 28481</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28481"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I413955fb0fcf0d98a89da647f6f70b0df25a923a </div>
<div style="display:none"> Gerrit-Change-Number: 28481 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marshall Dawson <marshalldawson3rd@gmail.com> </div>