<p>Marshall Dawson has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28474">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">amd/stoneyridge: Adjust memory map for reserved<br><br>Carve out memory to be reported to the OS as reserved. This makes<br>room for a region usable for Boot Error Record Table information.<br><br>BUG=b:65446699<br>TEST=inspect BERT region, and dmesg, on full patch stack. Use test<br> data plus a failing Grunt system.<br><br>Change-Id: I0958f6b6bab3fe9dae36c83e1fd9ae6ed0290a18<br>Signed-off-by: Marshall Dawson <marshalldawson3rd@gmail.com><br>---<br>M src/soc/amd/stoneyridge/ramtop.c<br>1 file changed, 19 insertions(+), 2 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/28474/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/amd/stoneyridge/ramtop.c b/src/soc/amd/stoneyridge/ramtop.c</span><br><span>index 24386ed..57bb71e 100644</span><br><span>--- a/src/soc/amd/stoneyridge/ramtop.c</span><br><span>+++ b/src/soc/amd/stoneyridge/ramtop.c</span><br><span>@@ -23,6 +23,7 @@</span><br><span> #include <cpu/amd/amdfam15.h></span><br><span> #include <cbmem.h></span><br><span> #include <stage_cache.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/bert_storage.h></span><br><span> #include <soc/northbridge.h></span><br><span> #include <soc/southbridge.h></span><br><span> </span><br><span>@@ -36,6 +37,21 @@</span><br><span> return biosram_read32(BIOSRAM_CBMEM_TOP);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#if IS_ENABLED(CONFIG_ACPI_BERT)</span><br><span style="color: hsl(120, 100%, 40%);">+#define BERT_REGION_MAX_SIZE CONFIG_SMM_TSEG_SIZE</span><br><span style="color: hsl(120, 100%, 40%);">+#else</span><br><span style="color: hsl(120, 100%, 40%);">+#define BERT_REGION_MAX_SIZE 0</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void bert_reserved_region(void **start, size_t *size)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ if (IS_ENABLED(CONFIG_ACPI_BERT))</span><br><span style="color: hsl(120, 100%, 40%);">+ *start = cbmem_top();</span><br><span style="color: hsl(120, 100%, 40%);">+ else</span><br><span style="color: hsl(120, 100%, 40%);">+ start = NULL;</span><br><span style="color: hsl(120, 100%, 40%);">+ *size = BERT_REGION_MAX_SIZE;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> void *cbmem_top(void)</span><br><span> {</span><br><span> msr_t tom = rdmsr(TOP_MEM);</span><br><span>@@ -45,12 +61,13 @@</span><br><span> else</span><br><span> /* 8MB alignment to keep MTRR usage low */</span><br><span> return (void *)ALIGN_DOWN(restore_top_of_low_cacheable()</span><br><span style="color: hsl(0, 100%, 40%);">- - CONFIG_SMM_TSEG_SIZE, 8*MiB);</span><br><span style="color: hsl(120, 100%, 40%);">+ - CONFIG_SMM_TSEG_SIZE</span><br><span style="color: hsl(120, 100%, 40%);">+ - BERT_REGION_MAX_SIZE, 8*MiB);</span><br><span> }</span><br><span> </span><br><span> static uintptr_t smm_region_start(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- return (uintptr_t)cbmem_top();</span><br><span style="color: hsl(120, 100%, 40%);">+ return (uintptr_t)cbmem_top() + BERT_REGION_MAX_SIZE;</span><br><span> }</span><br><span> </span><br><span> static size_t smm_region_size(void)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28474">change 28474</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28474"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I0958f6b6bab3fe9dae36c83e1fd9ae6ed0290a18 </div>
<div style="display:none"> Gerrit-Change-Number: 28474 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Marshall Dawson <marshalldawson3rd@gmail.com> </div>