<p>Sathyanarayana Nujella would like HARSHAPRIYA N to <strong>review</strong> this change.</p><p><a href="https://review.coreboot.org/28433">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/google/poppy/variants/nocturne: Enable DMIC CLK0/DATA0<br><br>DMIC's are now connected to DMIC_CLK0/DMIC_DATA0.<br>So, enable the pins accordingly.<br><br>BUG=b:113744731<br>BRANCH=none<br>TEST='emerge-nocturne coreboot chromeos-bootimage' builds the image<br><br>Change-Id: I48cace3c6099a2853fcb377c695a5e325094baf6<br>Signed-off-by: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com><br>Signed-off-by: Harsha Priya <harshapriya.n@intel.com><br>---<br>M src/mainboard/google/poppy/variants/nocturne/gpio.c<br>1 file changed, 4 insertions(+), 4 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/28433/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/poppy/variants/nocturne/gpio.c b/src/mainboard/google/poppy/variants/nocturne/gpio.c</span><br><span>index 782ce00..08bb801 100644</span><br><span>--- a/src/mainboard/google/poppy/variants/nocturne/gpio.c</span><br><span>+++ b/src/mainboard/google/poppy/variants/nocturne/gpio.c</span><br><span>@@ -199,10 +199,10 @@</span><br><span>       PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),</span><br><span>        /* D18 : DMIC_DATA1 ==> PCH_DMIC_DATA */</span><br><span>  PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),</span><br><span style="color: hsl(0, 100%, 40%);">-   /* D19 : DMIC_CLK0 ==> NC */</span><br><span style="color: hsl(0, 100%, 40%);">- PAD_CFG_NC(GPP_D19),</span><br><span style="color: hsl(0, 100%, 40%);">-    /* D20 : DMIC_DATA0 ==> NC */</span><br><span style="color: hsl(0, 100%, 40%);">-        PAD_CFG_NC(GPP_D20),</span><br><span style="color: hsl(120, 100%, 40%);">+  /* D19 : DMIC_CLK0 ==> PCH_DMIC_CLK_OUT */</span><br><span style="color: hsl(120, 100%, 40%);">+ PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),</span><br><span style="color: hsl(120, 100%, 40%);">+ /* D20 : DMIC_DATA0 ==> PCH_DMIC_DATA_IN */</span><br><span style="color: hsl(120, 100%, 40%);">+        PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),</span><br><span>        /* D21 : SPI1_IO2 ==> NC */</span><br><span>       PAD_CFG_NC(GPP_D21),</span><br><span>         /* D22 : SPI1_IO3 ==> NC */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28433">change 28433</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28433"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I48cace3c6099a2853fcb377c695a5e325094baf6 </div>
<div style="display:none"> Gerrit-Change-Number: 28433 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Sathyanarayana Nujella <sathyanarayana.nujella@intel.com> </div>
<div style="display:none"> Gerrit-Reviewer: HARSHAPRIYA N <harshapriya.n@intel.com> </div>