<p>Angel Pons has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28382">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">src/*/intel: introduce warning when building with no IFD<br><br>Add a warning as suggested in patch #28233 with the<br>"CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED" option.<br><br>Change-Id: I42b6b336bb519f3d18b5a41eb20b380636ff5819<br>Signed-off-by: Angel Pons <th3fanbus@gmail.com><br>---<br>M src/soc/intel/apollolake/Kconfig<br>M src/soc/intel/baytrail/Kconfig<br>M src/soc/intel/braswell/Kconfig<br>M src/soc/intel/broadwell/Kconfig<br>M src/soc/intel/cannonlake/Kconfig<br>M src/soc/intel/fsp_baytrail/Kconfig<br>M src/soc/intel/fsp_broadwell_de/Kconfig<br>M src/soc/intel/skylake/Kconfig<br>M src/southbridge/intel/bd82x6x/Kconfig<br>M src/southbridge/intel/common/Kconfig<br>M src/southbridge/intel/common/firmware/Makefile.inc<br>M src/southbridge/intel/fsp_bd82x6x/Kconfig<br>M src/southbridge/intel/fsp_i89xx/Kconfig<br>M src/southbridge/intel/fsp_rangeley/Kconfig<br>M src/southbridge/intel/ibexpeak/Kconfig<br>M src/southbridge/intel/lynxpoint/Kconfig<br>16 files changed, 28 insertions(+), 2 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/28382/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig</span><br><span>index 3e84a50..0ed8572 100644</span><br><span>--- a/src/soc/intel/apollolake/Kconfig</span><br><span>+++ b/src/soc/intel/apollolake/Kconfig</span><br><span>@@ -46,6 +46,7 @@</span><br><span> select FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS</span><br><span> select GENERIC_GPIO_LIB</span><br><span> select HAVE_INTEL_FIRMWARE</span><br><span style="color: hsl(120, 100%, 40%);">+ select INTEL_DESCRIPTOR_MODE_REQUIRED</span><br><span> select HAVE_SMI_HANDLER</span><br><span> select MRC_SETTINGS_PROTECT</span><br><span> select MRC_SETTINGS_VARIABLE_DATA</span><br><span>diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig</span><br><span>index b4dc823..9bd4c24 100644</span><br><span>--- a/src/soc/intel/baytrail/Kconfig</span><br><span>+++ b/src/soc/intel/baytrail/Kconfig</span><br><span>@@ -35,6 +35,7 @@</span><br><span> select UDELAY_TSC</span><br><span> select SOC_INTEL_COMMON</span><br><span> select HAVE_INTEL_FIRMWARE</span><br><span style="color: hsl(120, 100%, 40%);">+ select INTEL_DESCRIPTOR_MODE_REQUIRED</span><br><span> select HAVE_SPI_CONSOLE_SUPPORT</span><br><span> select INTEL_GMA_ACPI</span><br><span> select INTEL_GMA_SWSMISCI</span><br><span>diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig</span><br><span>index 607d78c..906a0c4 100644</span><br><span>--- a/src/soc/intel/braswell/Kconfig</span><br><span>+++ b/src/soc/intel/braswell/Kconfig</span><br><span>@@ -43,6 +43,7 @@</span><br><span> select UDELAY_TSC</span><br><span> select USE_GENERIC_FSP_CAR_INC</span><br><span> select HAVE_INTEL_FIRMWARE</span><br><span style="color: hsl(120, 100%, 40%);">+ select INTEL_DESCRIPTOR_MODE_REQUIRED</span><br><span> select HAVE_SPI_CONSOLE_SUPPORT</span><br><span> select HAVE_FSP_GOP</span><br><span> select GENERIC_GPIO_LIB</span><br><span>diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig</span><br><span>index 32148c4..dd5548b 100644</span><br><span>--- a/src/soc/intel/broadwell/Kconfig</span><br><span>+++ b/src/soc/intel/broadwell/Kconfig</span><br><span>@@ -36,6 +36,7 @@</span><br><span> select UDELAY_TSC</span><br><span> select SOC_INTEL_COMMON</span><br><span> select HAVE_INTEL_FIRMWARE</span><br><span style="color: hsl(120, 100%, 40%);">+ select INTEL_DESCRIPTOR_MODE_REQUIRED</span><br><span> select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE</span><br><span> select HAVE_SPI_CONSOLE_SUPPORT</span><br><span> select CPU_INTEL_COMMON</span><br><span>diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig</span><br><span>index ef39706..351f4b7 100644</span><br><span>--- a/src/soc/intel/cannonlake/Kconfig</span><br><span>+++ b/src/soc/intel/cannonlake/Kconfig</span><br><span>@@ -37,6 +37,7 @@</span><br><span> select HAVE_FSP_GOP</span><br><span> select HAVE_HARD_RESET</span><br><span> select HAVE_INTEL_FIRMWARE</span><br><span style="color: hsl(120, 100%, 40%);">+ select INTEL_DESCRIPTOR_MODE_REQUIRED</span><br><span> select HAVE_MONOTONIC_TIMER</span><br><span> select HAVE_SMI_HANDLER</span><br><span> select IDT_IN_EVERY_STAGE</span><br><span>diff --git a/src/soc/intel/fsp_baytrail/Kconfig b/src/soc/intel/fsp_baytrail/Kconfig</span><br><span>index 68084bc..d17598b 100644</span><br><span>--- a/src/soc/intel/fsp_baytrail/Kconfig</span><br><span>+++ b/src/soc/intel/fsp_baytrail/Kconfig</span><br><span>@@ -42,6 +42,7 @@</span><br><span> select UDELAY_TSC</span><br><span> select SUPPORT_CPU_UCODE_IN_CBFS</span><br><span> select HAVE_INTEL_FIRMWARE</span><br><span style="color: hsl(120, 100%, 40%);">+ select INTEL_DESCRIPTOR_MODE_REQUIRED</span><br><span> select HAVE_SPI_CONSOLE_SUPPORT</span><br><span> </span><br><span> # Microcode header files are delivered in FSP package</span><br><span>diff --git a/src/soc/intel/fsp_broadwell_de/Kconfig b/src/soc/intel/fsp_broadwell_de/Kconfig</span><br><span>index cc3e6e2..08b3b0f 100644</span><br><span>--- a/src/soc/intel/fsp_broadwell_de/Kconfig</span><br><span>+++ b/src/soc/intel/fsp_broadwell_de/Kconfig</span><br><span>@@ -23,6 +23,7 @@</span><br><span> # Microcode header files are delivered in FSP package</span><br><span> select USES_MICROCODE_HEADER_FILES if HAVE_FSP_BIN</span><br><span> select HAVE_INTEL_FIRMWARE</span><br><span style="color: hsl(120, 100%, 40%);">+ select INTEL_DESCRIPTOR_MODE_REQUIRED</span><br><span> select SMM_TSEG</span><br><span> select HAVE_SMI_HANDLER</span><br><span> select TSC_MONOTONIC_TIMER</span><br><span>diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig</span><br><span>index 9412b03..7066eb0 100644</span><br><span>--- a/src/soc/intel/skylake/Kconfig</span><br><span>+++ b/src/soc/intel/skylake/Kconfig</span><br><span>@@ -33,6 +33,7 @@</span><br><span> select HAVE_FSP_GOP</span><br><span> select HAVE_HARD_RESET</span><br><span> select HAVE_INTEL_FIRMWARE</span><br><span style="color: hsl(120, 100%, 40%);">+ select INTEL_DESCRIPTOR_MODE_REQUIRED</span><br><span> select HAVE_MONOTONIC_TIMER</span><br><span> select HAVE_SMI_HANDLER</span><br><span> select INTEL_GMA_ACPI</span><br><span>diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig</span><br><span>index c028595..b073d26 100644</span><br><span>--- a/src/southbridge/intel/bd82x6x/Kconfig</span><br><span>+++ b/src/southbridge/intel/bd82x6x/Kconfig</span><br><span>@@ -38,6 +38,7 @@</span><br><span> select COMMON_FADT</span><br><span> select ACPI_SATA_GENERATOR</span><br><span> select HAVE_INTEL_FIRMWARE</span><br><span style="color: hsl(120, 100%, 40%);">+ select INTEL_DESCRIPTOR_MODE_REQUIRED</span><br><span> select SOUTHBRIDGE_INTEL_COMMON_GPIO</span><br><span> select RTC</span><br><span> select HAVE_INTEL_CHIPSET_LOCKDOWN</span><br><span>diff --git a/src/southbridge/intel/common/Kconfig b/src/southbridge/intel/common/Kconfig</span><br><span>index 4f8a407..be1203a 100644</span><br><span>--- a/src/southbridge/intel/common/Kconfig</span><br><span>+++ b/src/southbridge/intel/common/Kconfig</span><br><span>@@ -25,6 +25,11 @@</span><br><span> config SOUTHBRIDGE_INTEL_COMMON_SMM</span><br><span> def_bool n</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+config INTEL_DESCRIPTOR_MODE_REQUIRED</span><br><span style="color: hsl(120, 100%, 40%);">+ # This config states that the platform *requires* running in</span><br><span style="color: hsl(120, 100%, 40%);">+ # descriptor mode to be usable (prevent Platform Disable Wait).</span><br><span style="color: hsl(120, 100%, 40%);">+ def_bool n</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> config INTEL_CHIPSET_LOCKDOWN</span><br><span> depends on HAVE_INTEL_CHIPSET_LOCKDOWN && HAVE_SMI_HANDLER && !CHROMEOS</span><br><span> #ChromeOS's payload seems to handle finalization on its on.</span><br><span>diff --git a/src/southbridge/intel/common/firmware/Makefile.inc b/src/southbridge/intel/common/firmware/Makefile.inc</span><br><span>index 426863c..1b7e320 100644</span><br><span>--- a/src/southbridge/intel/common/firmware/Makefile.inc</span><br><span>+++ b/src/southbridge/intel/common/firmware/Makefile.inc</span><br><span>@@ -20,9 +20,7 @@</span><br><span> # that adds additional components to the final firmware</span><br><span> # image outside of CBFS</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-ifeq ($(CONFIG_HAVE_IFD_BIN),y)</span><br><span> INTERMEDIATE+=add_intel_firmware</span><br><span style="color: hsl(0, 100%, 40%);">-endif</span><br><span> </span><br><span> IFD_BIN_PATH := $(CONFIG_IFD_BIN_PATH)</span><br><span> ifneq ($(call strip_quotes,$(CONFIG_IFD_CHIPSET)),)</span><br><span>@@ -30,6 +28,7 @@</span><br><span> endif</span><br><span> </span><br><span> add_intel_firmware: $(obj)/coreboot.pre $(IFDTOOL)</span><br><span style="color: hsl(120, 100%, 40%);">+ifeq ($(CONFIG_HAVE_IFD_BIN),y)</span><br><span> printf " DD Adding Intel Firmware Descriptor\n"</span><br><span> dd if=$(IFD_BIN_PATH) \</span><br><span> of=$(obj)/coreboot.pre conv=notrunc >/dev/null 2>&1</span><br><span>@@ -85,6 +84,14 @@</span><br><span> mv $(obj)/coreboot.pre.new $(obj)/coreboot.pre</span><br><span> endif</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+else ifeq ($(CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED),y)</span><br><span style="color: hsl(120, 100%, 40%);">+ printf "\n\t** WARNING **\n"</span><br><span style="color: hsl(120, 100%, 40%);">+ printf "coreboot will be built without an Intel Firmware Descriptor.\n"</span><br><span style="color: hsl(120, 100%, 40%);">+ printf "Never write a complete coreboot.rom without an IFD to your\n"</span><br><span style="color: hsl(120, 100%, 40%);">+ printf "board's flash chip! You can use flashrom's IFD or layout\n"</span><br><span style="color: hsl(120, 100%, 40%);">+ printf "parameters to flash only to the BIOS region.\n\n"</span><br><span style="color: hsl(120, 100%, 40%);">+endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> PHONY+=add_intel_firmware</span><br><span> </span><br><span> endif</span><br><span>diff --git a/src/southbridge/intel/fsp_bd82x6x/Kconfig b/src/southbridge/intel/fsp_bd82x6x/Kconfig</span><br><span>index 877a335..9c12d40 100644</span><br><span>--- a/src/southbridge/intel/fsp_bd82x6x/Kconfig</span><br><span>+++ b/src/southbridge/intel/fsp_bd82x6x/Kconfig</span><br><span>@@ -30,6 +30,7 @@</span><br><span> select PCIEXP_COMMON_CLOCK</span><br><span> select COMMON_FADT</span><br><span> select HAVE_INTEL_FIRMWARE</span><br><span style="color: hsl(120, 100%, 40%);">+ select INTEL_DESCRIPTOR_MODE_REQUIRED</span><br><span> select SOUTHBRIDGE_INTEL_COMMON</span><br><span> select SOUTHBRIDGE_INTEL_COMMON_SMBUS</span><br><span> select SOUTHBRIDGE_INTEL_COMMON_SPI</span><br><span>diff --git a/src/southbridge/intel/fsp_i89xx/Kconfig b/src/southbridge/intel/fsp_i89xx/Kconfig</span><br><span>index d0cb45c..b899567 100644</span><br><span>--- a/src/southbridge/intel/fsp_i89xx/Kconfig</span><br><span>+++ b/src/southbridge/intel/fsp_i89xx/Kconfig</span><br><span>@@ -30,6 +30,7 @@</span><br><span> select PCIEXP_COMMON_CLOCK</span><br><span> select COMMON_FADT</span><br><span> select HAVE_INTEL_FIRMWARE</span><br><span style="color: hsl(120, 100%, 40%);">+ select INTEL_DESCRIPTOR_MODE_REQUIRED</span><br><span> select NO_EARLY_BOOTBLOCK_POSTCODES</span><br><span> select SOUTHBRIDGE_INTEL_COMMON</span><br><span> select SOUTHBRIDGE_INTEL_COMMON_SMBUS</span><br><span>diff --git a/src/southbridge/intel/fsp_rangeley/Kconfig b/src/southbridge/intel/fsp_rangeley/Kconfig</span><br><span>index ab85ec4..44412c9 100644</span><br><span>--- a/src/southbridge/intel/fsp_rangeley/Kconfig</span><br><span>+++ b/src/southbridge/intel/fsp_rangeley/Kconfig</span><br><span>@@ -30,6 +30,7 @@</span><br><span> select PCIEXP_COMMON_CLOCK</span><br><span> select SPI_FLASH</span><br><span> select HAVE_INTEL_FIRMWARE</span><br><span style="color: hsl(120, 100%, 40%);">+ select INTEL_DESCRIPTOR_MODE_REQUIRED</span><br><span> select SOUTHBRIDGE_INTEL_COMMON</span><br><span> select SOUTHBRIDGE_INTEL_COMMON_SMBUS</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/ibexpeak/Kconfig b/src/southbridge/intel/ibexpeak/Kconfig</span><br><span>index d377950..727c630 100644</span><br><span>--- a/src/southbridge/intel/ibexpeak/Kconfig</span><br><span>+++ b/src/southbridge/intel/ibexpeak/Kconfig</span><br><span>@@ -36,6 +36,7 @@</span><br><span> select COMMON_FADT</span><br><span> select ACPI_SATA_GENERATOR</span><br><span> select HAVE_INTEL_FIRMWARE</span><br><span style="color: hsl(120, 100%, 40%);">+ select INTEL_DESCRIPTOR_MODE_REQUIRED</span><br><span> select SOUTHBRIDGE_INTEL_COMMON_GPIO</span><br><span> select HAVE_INTEL_CHIPSET_LOCKDOWN</span><br><span> </span><br><span>diff --git a/src/southbridge/intel/lynxpoint/Kconfig b/src/southbridge/intel/lynxpoint/Kconfig</span><br><span>index ee870fc..5a07b7e 100644</span><br><span>--- a/src/southbridge/intel/lynxpoint/Kconfig</span><br><span>+++ b/src/southbridge/intel/lynxpoint/Kconfig</span><br><span>@@ -31,6 +31,7 @@</span><br><span> select PCIEXP_ASPM</span><br><span> select PCIEXP_COMMON_CLOCK</span><br><span> select HAVE_INTEL_FIRMWARE</span><br><span style="color: hsl(120, 100%, 40%);">+ select INTEL_DESCRIPTOR_MODE_REQUIRED</span><br><span> select HAVE_SPI_CONSOLE_SUPPORT</span><br><span> select RTC</span><br><span> select SOUTHBRIDGE_INTEL_COMMON_GPIO if !INTEL_LYNXPOINT_LP</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28382">change 28382</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I42b6b336bb519f3d18b5a41eb20b380636ff5819 </div>
<div style="display:none"> Gerrit-Change-Number: 28382 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Angel Pons <th3fanbus@gmail.com> </div>