<p>Aamir Bohra has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28358">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">intel/fsp2_0: Add FSP_NXT shared stack feature support<br><br>FSP_NXT implementation is adding features on top of fsp2_0.<br>One such feature is a shared stack implementation that requires<br>coreboot to allocate stack for fspm and fspm then uses the same<br>stack as coreboot. This implementation adds support for shared<br>stack feature.<br><br>Change-Id: I6581111dbaddfa403eca14100577ccc8a05c4ec7<br>Signed-off-by: Aamir Bohra <aamir.bohra@intel.com><br>---<br>M src/arch/x86/car.ld<br>M src/drivers/intel/fsp2_0/Kconfig<br>M src/drivers/intel/fsp2_0/memory_init.c<br>3 files changed, 37 insertions(+), 15 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/28358/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld</span><br><span>index 7122776..b0c23c8 100644</span><br><span>--- a/src/arch/x86/car.ld</span><br><span>+++ b/src/arch/x86/car.ld</span><br><span>@@ -36,6 +36,9 @@</span><br><span> * the stack size. */</span><br><span> #if IS_ENABLED(CONFIG_C_ENVIRONMENT_BOOTBLOCK)</span><br><span> _car_stack_start = .;</span><br><span style="color: hsl(120, 100%, 40%);">+#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP_NXT)</span><br><span style="color: hsl(120, 100%, 40%);">+ . += CONFIG_FSP_NXT_STACK_SIZE;</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span> . += CONFIG_DCACHE_BSP_STACK_SIZE;</span><br><span> _car_stack_end = .;</span><br><span> #endif</span><br><span>diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig</span><br><span>index f149544..d7bcbd3 100644</span><br><span>--- a/src/drivers/intel/fsp2_0/Kconfig</span><br><span>+++ b/src/drivers/intel/fsp2_0/Kconfig</span><br><span>@@ -19,6 +19,13 @@</span><br><span> help</span><br><span> Include FSP 2.0 wrappers and functionality</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+config PLATFORM_USES_FSP_NXT</span><br><span style="color: hsl(120, 100%, 40%);">+ bool</span><br><span style="color: hsl(120, 100%, 40%);">+ default n</span><br><span style="color: hsl(120, 100%, 40%);">+ select PLATFORM_USES_FSP2_0</span><br><span style="color: hsl(120, 100%, 40%);">+ help</span><br><span style="color: hsl(120, 100%, 40%);">+ Include FSP next feature support</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> if PLATFORM_USES_FSP2_0</span><br><span> </span><br><span> config ADD_FSP_BINARIES</span><br><span>@@ -133,4 +140,12 @@</span><br><span> This allows deployed systems to bump their version number</span><br><span> with the same FSP which will trigger a retrain of the memory.</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+config FSP_NXT_STACK_SIZE</span><br><span style="color: hsl(120, 100%, 40%);">+ hex</span><br><span style="color: hsl(120, 100%, 40%);">+ depends on PLATFORM_USES_FSP_NXT</span><br><span style="color: hsl(120, 100%, 40%);">+ default 0x20000</span><br><span style="color: hsl(120, 100%, 40%);">+ help</span><br><span style="color: hsl(120, 100%, 40%);">+ Stack size to be allocated for fsp-m. The FSP NXT version expects</span><br><span style="color: hsl(120, 100%, 40%);">+ the stack being allocated from coreboot and it uses the same stack</span><br><span style="color: hsl(120, 100%, 40%);">+ as coreboot.</span><br><span> endif</span><br><span>diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c</span><br><span>index cf033d7..aa13872 100644</span><br><span>--- a/src/drivers/intel/fsp2_0/memory_init.c</span><br><span>+++ b/src/drivers/intel/fsp2_0/memory_init.c</span><br><span>@@ -170,22 +170,26 @@</span><br><span> bool s3wake, uint32_t fsp_version,</span><br><span> const struct memranges *memmap)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- uintptr_t stack_begin;</span><br><span style="color: hsl(0, 100%, 40%);">- uintptr_t stack_end;</span><br><span style="color: hsl(120, 100%, 40%);">+ if (!IS_ENABLED(CONFIG_PLATFORM_USES_FSP_NXT))</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ uintptr_t stack_begin;</span><br><span style="color: hsl(120, 100%, 40%);">+ uintptr_t stack_end;</span><br><span style="color: hsl(120, 100%, 40%);">+ /*</span><br><span style="color: hsl(120, 100%, 40%);">+ * FSPM_UPD passed here is populated with default values provided by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the blob itself. We let FSPM use top of CAR region of the size it</span><br><span style="color: hsl(120, 100%, 40%);">+ * requests.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+ stack_end = (uintptr_t)_car_region_end;</span><br><span style="color: hsl(120, 100%, 40%);">+ stack_begin = stack_end - arch_upd->StackSize;</span><br><span style="color: hsl(120, 100%, 40%);">+ if (check_region_overlap(memmap, "FSPM stack", stack_begin,</span><br><span style="color: hsl(120, 100%, 40%);">+ stack_end) != CB_SUCCESS)</span><br><span style="color: hsl(120, 100%, 40%);">+ return CB_ERR;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- /*</span><br><span style="color: hsl(0, 100%, 40%);">- * FSPM_UPD passed here is populated with default values provided by</span><br><span style="color: hsl(0, 100%, 40%);">- * the blob itself. We let FSPM use top of CAR region of the size it</span><br><span style="color: hsl(0, 100%, 40%);">- * requests.</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">- stack_end = (uintptr_t)_car_region_end;</span><br><span style="color: hsl(0, 100%, 40%);">- stack_begin = stack_end - arch_upd->StackSize;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (check_region_overlap(memmap, "FSPM stack", stack_begin,</span><br><span style="color: hsl(0, 100%, 40%);">- stack_end) != CB_SUCCESS)</span><br><span style="color: hsl(0, 100%, 40%);">- return CB_ERR;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- arch_upd->StackBase = (void *)stack_begin;</span><br><span style="color: hsl(120, 100%, 40%);">+ arch_upd->StackBase = (void *)stack_begin;</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ arch_upd->StackBase = (void *)_car_stack_end;</span><br><span style="color: hsl(120, 100%, 40%);">+ arch_upd->StackSize = CONFIG_FSP_NXT_STACK_SIZE;</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> </span><br><span> fsp_fill_mrc_cache(arch_upd, fsp_version);</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28358">change 28358</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I6581111dbaddfa403eca14100577ccc8a05c4ec7 </div>
<div style="display:none"> Gerrit-Change-Number: 28358 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Aamir Bohra <aamir.bohra@intel.com> </div>