<p>Lijian Zhao has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28366">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel/cannonlake: Fix comment errors for SMBUS<br><br>On CannonLake PCH, SMBUS stays at Bus 0 Device 31 and Function 4,<br>previous comment in southbridge.asl mention it as Function 3 that was a<br>mistake.<br><br>BUG=N/A<br>TEST=N/A<br><br>Change-Id: I29786457379809b6fcb592e1136ff612539e24dc<br>Signed-off-by: Lijian Zhao <lijian.zhao@intel.com><br>---<br>M src/soc/intel/cannonlake/acpi/southbridge.asl<br>1 file changed, 1 insertion(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/28366/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/cannonlake/acpi/southbridge.asl b/src/soc/intel/cannonlake/acpi/southbridge.asl</span><br><span>index 4a62485..e4f29b6 100644</span><br><span>--- a/src/soc/intel/cannonlake/acpi/southbridge.asl</span><br><span>+++ b/src/soc/intel/cannonlake/acpi/southbridge.asl</span><br><span>@@ -37,7 +37,7 @@</span><br><span> /* Serial IO */</span><br><span> #include "serialio.asl"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-/* SMBus 0:1f.3 */</span><br><span style="color: hsl(120, 100%, 40%);">+/* SMBus 0:1f.4 */</span><br><span> #include "smbus.asl"</span><br><span> </span><br><span> /* USB XHCI 0:14.0 */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28366">change 28366</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28366"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I29786457379809b6fcb592e1136ff612539e24dc </div>
<div style="display:none"> Gerrit-Change-Number: 28366 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Lijian Zhao <lijian.zhao@intel.com> </div>