<p>Kevin Chiu has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28353">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">google/grunt: Reset BayHub EMMC freq to SD base CLK 50MHz<br><br>Bayhub eMMC controller default runs SD base 50MHz at the first power on.<br>After boot into OS, mmc kernel driver will config controller to HS200/208MHz<br>and send MMC CMD21 (tuning block).<br>But Bayhub PCR register 0x3E4[22] (eMMC MODE select) is not clear<br>after system warn reset.<br>So eMMC will still run 208Mhz but there is no block tuning cmd in depthcharge.<br>It will cause two Sandisk eMMC (SDINBDA4-64G-V/SDINBDA4-32G-V) failing to<br>load kernel and trap in 0x5B error (No bootable kernel found on disk).<br><br>BUG=b:111964336<br>BRANCH=master<br>TEST=emerge-grunt coreboot<br>Change-Id: Ic080682e67323577c7f0ba4ed08f8adafca620cc<br>Signed-off-by: Kevin Chiu <Kevin.Chiu@quantatw.com><br>---<br>M src/drivers/generic/bayhub/bh720.c<br>M src/drivers/generic/bayhub/bh720.h<br>M src/mainboard/google/kahlee/variants/baseboard/mainboard.c<br>3 files changed, 43 insertions(+), 4 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/28353/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/drivers/generic/bayhub/bh720.c b/src/drivers/generic/bayhub/bh720.c</span><br><span>index b689b67..0441683 100644</span><br><span>--- a/src/drivers/generic/bayhub/bh720.c</span><br><span>+++ b/src/drivers/generic/bayhub/bh720.c</span><br><span>@@ -23,7 +23,7 @@</span><br><span> #include "chip.h"</span><br><span> #include "bh720.h"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-__attribute__((weak)) void bh720_driving_strength(struct device *dev)</span><br><span style="color: hsl(120, 100%, 40%);">+__attribute__((weak)) void board_bh720(struct device *dev)</span><br><span> {</span><br><span> }</span><br><span> </span><br><span>@@ -55,7 +55,7 @@</span><br><span> pci_read_config32(dev, BH720_LINK_CTRL));</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- bh720_driving_strength(dev);</span><br><span style="color: hsl(120, 100%, 40%);">+ board_bh720(dev);</span><br><span> }</span><br><span> </span><br><span> static struct pci_operations pci_ops = {</span><br><span>diff --git a/src/drivers/generic/bayhub/bh720.h b/src/drivers/generic/bayhub/bh720.h</span><br><span>index b6fd273..3a4b3b6 100644</span><br><span>--- a/src/drivers/generic/bayhub/bh720.h</span><br><span>+++ b/src/drivers/generic/bayhub/bh720.h</span><br><span>@@ -35,13 +35,20 @@</span><br><span> </span><br><span> BH720_MEM_RW_DATA = 0x200,</span><br><span> BH720_MEM_RW_ADR = 0x204,</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_MEM_RW_READ = BIT(30),</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_MEM_RW_WRITE = BIT(31),</span><br><span> BH720_MEM_ACCESS_EN = 0x208,</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_PCR = 0x304,</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_PCR_DrvStrength_PLL = 0x304,</span><br><span> BH720_PCR_DATA_CMD_DRV_MAX = 7,</span><br><span> BH720_PCR_CLK_DRV_MAX = 7,</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_PCR_EMMC_SETTING = 0x308,</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_PCR_EMMC_SETTING_1_8V = BIT(4),</span><br><span> </span><br><span> BH720_RTD3_L1 = 0x3e0,</span><br><span> BH720_RTD3_L1_DISABLE_L1 = BIT(28),</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_PCR_CSR = 0x3e4,</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_PCR_CSR_EMMC_MODE_SEL = BIT(22),</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void bh720_driving_strength(struct device *dev);</span><br><span style="color: hsl(120, 100%, 40%);">+void board_bh720(struct device *dev);</span><br><span>diff --git a/src/mainboard/google/kahlee/variants/baseboard/mainboard.c b/src/mainboard/google/kahlee/variants/baseboard/mainboard.c</span><br><span>index cf38b99..252829e 100644</span><br><span>--- a/src/mainboard/google/kahlee/variants/baseboard/mainboard.c</span><br><span>+++ b/src/mainboard/google/kahlee/variants/baseboard/mainboard.c</span><br><span>@@ -17,6 +17,8 @@</span><br><span> #include <baseboard/variants.h></span><br><span> #include <gpio.h></span><br><span> #include <variant/gpio.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pci.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <drivers/generic/bayhub/bh720.h></span><br><span> </span><br><span> uint8_t variant_board_sku(void)</span><br><span> {</span><br><span>@@ -35,3 +37,33 @@</span><br><span> gpio_set(GPIO_133, 0);</span><br><span> }</span><br><span> #endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void board_bh720(struct device *dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 sdbar;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 bh720_pcr_data;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ sdbar = pci_read_config32(dev, PCI_BASE_ADDRESS_1);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Enable Memory Access Function */</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(sdbar + BH720_MEM_ACCESS_EN), 0x40000000);</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(sdbar + BH720_MEM_RW_DATA), 0x80000000);</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(sdbar + BH720_MEM_RW_ADR), 0x800000D0);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ // Set EMMC VCCQ 1.8V PCR 0x308[4]</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(sdbar + BH720_MEM_RW_ADR), BH720_MEM_RW_READ | BH720_PCR_EMMC_SETTING);</span><br><span style="color: hsl(120, 100%, 40%);">+ bh720_pcr_data = read32((void *)(sdbar + BH720_MEM_RW_DATA));</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(sdbar + BH720_MEM_RW_DATA), bh720_pcr_data | BH720_PCR_EMMC_SETTING_1_8V);</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(sdbar + BH720_MEM_RW_ADR), BH720_MEM_RW_WRITE | BH720_PCR_EMMC_SETTING);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ // Set Bayhub SD base CLK 50MHz: case#1 PCR 0x3E4[22] = 0</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(sdbar + BH720_MEM_RW_ADR), BH720_MEM_RW_READ | BH720_PCR_CSR);</span><br><span style="color: hsl(120, 100%, 40%);">+ bh720_pcr_data = read32((void *)(sdbar + BH720_MEM_RW_DATA));</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(sdbar + BH720_MEM_RW_DATA), bh720_pcr_data & ~BH720_PCR_CSR_EMMC_MODE_SEL);</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(sdbar + BH720_MEM_RW_ADR), BH720_MEM_RW_WRITE | BH720_PCR_CSR);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Disable Memroy Access */</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(sdbar + BH720_MEM_RW_DATA), 0x80000001);</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(sdbar + BH720_MEM_RW_ADR), 0x800000D0);</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(sdbar + BH720_MEM_ACCESS_EN), 0x80000000);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28353">change 28353</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ic080682e67323577c7f0ba4ed08f8adafca620cc </div>
<div style="display:none"> Gerrit-Change-Number: 28353 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Kevin Chiu <Kevin.Chiu@quantatw.com> </div>