<p>Tristan Hsieh has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28251">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">google/kukui: Init SPI bus for EC<br><br>Set EC SPI bus config and init SPI bus according to the config.<br><br>BUG=b:80501386<br>BRANCH=none<br>TEST=Boots correctly on Kukui<br><br>Change-Id: Id9209b6429417430cfcf7f5a5a1659e7e4bc7866<br>Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com><br>---<br>M src/mainboard/google/kukui/Kconfig<br>M src/mainboard/google/kukui/bootblock.c<br>2 files changed, 5 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/28251/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/kukui/Kconfig b/src/mainboard/google/kukui/Kconfig</span><br><span>index 6714b44..9e01464 100644</span><br><span>--- a/src/mainboard/google/kukui/Kconfig</span><br><span>+++ b/src/mainboard/google/kukui/Kconfig</span><br><span>@@ -25,4 +25,8 @@</span><br><span>    int</span><br><span>  default 1</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+config EC_GOOGLE_CHROMEEC_SPI_BUS</span><br><span style="color: hsl(120, 100%, 40%);">+      hex</span><br><span style="color: hsl(120, 100%, 40%);">+   default 0x2</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> endif</span><br><span>diff --git a/src/mainboard/google/kukui/bootblock.c b/src/mainboard/google/kukui/bootblock.c</span><br><span>index fa51488..a9bad4e 100644</span><br><span>--- a/src/mainboard/google/kukui/bootblock.c</span><br><span>+++ b/src/mainboard/google/kukui/bootblock.c</span><br><span>@@ -29,5 +29,6 @@</span><br><span>      /* Turn on real eMMC. */</span><br><span>     gpio_output(BOOTBLOCK_EN_L, 1);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+   mtk_spi_init(CONFIG_EC_GOOGLE_CHROMEEC_SPI_BUS, SPI_PAD0_MASK, 6 * MHz);</span><br><span>     mtk_spi_init(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, SPI_PAD0_MASK, 26 * MHz);</span><br><span> }</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28251">change 28251</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28251"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Id9209b6429417430cfcf7f5a5a1659e7e4bc7866 </div>
<div style="display:none"> Gerrit-Change-Number: 28251 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Tristan Hsieh <tristan.shieh@mediatek.com> </div>