<p>Richard Spiegel has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28247">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/amd/stoneyridge/smihandler.c: Report pending wake event<br><br>There's a small window of opportunity when CPU is already in SMM but has<br>not yet entered S3 for a wake event to happen, which would cause a failed<br>S3 entry. Check for pending events at the very last moment possible, and<br>if there are pending wake events report them.<br><br>BUG=b:111100312<br>TEST=build and boot grunt.<br><br>Change-Id: I9472fdf481897fcf9f4c669f6b1514ef479fce7a<br>Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com><br>---<br>M src/soc/amd/stoneyridge/smihandler.c<br>1 file changed, 29 insertions(+), 1 deletion(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/28247/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/amd/stoneyridge/smihandler.c b/src/soc/amd/stoneyridge/smihandler.c</span><br><span>index ef24baa..f00ead6 100644</span><br><span>--- a/src/soc/amd/stoneyridge/smihandler.c</span><br><span>+++ b/src/soc/amd/stoneyridge/smihandler.c</span><br><span>@@ -122,7 +122,8 @@</span><br><span> </span><br><span> static void sb_slp_typ_handler(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">-      uint32_t pm1cnt, pci_ctrl;</span><br><span style="color: hsl(120, 100%, 40%);">+    uint32_t pm1cnt, pci_ctrl, reg32;</span><br><span style="color: hsl(120, 100%, 40%);">+     uint16_t reg16;</span><br><span>      uint8_t slp_typ, rst_ctrl;</span><br><span> </span><br><span>       /* Figure out SLP_TYP */</span><br><span>@@ -171,6 +172,33 @@</span><br><span>              rst_ctrl |= SLPTYPE_CONTROL_EN;</span><br><span>              pm_write8(PM_RST_CTRL1, rst_ctrl);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+                /*</span><br><span style="color: hsl(120, 100%, 40%);">+             * Before the final command, check if there's pending wake</span><br><span style="color: hsl(120, 100%, 40%);">+                 * event. Read enable first, so that reading the actual status</span><br><span style="color: hsl(120, 100%, 40%);">+                 * is as close as possible to entering S3. The idea is to</span><br><span style="color: hsl(120, 100%, 40%);">+              * minimize the opportunity for a wake event to happen before</span><br><span style="color: hsl(120, 100%, 40%);">+          * actually entering S3. If there's a pending wake event, log</span><br><span style="color: hsl(120, 100%, 40%);">+              * it and continue normal path. S3 will fail and the wake event</span><br><span style="color: hsl(120, 100%, 40%);">+                * becomes a SCI.</span><br><span style="color: hsl(120, 100%, 40%);">+              */</span><br><span style="color: hsl(120, 100%, 40%);">+           reg16 = inw(ACPI_PM1_EN);</span><br><span style="color: hsl(120, 100%, 40%);">+             reg32 = inl(ACPI_GPE0_EN);</span><br><span style="color: hsl(120, 100%, 40%);">+            if (IS_ENABLED(CONFIG_ELOG_GSMI)) {</span><br><span style="color: hsl(120, 100%, 40%);">+                   if ((reg16 & inw(ACPI_PM1_STS))  ||</span><br><span style="color: hsl(120, 100%, 40%);">+                           (reg32 & inl(ACPI_GPE0_STS))) {</span><br><span style="color: hsl(120, 100%, 40%);">+                               reg16 &= inw(ACPI_PM1_STS);</span><br><span style="color: hsl(120, 100%, 40%);">+                               if (reg16)</span><br><span style="color: hsl(120, 100%, 40%);">+                                    elog_add_error(</span><br><span style="color: hsl(120, 100%, 40%);">+                                               ELOG_SLEEP_PENDING_PM1_WAKE,</span><br><span style="color: hsl(120, 100%, 40%);">+                                          (u32)reg16);</span><br><span style="color: hsl(120, 100%, 40%);">+                          reg32 &= inl(ACPI_GPE0_STS);</span><br><span style="color: hsl(120, 100%, 40%);">+                              if (reg32)</span><br><span style="color: hsl(120, 100%, 40%);">+                                    elog_add_error(</span><br><span style="color: hsl(120, 100%, 40%);">+                                               ELOG_SLEEP_PENDING_GPE0_WAKE,</span><br><span style="color: hsl(120, 100%, 40%);">+                                         reg32);</span><br><span style="color: hsl(120, 100%, 40%);">+                       }</span><br><span style="color: hsl(120, 100%, 40%);">+             } /* if (IS_ENABLED(CONFIG_ELOG_GSMI)) */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>          /* Reissue Pm1 write */</span><br><span>              outl(pm1cnt | SLP_EN, pm_acpi_pm_cnt_blk());</span><br><span>                 hlt();</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28247">change 28247</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28247"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I9472fdf481897fcf9f4c669f6b1514ef479fce7a </div>
<div style="display:none"> Gerrit-Change-Number: 28247 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Richard Spiegel <richard.spiegel@silverbackltd.com> </div>