<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28226">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">superio/ite/it8721f: Add SuperIO ACPI declarations<br><br>Change-Id: I074d57fa5b140b6946ae81beb210fefac48a66eb<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>A src/superio/ite/it8721f/acpi/superio.asl<br>1 file changed, 171 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/28226/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/superio/ite/it8721f/acpi/superio.asl b/src/superio/ite/it8721f/acpi/superio.asl</span><br><span>new file mode 100644</span><br><span>index 0000000..39f2543</span><br><span>--- /dev/null</span><br><span>+++ b/src/superio/ite/it8721f/acpi/superio.asl</span><br><span>@@ -0,0 +1,171 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2011 Christoph Grenz <christophg+cb@grenz-bonn.de></span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2013, 2016 secunet Security Networks AG</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright (C) 2017 Samuel Holland <samuel@sholland.org></span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Include this file into a mainboard's DSDT _SB device tree and it will</span><br><span style="color: hsl(120, 100%, 40%);">+ * expose the IT8721F SuperIO and some of its functionality.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * It allows the change of IO ports, IRQs and DMA settings on logical</span><br><span style="color: hsl(120, 100%, 40%);">+ * devices, disabling and reenabling logical devices.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * LDN State</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x0 FDC Not implemented</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x1 SP1 Implemented</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x2 SP2 Implemented</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x3 PP Not implemented</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x4 EC Implemented, untested</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x5 KBCK Implemented, untested</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x6 KBCM Implemented, untested</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0x7 GPIO Not implemented</span><br><span style="color: hsl(120, 100%, 40%);">+ * 0xa CIR Not implemented</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Controllable through preprocessor defines:</span><br><span style="color: hsl(120, 100%, 40%);">+ * SUPERIO_DEV Device identifier for this SIO (e.g. SIO0)</span><br><span style="color: hsl(120, 100%, 40%);">+ * SUPERIO_PNP_BASE I/O address of the first PnP configuration register</span><br><span style="color: hsl(120, 100%, 40%);">+ * IT8721F_SHOW_SP1 If defined, Serial Port 1 will be exposed.</span><br><span style="color: hsl(120, 100%, 40%);">+ * IT8721F_SHOW_SP2 If defined, Serial Port 2 will be exposed.</span><br><span style="color: hsl(120, 100%, 40%);">+ * IT8721F_SHOW_EC If defined, the Environment Controller will be exposed.</span><br><span style="color: hsl(120, 100%, 40%);">+ * IT8721F_SHOW_KBCK If defined, the Keyboard Controller will be exposed.</span><br><span style="color: hsl(120, 100%, 40%);">+ * IT8721F_SHOW_KBCM If defined, PS/2 mouse support will be exposed.</span><br><span style="color: hsl(120, 100%, 40%);">+ * IT8721F_SHOW_GPIO If defined, GPIO support will be exposed.</span><br><span style="color: hsl(120, 100%, 40%);">+ * IT8721F_SHOW_CIR If defined, Consumer IR support will be exposed.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#undef SUPERIO_CHIP_NAME</span><br><span style="color: hsl(120, 100%, 40%);">+#define SUPERIO_CHIP_NAME IT8721F</span><br><span style="color: hsl(120, 100%, 40%);">+#include <superio/acpi/pnp.asl></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#undef PNP_DEFAULT_PSC</span><br><span style="color: hsl(120, 100%, 40%);">+#define PNP_DEFAULT_PSC Return (0) /* no power management */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#define CONFIGURE_CONTROL CCTL</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+Device(SUPERIO_DEV) {</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_HID, EisaId("PNP0A05"))</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_STR, Unicode("ITE IT8721F Super I/O"))</span><br><span style="color: hsl(120, 100%, 40%);">+ Name (_UID, SUPERIO_UID(SUPERIO_DEV,))</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* SuperIO configuration ports */</span><br><span style="color: hsl(120, 100%, 40%);">+ OperationRegion (CREG, SystemIO, SUPERIO_PNP_BASE, 0x02)</span><br><span style="color: hsl(120, 100%, 40%);">+ Field (CREG, ByteAcc, NoLock, Preserve)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_ADDR_REG, 8,</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_DATA_REG, 8</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ IndexField (ADDR, DATA, ByteAcc, NoLock, Preserve)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ Offset (0x02),</span><br><span style="color: hsl(120, 100%, 40%);">+ CONFIGURE_CONTROL, 8, /* Global configure control */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Offset (0x07),</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_LOGICAL_DEVICE, 8, /* Logical device selector */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Offset (0x30),</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_DEVICE_ACTIVE, 1, /* Logical device activation */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Offset (0x60),</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_IO0_HIGH_BYTE, 8, /* First I/O port base - high byte */</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_IO0_LOW_BYTE, 8, /* First I/O port base - low byte */</span><br><span style="color: hsl(120, 100%, 40%);">+ Offset (0x62),</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_IO1_HIGH_BYTE, 8, /* Second I/O port base - high byte */</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_IO1_LOW_BYTE, 8, /* Second I/O port base - low byte */</span><br><span style="color: hsl(120, 100%, 40%);">+ Offset (0x64),</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_IO2_HIGH_BYTE, 8, /* Third I/O port base - high byte */</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_IO2_LOW_BYTE, 8, /* Third I/O port base - low byte */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Offset (0x70),</span><br><span style="color: hsl(120, 100%, 40%);">+ PNP_IRQ0, 8, /* First IRQ */</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ Method (_CRS)</span><br><span style="color: hsl(120, 100%, 40%);">+ {</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Announce the used I/O ports to the OS */</span><br><span style="color: hsl(120, 100%, 40%);">+ Return (ResourceTemplate () {</span><br><span style="color: hsl(120, 100%, 40%);">+ IO (Decode16, SUPERIO_PNP_BASE, SUPERIO_PNP_BASE, 0x01, 0x02)</span><br><span style="color: hsl(120, 100%, 40%);">+ })</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef PNP_ENTER_MAGIC_1ST</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef PNP_ENTER_MAGIC_2ND</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef PNP_ENTER_MAGIC_3RD</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef PNP_ENTER_MAGIC_4TH</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef PNP_EXIT_MAGIC_1ST</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef PNP_EXIT_SPECIAL_REG</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef PNP_EXIT_SPECIAL_VAL</span><br><span style="color: hsl(120, 100%, 40%);">+ #define PNP_ENTER_MAGIC_1ST 0x87</span><br><span style="color: hsl(120, 100%, 40%);">+ #define PNP_ENTER_MAGIC_2ND 0x01</span><br><span style="color: hsl(120, 100%, 40%);">+ #define PNP_ENTER_MAGIC_3RD 0x55</span><br><span style="color: hsl(120, 100%, 40%);">+#if SUPERIO_PNP_BASE == 0x2e</span><br><span style="color: hsl(120, 100%, 40%);">+ #define PNP_ENTER_MAGIC_4TH 0x55</span><br><span style="color: hsl(120, 100%, 40%);">+#else</span><br><span style="color: hsl(120, 100%, 40%);">+ #define PNP_ENTER_MAGIC_4TH 0xaa</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+ #define PNP_EXIT_SPECIAL_REG CONFIGURE_CONTROL</span><br><span style="color: hsl(120, 100%, 40%);">+ #define PNP_EXIT_SPECIAL_VAL 0x02</span><br><span style="color: hsl(120, 100%, 40%);">+ #include <superio/acpi/pnp_config.asl></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef IT8721F_SHOW_SP1</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_DDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_REG</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_VAL</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #define SUPERIO_UART_LDN 1</span><br><span style="color: hsl(120, 100%, 40%);">+ #include <superio/acpi/pnp_uart.asl></span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef IT8721F_SHOW_SP2</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_DDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_REG</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_VAL</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_UART_PM_LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #define SUPERIO_UART_LDN 2</span><br><span style="color: hsl(120, 100%, 40%);">+ #include <superio/acpi/pnp_uart.asl></span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef IT8721F_SHOW_EC</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_PNP_HID</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_PNP_LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_PNP_DDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_PNP_PM_REG</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_PNP_PM_VAL</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_PNP_PM_LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_PNP_IO0</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_PNP_IO1</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_PNP_IO2</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_PNP_IRQ0</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_PNP_IRQ1</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_PNP_DMA</span><br><span style="color: hsl(120, 100%, 40%);">+ #define SUPERIO_PNP_LDN 4</span><br><span style="color: hsl(120, 100%, 40%);">+ #define SUPERIO_PNP_IO0 0x08, 0x08</span><br><span style="color: hsl(120, 100%, 40%);">+ #define SUPERIO_PNP_IO1 0x08, 0x04</span><br><span style="color: hsl(120, 100%, 40%);">+ #define SUPERIO_PNP_IRQ0</span><br><span style="color: hsl(120, 100%, 40%);">+ #include <superio/acpi/pnp_generic.asl></span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef IT8721F_SHOW_KBCK</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_KBC_LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_KBC_PS2M</span><br><span style="color: hsl(120, 100%, 40%);">+ #undef SUPERIO_KBC_PS2LDN</span><br><span style="color: hsl(120, 100%, 40%);">+ #define SUPERIO_KBC_LDN 5</span><br><span style="color: hsl(120, 100%, 40%);">+#ifdef IT8721F_SHOW_KBCM</span><br><span style="color: hsl(120, 100%, 40%);">+ #define SUPERIO_KBC_PS2LDN 6</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+ #include <superio/acpi/pnp_kbc.asl></span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28226">change 28226</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28226"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I074d57fa5b140b6946ae81beb210fefac48a66eb </div>
<div style="display:none"> Gerrit-Change-Number: 28226 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>