<p>Mike Banon has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28204">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">vendorcode/amd/agesa/f15tn: add Richland RL-A1 to the equivalence table<br><br>This small change is required for the successful loading of microcode<br>from F15TnMicrocodePatch0600110F_Enc.c for the Richland RL-A1 CPUs,<br>such as A10-5750M found at coreboot-supported Lenovo G505S laptop<br><br>Richland RL-A1 and Trinity TN-A1 CPUs are using the same microcode,<br>so the Richland RL-A1 IDs should be added to this equivalence table<br><br>Change-Id: I7a68f2fef74fb4c578c47645f727a9ed45526f69<br>Signed-off-by: Mike Banon <mikebdp2@gmail.com><br>---<br>M src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnEquivalenceTable.c<br>1 file changed, 2 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/28204/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnEquivalenceTable.c b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnEquivalenceTable.c</span><br><span>index b0b12b8..759c2fe 100644</span><br><span>--- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnEquivalenceTable.c</span><br><span>+++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnEquivalenceTable.c</span><br><span>@@ -83,6 +83,7 @@</span><br><span>  */</span><br><span> STATIC CONST UINT16 ROMDATA CpuF15TnMicrocodeEquivalenceTable[] =</span><br><span> {</span><br><span style="color: hsl(120, 100%, 40%);">+  0x6131, 0x6101,</span><br><span>   0x6101, 0x6101,</span><br><span>   0x6100, 0x6100</span><br><span> };</span><br><span>@@ -90,6 +91,7 @@</span><br><span> // Unencrypted equivalent</span><br><span> STATIC CONST UINT16 ROMDATA CpuF15TnUnEncryptedMicrocodeEquivalenceTable[] =</span><br><span> {</span><br><span style="color: hsl(120, 100%, 40%);">+  0x6131, 0x6901,</span><br><span>   0x6101, 0x6901,</span><br><span>   0x6100, 0x6900</span><br><span> };</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28204">change 28204</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28204"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I7a68f2fef74fb4c578c47645f727a9ed45526f69 </div>
<div style="display:none"> Gerrit-Change-Number: 28204 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Mike Banon <mikebdp2@gmail.com> </div>