<p>Julius Werner has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28199">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">arm64: Factor our common parts of romstage execution flow<br><br>The romstage main() entry point on arm64 boards is usually in mainboard<br>code, but there are a handful of lines that are always needed in there<br>and not really mainboard specific (or chipset specific). We keep arguing<br>every once in a while that this isn't ideal, so rather than arguing any<br>longer let's just fix it. This patch moves the main() function into arch<br>code with callbacks that the platform can hook into. (This approach can<br>probably be expanded onto other architectures, so when that happens this<br>file should move into src/lib.)<br><br>Tested on Cheza and Kevin. I think the approach is straight-forward<br>enough that we can take this without testing every board. (Note that in<br>a few cases, this delays some platform-specific calls until after<br>console_init() and exception_init()... since these functions don't<br>really take that long, especially if there is no serial console<br>configured, I don't expect this to cause any issues.)<br><br>Change-Id: I7503acafebabed00dfeedb00b1354a26c536f0fe<br>Signed-off-by: Julius Werner <jwerner@chromium.org><br>---<br>M src/arch/arm64/Makefile.inc<br>M src/arch/arm64/include/arch/stages.h<br>A src/arch/arm64/romstage.c<br>M src/mainboard/cavium/cn8100_sff_evb/romstage.c<br>M src/mainboard/google/cheza/romstage.c<br>M src/mainboard/google/gru/romstage.c<br>M src/mainboard/google/kukui/romstage.c<br>M src/mainboard/google/oak/romstage.c<br>8 files changed, 59 insertions(+), 79 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/28199/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc</span><br><span>index e2c44eb4..6bb7196 100644</span><br><span>--- a/src/arch/arm64/Makefile.inc</span><br><span>+++ b/src/arch/arm64/Makefile.inc</span><br><span>@@ -107,6 +107,7 @@</span><br><span> romstage-y += memset.S</span><br><span> romstage-y += memcpy.S</span><br><span> romstage-y += memmove.S</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-y += romstage.c</span><br><span> romstage-y += transition.c transition_asm.S</span><br><span> </span><br><span> rmodules_arm64-y += memset.S</span><br><span>diff --git a/src/arch/arm64/include/arch/stages.h b/src/arch/arm64/include/arch/stages.h</span><br><span>index 9a88ea7..2d6d583 100644</span><br><span>--- a/src/arch/arm64/include/arch/stages.h</span><br><span>+++ b/src/arch/arm64/include/arch/stages.h</span><br><span>@@ -21,4 +21,11 @@</span><br><span> </span><br><span> void stage_entry(void);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+/* This function is the romstage platform entry point, and should contain all</span><br><span style="color: hsl(120, 100%, 40%);">+ chipset and mainboard setup until DRAM is initialized and accessible. */</span><br><span style="color: hsl(120, 100%, 40%);">+void platform_romstage_main(void);</span><br><span style="color: hsl(120, 100%, 40%);">+/* This is an optional hook to run further chipset or mainboard code after DRAM</span><br><span style="color: hsl(120, 100%, 40%);">+ and associated support frameworks (like CBMEM) have been initialized. */</span><br><span style="color: hsl(120, 100%, 40%);">+void platform_romstage_postram(void);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> #endif</span><br><span>diff --git a/src/arch/arm64/romstage.c b/src/arch/arm64/romstage.c</span><br><span>new file mode 100644</span><br><span>index 0000000..8cdb16b</span><br><span>--- /dev/null</span><br><span>+++ b/src/arch/arm64/romstage.c</span><br><span>@@ -0,0 +1,39 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright 2018 Google Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or</span><br><span style="color: hsl(120, 100%, 40%);">+ * modify it under the terms of the GNU General Public License as</span><br><span style="color: hsl(120, 100%, 40%);">+ * published by the Free Software Foundation; version 2 of</span><br><span style="color: hsl(120, 100%, 40%);">+ * the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/exception.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/stages.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <cbmem.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <program_loading.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <timestamp.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+__weak void platform_romstage_main(void) { /* no-op, for bring-up */ }</span><br><span style="color: hsl(120, 100%, 40%);">+__weak void platform_romstage_postram(void) { /* no-op */ }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void main(void)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ timestamp_add_now(TS_START_ROMSTAGE);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ console_init();</span><br><span style="color: hsl(120, 100%, 40%);">+ exception_init();</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ platform_romstage_main();</span><br><span style="color: hsl(120, 100%, 40%);">+ cbmem_initialize_empty();</span><br><span style="color: hsl(120, 100%, 40%);">+ platform_romstage_postram();</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ run_ramstage();</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/mainboard/cavium/cn8100_sff_evb/romstage.c b/src/mainboard/cavium/cn8100_sff_evb/romstage.c</span><br><span>index e8e5cd6..7bb53e3 100644</span><br><span>--- a/src/mainboard/cavium/cn8100_sff_evb/romstage.c</span><br><span>+++ b/src/mainboard/cavium/cn8100_sff_evb/romstage.c</span><br><span>@@ -14,34 +14,24 @@</span><br><span> *</span><br><span> */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/exception.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cbmem.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <romstage_handoff.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/stages.h></span><br><span> #include <soc/sdram.h></span><br><span> #include <soc/timer.h></span><br><span> #include <soc/mmu.h></span><br><span> #include <stdlib.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <console/console.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <program_loading.h></span><br><span> #include <libbdk-hal/bdk-config.h></span><br><span> #include <string.h></span><br><span> </span><br><span> extern const struct bdk_devicetree_key_value devtree[];</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void main(void)</span><br><span style="color: hsl(120, 100%, 40%);">+void platform_romstage_main(void)</span><br><span> {</span><br><span> watchdog_poke(0);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- console_init();</span><br><span style="color: hsl(0, 100%, 40%);">- exception_init();</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> bdk_config_set_fdt(devtree);</span><br><span> </span><br><span> sdram_init();</span><br><span> soc_mmu_init();</span><br><span> </span><br><span> watchdog_poke(0);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- cbmem_initialize_empty();</span><br><span style="color: hsl(0, 100%, 40%);">- run_ramstage();</span><br><span> }</span><br><span>diff --git a/src/mainboard/google/cheza/romstage.c b/src/mainboard/google/cheza/romstage.c</span><br><span>index c930016..ad85061 100644</span><br><span>--- a/src/mainboard/google/cheza/romstage.c</span><br><span>+++ b/src/mainboard/google/cheza/romstage.c</span><br><span>@@ -13,17 +13,8 @@</span><br><span> * GNU General Public License for more details.</span><br><span> */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/exception.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cbmem.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <halt.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <program_loading.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <console/console.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <timestamp.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/stages.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void main(void)</span><br><span style="color: hsl(120, 100%, 40%);">+void platform_romstage_main(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- console_init();</span><br><span style="color: hsl(0, 100%, 40%);">- exception_init();</span><br><span style="color: hsl(0, 100%, 40%);">- cbmem_initialize_empty();</span><br><span style="color: hsl(0, 100%, 40%);">- run_ramstage();</span><br><span> }</span><br><span>diff --git a/src/mainboard/google/gru/romstage.c b/src/mainboard/google/gru/romstage.c</span><br><span>index 9f938f3..edf440d 100644</span><br><span>--- a/src/mainboard/google/gru/romstage.c</span><br><span>+++ b/src/mainboard/google/gru/romstage.c</span><br><span>@@ -14,24 +14,14 @@</span><br><span> *</span><br><span> */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/cache.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/exception.h></span><br><span> #include <arch/mmu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cbfs.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cbmem.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <gpio.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <console/console.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/stages.h></span><br><span> #include <delay.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <program_loading.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <romstage_handoff.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/addressmap.h></span><br><span> #include <soc/mmu_operations.h></span><br><span> #include <soc/tsadc.h></span><br><span> #include <soc/sdram.h></span><br><span> #include <symbols.h></span><br><span> #include <soc/usb.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <stdlib.h></span><br><span> </span><br><span> #include "board.h"</span><br><span> #include "pwm_regulator.h"</span><br><span>@@ -70,11 +60,9 @@</span><br><span> reset_usb_otg1();</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void main(void)</span><br><span style="color: hsl(120, 100%, 40%);">+void platform_romstage_main(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- console_init();</span><br><span> tsadc_init(TSHUT_POL_HIGH);</span><br><span style="color: hsl(0, 100%, 40%);">- exception_init();</span><br><span> </span><br><span> /* Init DVS to conservative values. */</span><br><span> init_dvs_outputs();</span><br><span>@@ -87,6 +75,4 @@</span><br><span> mmu_config_range((void *)0, (uintptr_t)sdram_size_mb() * MiB,</span><br><span> CACHED_MEM);</span><br><span> mmu_config_range(_dma_coherent, _dma_coherent_size, UNCACHED_MEM);</span><br><span style="color: hsl(0, 100%, 40%);">- cbmem_initialize_empty();</span><br><span style="color: hsl(0, 100%, 40%);">- run_ramstage();</span><br><span> }</span><br><span>diff --git a/src/mainboard/google/kukui/romstage.c b/src/mainboard/google/kukui/romstage.c</span><br><span>index 342a0ba..9eeaa68 100644</span><br><span>--- a/src/mainboard/google/kukui/romstage.c</span><br><span>+++ b/src/mainboard/google/kukui/romstage.c</span><br><span>@@ -13,21 +13,10 @@</span><br><span> * GNU General Public License for more details.</span><br><span> */</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/exception.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <console/console.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <program_loading.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/stages.h></span><br><span> #include <soc/mmu_operations.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <timestamp.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void main(void)</span><br><span style="color: hsl(120, 100%, 40%);">+void platform_romstage_main(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- timestamp_add_now(TS_START_ROMSTAGE);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* Init UART baudrate when PLL on. */</span><br><span style="color: hsl(0, 100%, 40%);">- console_init();</span><br><span style="color: hsl(0, 100%, 40%);">- exception_init();</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> mtk_mmu_after_dram();</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- run_ramstage();</span><br><span> }</span><br><span>diff --git a/src/mainboard/google/oak/romstage.c b/src/mainboard/google/oak/romstage.c</span><br><span>index 9f5ce5f..754c40c 100644</span><br><span>--- a/src/mainboard/google/oak/romstage.c</span><br><span>+++ b/src/mainboard/google/oak/romstage.c</span><br><span>@@ -12,39 +12,21 @@</span><br><span> * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span> * GNU General Public License for more details.</span><br><span> */</span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/cache.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/cpu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/exception.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/io.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/mmu.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <boardid.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cbfs.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <cbmem.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <console/console.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <delay.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <program_loading.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <romstage_handoff.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <symbols.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <timer.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <timestamp.h></span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/stages.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <boardid.h></span><br><span> #include <soc/emi.h></span><br><span> #include <soc/mmu_operations.h></span><br><span> #include <soc/mt6391.h></span><br><span> #include <soc/pll.h></span><br><span> #include <soc/rtc.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <timer.h></span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-void main(void)</span><br><span style="color: hsl(120, 100%, 40%);">+void platform_romstage_main(void)</span><br><span> {</span><br><span> int stabilize_usec;</span><br><span> struct stopwatch sw;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- timestamp_add_now(TS_START_ROMSTAGE);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* init uart baudrate when pll on */</span><br><span style="color: hsl(0, 100%, 40%);">- console_init();</span><br><span style="color: hsl(0, 100%, 40%);">- exception_init();</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> rtc_boot();</span><br><span> </span><br><span> /* Raise CPU voltage to allow higher frequency */</span><br><span>@@ -64,9 +46,4 @@</span><br><span> mt_pll_raise_ca53_freq(1700 * MHz);</span><br><span> </span><br><span> mtk_mmu_after_dram();</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- /* should be called after memory init */</span><br><span style="color: hsl(0, 100%, 40%);">- cbmem_initialize_empty();</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- run_ramstage();</span><br><span> }</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28199">change 28199</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28199"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I7503acafebabed00dfeedb00b1354a26c536f0fe </div>
<div style="display:none"> Gerrit-Change-Number: 28199 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Julius Werner <jwerner@chromium.org> </div>