<p>Richard Spiegel has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/28093">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">src/vendorcode/amd/pi/00670F00/Proc/Fch/Common: Remove unused headers<br><br>Header files AcpiLib.h, FchDef.h and FchBiosRamUsage.h became obsolete when<br>VENDORCODE_FULL_SUPPORT was removed. Therefor they should be removed.<br><br>BUG=b:112602580<br>TEST=Build grunt and gardenia.<br><br>Change-Id: If4fdb9ae1e106ba15f2a073f592499e638e40c65<br>Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com><br>---<br>D src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/AcpiLib.h<br>D src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchBiosRamUsage.h<br>D src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h<br>M src/vendorcode/amd/pi/00670F00/Proc/Fch/FchPlatform.h<br>4 files changed, 0 insertions(+), 573 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/28093/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/AcpiLib.h b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/AcpiLib.h</span><br><span>deleted file mode 100644</span><br><span>index c84bd00..0000000</span><br><span>--- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/AcpiLib.h</span><br><span>+++ /dev/null</span><br><span>@@ -1,93 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/* $NoKeywords:$ */</span><br><span style="color: hsl(0, 100%, 40%);">-/**</span><br><span style="color: hsl(0, 100%, 40%);">- * @file</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * FCH ACPI lib</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * @xrefitem bom "File Content Label" "Release Content"</span><br><span style="color: hsl(0, 100%, 40%);">- * @e project: AGESA</span><br><span style="color: hsl(0, 100%, 40%);">- * @e sub-project: FCH</span><br><span style="color: hsl(0, 100%, 40%);">- * @e \$Revision$ @e \$Date$</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">- /*****************************************************************************</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (c) 2008 - 2016, Advanced Micro Devices, Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- * All rights reserved.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Redistribution and use in source and binary forms, with or without</span><br><span style="color: hsl(0, 100%, 40%);">- * modification, are permitted provided that the following conditions are met:</span><br><span style="color: hsl(0, 100%, 40%);">- * * Redistributions of source code must retain the above copyright</span><br><span style="color: hsl(0, 100%, 40%);">- * notice, this list of conditions and the following disclaimer.</span><br><span style="color: hsl(0, 100%, 40%);">- * * Redistributions in binary form must reproduce the above copyright</span><br><span style="color: hsl(0, 100%, 40%);">- * notice, this list of conditions and the following disclaimer in the</span><br><span style="color: hsl(0, 100%, 40%);">- * documentation and/or other materials provided with the distribution.</span><br><span style="color: hsl(0, 100%, 40%);">- * * Neither the name of Advanced Micro Devices, Inc. nor the names of</span><br><span style="color: hsl(0, 100%, 40%);">- * its contributors may be used to endorse or promote products derived</span><br><span style="color: hsl(0, 100%, 40%);">- * from this software without specific prior written permission.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND</span><br><span style="color: hsl(0, 100%, 40%);">- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED</span><br><span style="color: hsl(0, 100%, 40%);">- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE</span><br><span style="color: hsl(0, 100%, 40%);">- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY</span><br><span style="color: hsl(0, 100%, 40%);">- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</span><br><span style="color: hsl(0, 100%, 40%);">- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</span><br><span style="color: hsl(0, 100%, 40%);">- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</span><br><span style="color: hsl(0, 100%, 40%);">- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</span><br><span style="color: hsl(0, 100%, 40%);">- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS</span><br><span style="color: hsl(0, 100%, 40%);">- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- ***************************************************************************/</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#include <check_for_wrapper.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef _FCH_ACPILIB_H_</span><br><span style="color: hsl(0, 100%, 40%);">-#define _FCH_ACPILIB_H_</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// RSDP - ACPI 2.0 table RSDP</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-typedef struct _RSDP_HEADER {</span><br><span style="color: hsl(0, 100%, 40%);">- UINT64 Signature; ///< RSDP signature "RSD PTR"</span><br><span style="color: hsl(0, 100%, 40%);">- UINT8 CheckSum; ///< checksum of the first 20 bytes</span><br><span style="color: hsl(0, 100%, 40%);">- UINT8 OEMID[6]; ///< OEM ID</span><br><span style="color: hsl(0, 100%, 40%);">- UINT8 Revision; ///< 0 for APCI 1.0, 2 for ACPI 2.0</span><br><span style="color: hsl(0, 100%, 40%);">- UINT32 RsdtAddress; ///< physical address of RSDT</span><br><span style="color: hsl(0, 100%, 40%);">- UINT32 Length; ///< total length of RSDP (including extended part)</span><br><span style="color: hsl(0, 100%, 40%);">- UINT64 XsdtAddress; ///< physical address of XSDT</span><br><span style="color: hsl(0, 100%, 40%);">- UINT8 ExtendedCheckSum; ///< chechsum of whole table</span><br><span style="color: hsl(0, 100%, 40%);">- UINT8 Reserved[3]; ///< Reserved</span><br><span style="color: hsl(0, 100%, 40%);">-} RSDP_HEADER;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// DESCRIPTION_HEADER - ACPI common table header</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-typedef struct _DESCRIPTION_HEADER {</span><br><span style="color: hsl(0, 100%, 40%);">- UINT32 Signature; ///< ACPI signature (4 ASCII characters)</span><br><span style="color: hsl(0, 100%, 40%);">- UINT32 Length; ///< Length of table, in bytes, including header</span><br><span style="color: hsl(0, 100%, 40%);">- UINT8 Revision; ///< ACPI Specification minor version #</span><br><span style="color: hsl(0, 100%, 40%);">- UINT8 CheckSum; ///< To make sum of entire table == 0</span><br><span style="color: hsl(0, 100%, 40%);">- UINT8 OemId[6]; ///< OEM identification</span><br><span style="color: hsl(0, 100%, 40%);">- UINT8 OemTableId[8]; ///< OEM table identification</span><br><span style="color: hsl(0, 100%, 40%);">- UINT32 OemRevision; ///< OEM revision number</span><br><span style="color: hsl(0, 100%, 40%);">- UINT32 CreatorId; ///< ASL compiler vendor ID</span><br><span style="color: hsl(0, 100%, 40%);">- UINT32 CreatorRevision; ///< ASL compiler revision number</span><br><span style="color: hsl(0, 100%, 40%);">-} DESCRIPTION_HEADER;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// _AcpiRegWrite - ACPI MMIO register R/W structure</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-typedef struct _ACPI_REG_WRITE {</span><br><span style="color: hsl(0, 100%, 40%);">- UINT8 MmioBase; /// MmioBase: Index of Fch block (For instance GPIO_BASE:0x01 SMI_BASE:0x02)</span><br><span style="color: hsl(0, 100%, 40%);">- UINT8 MmioReg; /// MmioReg : Register index</span><br><span style="color: hsl(0, 100%, 40%);">- UINT8 DataAndMask; /// DataANDMask : AND Register Data</span><br><span style="color: hsl(0, 100%, 40%);">- UINT8 DataOrMask; /// DataOrMask : Or Register Data</span><br><span style="color: hsl(0, 100%, 40%);">-} ACPI_REG_WRITE;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-VOID* AcpiLocateTable (IN UINT32 Signature);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID AcpiSetTableCheckSum (IN VOID *TablePtr);</span><br><span style="color: hsl(0, 100%, 40%);">-UINT8 AcpiGetTableCheckSum (IN VOID *TablePtr);</span><br><span style="color: hsl(0, 100%, 40%);">-UINT8 GetByteSum (IN VOID *DataPtr, IN UINT32 Length);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span>diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchBiosRamUsage.h b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchBiosRamUsage.h</span><br><span>deleted file mode 100644</span><br><span>index 8208294..0000000</span><br><span>--- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchBiosRamUsage.h</span><br><span>+++ /dev/null</span><br><span>@@ -1,69 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/* $NoKeywords:$ */</span><br><span style="color: hsl(0, 100%, 40%);">-/**</span><br><span style="color: hsl(0, 100%, 40%);">- * @file</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * FCH BIOS Ram usage</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * @xrefitem bom "File Content Label" "Release Content"</span><br><span style="color: hsl(0, 100%, 40%);">- * @e project: AGESA</span><br><span style="color: hsl(0, 100%, 40%);">- * @e sub-project: FCH</span><br><span style="color: hsl(0, 100%, 40%);">- * @e \$Revision$ @e \$Date$</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">- /*****************************************************************************</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (c) 2008 - 2016, Advanced Micro Devices, Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- * All rights reserved.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Redistribution and use in source and binary forms, with or without</span><br><span style="color: hsl(0, 100%, 40%);">- * modification, are permitted provided that the following conditions are met:</span><br><span style="color: hsl(0, 100%, 40%);">- * * Redistributions of source code must retain the above copyright</span><br><span style="color: hsl(0, 100%, 40%);">- * notice, this list of conditions and the following disclaimer.</span><br><span style="color: hsl(0, 100%, 40%);">- * * Redistributions in binary form must reproduce the above copyright</span><br><span style="color: hsl(0, 100%, 40%);">- * notice, this list of conditions and the following disclaimer in the</span><br><span style="color: hsl(0, 100%, 40%);">- * documentation and/or other materials provided with the distribution.</span><br><span style="color: hsl(0, 100%, 40%);">- * * Neither the name of Advanced Micro Devices, Inc. nor the names of</span><br><span style="color: hsl(0, 100%, 40%);">- * its contributors may be used to endorse or promote products derived</span><br><span style="color: hsl(0, 100%, 40%);">- * from this software without specific prior written permission.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND</span><br><span style="color: hsl(0, 100%, 40%);">- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED</span><br><span style="color: hsl(0, 100%, 40%);">- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE</span><br><span style="color: hsl(0, 100%, 40%);">- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY</span><br><span style="color: hsl(0, 100%, 40%);">- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</span><br><span style="color: hsl(0, 100%, 40%);">- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</span><br><span style="color: hsl(0, 100%, 40%);">- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</span><br><span style="color: hsl(0, 100%, 40%);">- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</span><br><span style="color: hsl(0, 100%, 40%);">- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS</span><br><span style="color: hsl(0, 100%, 40%);">- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- ***************************************************************************/</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#include <check_for_wrapper.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef _FCH_BIOS_RAM_USAGE_H_</span><br><span style="color: hsl(0, 100%, 40%);">-#define _FCH_BIOS_RAM_USAGE_H_</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#define RESTORE_MEMORY_CONTROLLER_START 0</span><br><span style="color: hsl(0, 100%, 40%);">-#define XHCI_REGISTER_BAR00 0xD0</span><br><span style="color: hsl(0, 100%, 40%);">-#define XHCI_REGISTER_BAR01 0xD1</span><br><span style="color: hsl(0, 100%, 40%);">-#define XHCI_REGISTER_BAR02 0xD2</span><br><span style="color: hsl(0, 100%, 40%);">-#define XHCI_REGISTER_BAR03 0xD3</span><br><span style="color: hsl(0, 100%, 40%);">-#define XHCI_REGISTER_04H 0xD4</span><br><span style="color: hsl(0, 100%, 40%);">-#define XHCI_REGISTER_0CH 0xD5</span><br><span style="color: hsl(0, 100%, 40%);">-#define XHCI_REGISTER_3CH 0xD6</span><br><span style="color: hsl(0, 100%, 40%);">-#define XHCI1_REGISTER_BAR00 0xE0</span><br><span style="color: hsl(0, 100%, 40%);">-#define XHCI1_REGISTER_BAR01 0xE1</span><br><span style="color: hsl(0, 100%, 40%);">-#define XHCI1_REGISTER_BAR02 0xE2</span><br><span style="color: hsl(0, 100%, 40%);">-#define XHCI1_REGISTER_BAR03 0xE3</span><br><span style="color: hsl(0, 100%, 40%);">-#define XHCI1_REGISTER_04H 0xE4</span><br><span style="color: hsl(0, 100%, 40%);">-#define XHCI1_REGISTER_0CH 0xE5</span><br><span style="color: hsl(0, 100%, 40%);">-#define XHCI1_REGISTER_3CH 0xE6</span><br><span style="color: hsl(0, 100%, 40%);">-#define RTC_WORKAROUND_DATA_START 0xF0</span><br><span style="color: hsl(0, 100%, 40%);">-#define BOOT_TIME_FLAG_SEC 0xF8</span><br><span style="color: hsl(0, 100%, 40%);">-#define BOOT_TIME_FLAG_INT19 0xFC</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span>diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h b/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h</span><br><span>deleted file mode 100644</span><br><span>index aa11396..0000000</span><br><span>--- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/Common/FchDef.h</span><br><span>+++ /dev/null</span><br><span>@@ -1,408 +0,0 @@</span><br><span style="color: hsl(0, 100%, 40%);">-/* $NoKeywords:$ */</span><br><span style="color: hsl(0, 100%, 40%);">-/**</span><br><span style="color: hsl(0, 100%, 40%);">- * @file</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * FCH routine definition</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * @xrefitem bom "File Content Label" "Release Content"</span><br><span style="color: hsl(0, 100%, 40%);">- * @e project: AGESA</span><br><span style="color: hsl(0, 100%, 40%);">- * @e sub-project: FCH</span><br><span style="color: hsl(0, 100%, 40%);">- * @e \$Revision$ @e \$Date$</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- */</span><br><span style="color: hsl(0, 100%, 40%);">- /*****************************************************************************</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Copyright (c) 2008 - 2017, Advanced Micro Devices, Inc.</span><br><span style="color: hsl(0, 100%, 40%);">- * All rights reserved.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * Redistribution and use in source and binary forms, with or without</span><br><span style="color: hsl(0, 100%, 40%);">- * modification, are permitted provided that the following conditions are met:</span><br><span style="color: hsl(0, 100%, 40%);">- * * Redistributions of source code must retain the above copyright</span><br><span style="color: hsl(0, 100%, 40%);">- * notice, this list of conditions and the following disclaimer.</span><br><span style="color: hsl(0, 100%, 40%);">- * * Redistributions in binary form must reproduce the above copyright</span><br><span style="color: hsl(0, 100%, 40%);">- * notice, this list of conditions and the following disclaimer in the</span><br><span style="color: hsl(0, 100%, 40%);">- * documentation and/or other materials provided with the distribution.</span><br><span style="color: hsl(0, 100%, 40%);">- * * Neither the name of Advanced Micro Devices, Inc. nor the names of</span><br><span style="color: hsl(0, 100%, 40%);">- * its contributors may be used to endorse or promote products derived</span><br><span style="color: hsl(0, 100%, 40%);">- * from this software without specific prior written permission.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND</span><br><span style="color: hsl(0, 100%, 40%);">- * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED</span><br><span style="color: hsl(0, 100%, 40%);">- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE</span><br><span style="color: hsl(0, 100%, 40%);">- * DISCLAIMED. IN NO EVENT SHALL ADVANCED MICRO DEVICES, INC. BE LIABLE FOR ANY</span><br><span style="color: hsl(0, 100%, 40%);">- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES</span><br><span style="color: hsl(0, 100%, 40%);">- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;</span><br><span style="color: hsl(0, 100%, 40%);">- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND</span><br><span style="color: hsl(0, 100%, 40%);">- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT</span><br><span style="color: hsl(0, 100%, 40%);">- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS</span><br><span style="color: hsl(0, 100%, 40%);">- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.</span><br><span style="color: hsl(0, 100%, 40%);">- *</span><br><span style="color: hsl(0, 100%, 40%);">- ***************************************************************************/</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#include <check_for_wrapper.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#ifndef _FCH_DEF_H_</span><br><span style="color: hsl(0, 100%, 40%);">-#define _FCH_DEF_H_</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-UINT32 ReadAlink (IN UINT32 Index, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID WriteAlink (IN UINT32 Index, IN UINT32 Data, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID RwAlink (IN UINT32 Index, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ReadMem (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *ValuePtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID WriteMem (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *ValuePtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID RwMem (IN UINT32 Address, IN UINT8 OpFlag, IN UINT32 Mask, IN UINT32 Data);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ReadPci (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID WritePci (IN UINT32 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ProgramFchSciMapTbl (IN SCI_MAP_CONTROL *pSciMapTbl, IN FCH_RESET_DATA_BLOCK *FchResetDataBlock);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ProgramFchGpioTbl (IN GPIO_CONTROL *pGpioTbl);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ProgramFchSataPhyTbl (IN SATA_PHY_CONTROL *pSataPhyTbl, IN FCH_RESET_DATA_BLOCK *FchResetDataBlock);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID GetChipSysMode (IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ReadPmio (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID WritePmio (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID RwPmio (IN UINT8 Address, IN UINT8 OpFlag, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ReadPmio2 (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID WritePmio2 (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID RwPmio2 (IN UINT8 Address, IN UINT8 OpFlag, IN UINT32 AndMask, IN UINT32 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ReadBiosram (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID WriteBiosram (IN UINT8 Address, IN UINT8 OpFlag, IN VOID *Value, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID GetFchAcpiMmioBase (OUT UINT32 *AcpiMmioBase, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID GetFchAcpiPmBase (OUT UINT16 *AcpiPmBase, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-UINT8 ReadFchSleepType (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-UINT8 ReadFchChipsetRevision (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-BOOLEAN FchCheckBR_ST (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-BOOLEAN FchCheckBR (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-BOOLEAN FchCheckST (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-BOOLEAN FchCheckCZ (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-BOOLEAN FchCheckPackageAM4 (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-UINT64 FchGetScratchFuse (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitResetRequest (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Fch Ab Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Pei Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitResetAb (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchProgramAbPowerOnReset (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Dxe Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvAb (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvAbSpecial (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidAb (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateAb (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Other Public Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvAbLinkInit (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-BOOLEAN IsUmiOneLaneGen1Mode (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchAbLateProgram (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Fch Pcie Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Dxe Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ProgramPcieNativeMode (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Fch Gpp Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Common Gpp Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchGppDynamicPowerSaving (IN FCH_GPP *FchGpp, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Fch Azalia Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Pei Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitResetAzalia (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Dxe Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvAzalia (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidAzalia (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateAzalia (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Fch HwAcpi Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Pei Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitResetHwAcpiP (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitResetHwAcpi (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ProgramFchHwAcpiResetP (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Dxe Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvHwAcpiP (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvHwAcpi (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ProgramEnvPFchAcpiMmio (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ProgramFchEnvHwAcpiPciReg (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ProgramSpecificFchInitEnvAcpiMmio (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ProgramFchEnvSpreadSpectrum (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidHwAcpi (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateHwAcpi (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Other Public Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID HpetInit (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID MtC1eEnable (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID GcpuRelatedSetting (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID StressResetModeLate (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Fch Hwm Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Pei Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitResetHwm (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Dxe Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvHwm (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidHwm (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateHwm (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Other Public Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID HwmInitRegister (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchECfancontrolservice (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Fch EC Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Pei Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitResetEc (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Dxe Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvEc (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidEc (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateEc (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Other Public Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID EnterEcConfig (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ExitEcConfig (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ReadEc8 (IN UINT8 Address, IN UINT8* Value, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID WriteEc8 (IN UINT8 Address, IN UINT8* Value, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID RwEc8 (IN UINT8 Address, IN UINT8 AndMask, IN UINT8 OrMask, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID WriteECmsg (IN UINT8 Address, IN UINT8 OpFlag, IN VOID* Value, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ReadECmsg (IN UINT8 Address, IN UINT8 OpFlag, OUT VOID* Value, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID WaitForEcLDN9MailboxCmdAck (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Fch Ir Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Dxe Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvIr (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidIr (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateIr (IN VOID* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Fch SATA Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Pei Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitResetSata (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitResetSataProgram (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Dxe Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidSata (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvSata (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvProgramSataPciRegs (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidProgramSataRegs (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateProgramSataRegs (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateSata (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvSataIde (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidSataIde (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateSataIde (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvSataAhci (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidSataAhci (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateSataAhci (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvSataRaid (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidSataRaid (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateSataRaid (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvSataIde2Ahci (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidSataIde2Ahci (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateSataIde2Ahci (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-VOID SataAhciSetDeviceNumMsi (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID SataRaidSetDeviceNumMsi (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID SataIde2AhciSetDeviceNumMsi (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID SataSetIrqIntResource (IN VOID *FchDataPtr, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID SataBar5setting (IN VOID *FchDataPtr, IN UINT32 *Bar5Ptr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID SataEnableWriteAccess (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID SataDisableWriteAccess (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID SataSetDeviceNumMsi (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchSataSetDeviceNumMsi (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ShutdownUnconnectedSataPortClock (IN VOID *FchDataPtr, IN UINT32 Bar5);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchShutdownUnconnectedSataPortClock (IN VOID *FchDataPtr, IN UINT32 Bar5);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID SataDriveDetection (IN VOID *FchDataPtr, IN UINT32 *Bar5Ptr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchSataDriveDetection (IN VOID *FchDataPtr, IN UINT32 *Bar5Ptr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID SataBar5RegSet (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID SataSetPortGenMode (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchSataSetPortGenMode (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchProgramSataPhy (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvSataRaidProgram (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// FCH USB Controller Public Function</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Pei Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitResetUsb (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitResetEhci (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitResetXhci (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitResetXhciProgram (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Dxe Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvUsb (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidUsb (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateUsb (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvUsbEhci (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidUsbEhci (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateUsbEhci (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchEhciDebugPortService (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvUsbXhci (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidUsbXhci (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateUsbXhci (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidUsbEhci1 (IN FCH_DATA_BLOCK *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Other Public Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchSetUsbEnableReg (IN FCH_DATA_BLOCK *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchEhciInitAfterPciInit (IN UINT32 Value, IN FCH_DATA_BLOCK* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchXhciInitBeforePciInit (IN FCH_DATA_BLOCK* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchXhciInitIndirectReg (IN FCH_DATA_BLOCK* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateUsbXhciProgram (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchXhciPowerSavingProgram (IN FCH_DATA_BLOCK* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchXhciUsbPhyCalibrated (IN FCH_DATA_BLOCK* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-UINT8 FchUsbCommonPhyCalibration (IN FCH_DATA_BLOCK* FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Fch Sd Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvSd (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidSd (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateSd (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Other Public Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvSdProgram (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Fch Spi Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Pei Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitResetSpi (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitResetLpc (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitResetLpcProgram (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Dxe Phase</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvSpi (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidSpi (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateSpi (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvLpc (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitMidLpc (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitLateLpc (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchInitEnvLpcProgram (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-/// Other Public Routines</span><br><span style="color: hsl(0, 100%, 40%);">-///</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchSpiUnlock (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchSpiLock (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchUsb3D3ColdCallback (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchUsb3D0Callback (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-/*--------------------------- Documentation Pages ---------------------------*/</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchStall (IN UINT32 uSec, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID CimFchStall (IN UINT32 uSec, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchPciReset (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID OutPort80 (IN UINT32 pcode, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID OutPort1080 (IN UINT32 pcode, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID TurnOffCG2 (OUT VOID);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID BackUpCG2 (OUT VOID);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchCopyMem (IN VOID* pDest, IN VOID* pSource, IN UINTN Length);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID* GetRomSigPtr (IN UINTN* RomSigPtr, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ReadXhci0Phy (IN UINT32 Port, IN UINT32 Address, IN UINT32 *Value, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ReadXhci1Phy (IN UINT32 Port, IN UINT32 Address, IN UINT32 *Value, IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID AcLossControl (IN UINT8 AcLossControlValue);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID FchVgaInit (OUT VOID);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID RecordFchConfigPtr (IN UINT32 FchConfigPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ValidateFchVariant (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID RecordSmiStatus (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID ClearAllSmiStatus (IN AMD_CONFIG_PARAMS *StdHeader);</span><br><span style="color: hsl(0, 100%, 40%);">-BOOLEAN IsExternalClockMode (IN VOID *FchDataPtr);</span><br><span style="color: hsl(0, 100%, 40%);">-VOID SbSleepTrapControl (IN BOOLEAN SleepTrap);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-AGESA_STATUS</span><br><span style="color: hsl(0, 100%, 40%);">-FchSpiTransfer (</span><br><span style="color: hsl(0, 100%, 40%);">- IN UINT8 PrefixCode,</span><br><span style="color: hsl(0, 100%, 40%);">- IN UINT8 Opcode,</span><br><span style="color: hsl(0, 100%, 40%);">- IN OUT UINT8 *DataPtr,</span><br><span style="color: hsl(0, 100%, 40%);">- IN UINT8 *AddressPtr,</span><br><span style="color: hsl(0, 100%, 40%);">- IN UINT8 Length,</span><br><span style="color: hsl(0, 100%, 40%);">- IN BOOLEAN WriteFlag,</span><br><span style="color: hsl(0, 100%, 40%);">- IN BOOLEAN AddressFlag,</span><br><span style="color: hsl(0, 100%, 40%);">- IN BOOLEAN DataFlag,</span><br><span style="color: hsl(0, 100%, 40%);">- IN BOOLEAN FinishedFlag</span><br><span style="color: hsl(0, 100%, 40%);">- );</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-BOOLEAN</span><br><span style="color: hsl(0, 100%, 40%);">-FchConfigureSpiDeviceDummyCycle (</span><br><span style="color: hsl(0, 100%, 40%);">- IN UINT32 DeviceID,</span><br><span style="color: hsl(0, 100%, 40%);">- IN UINT8 SpiMode</span><br><span style="color: hsl(0, 100%, 40%);">- );</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-UINT32</span><br><span style="color: hsl(0, 100%, 40%);">-FchReadSpiId (</span><br><span style="color: hsl(0, 100%, 40%);">- IN BOOLEAN Flag</span><br><span style="color: hsl(0, 100%, 40%);">- );</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-BOOLEAN</span><br><span style="color: hsl(0, 100%, 40%);">-FchPlatformSpiQe (</span><br><span style="color: hsl(0, 100%, 40%);">- IN VOID *FchDataPtr</span><br><span style="color: hsl(0, 100%, 40%);">- );</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-FCH_DATA_BLOCK*</span><br><span style="color: hsl(0, 100%, 40%);">-FchInitLoadDataBlock (</span><br><span style="color: hsl(0, 100%, 40%);">- IN FCH_INTERFACE *FchInterface,</span><br><span style="color: hsl(0, 100%, 40%);">- IN AMD_CONFIG_PARAMS *StdHeader</span><br><span style="color: hsl(0, 100%, 40%);">- );</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-FCH_DATA_BLOCK*</span><br><span style="color: hsl(0, 100%, 40%);">-FchInitEnvCreatePrivateData (</span><br><span style="color: hsl(0, 100%, 40%);">- IN AMD_ENV_PARAMS *EnvParams</span><br><span style="color: hsl(0, 100%, 40%);">- );</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-FCH_RESET_DATA_BLOCK*</span><br><span style="color: hsl(0, 100%, 40%);">-FchInitResetLoadPrivateDefault (</span><br><span style="color: hsl(0, 100%, 40%);">- IN AMD_RESET_PARAMS *ResetParams</span><br><span style="color: hsl(0, 100%, 40%);">- );</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-VOID</span><br><span style="color: hsl(0, 100%, 40%);">-RetrieveDataBlockFromInitReset (</span><br><span style="color: hsl(0, 100%, 40%);">- IN FCH_DATA_BLOCK *FchParams</span><br><span style="color: hsl(0, 100%, 40%);">- );</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span>diff --git a/src/vendorcode/amd/pi/00670F00/Proc/Fch/FchPlatform.h b/src/vendorcode/amd/pi/00670F00/Proc/Fch/FchPlatform.h</span><br><span>index 04784fe..118473c 100644</span><br><span>--- a/src/vendorcode/amd/pi/00670F00/Proc/Fch/FchPlatform.h</span><br><span>+++ b/src/vendorcode/amd/pi/00670F00/Proc/Fch/FchPlatform.h</span><br><span>@@ -110,9 +110,6 @@</span><br><span> #include "Fch.h"</span><br><span> #include "amdlib.h"</span><br><span> #include "FchCommonCfg.h"</span><br><span style="color: hsl(0, 100%, 40%);">-#include "AcpiLib.h"</span><br><span style="color: hsl(0, 100%, 40%);">-#include "FchDef.h"</span><br><span style="color: hsl(0, 100%, 40%);">-#include "FchBiosRamUsage.h"</span><br><span> #include "AmdFch.h"</span><br><span> </span><br><span> extern CONST BUILD_OPT_CFG UserOptions;</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/28093">change 28093</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/28093"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: If4fdb9ae1e106ba15f2a073f592499e638e40c65 </div>
<div style="display:none"> Gerrit-Change-Number: 28093 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Richard Spiegel <richard.spiegel@silverbackltd.com> </div>