<p>Arthur Heymans has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27984">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">[WIP]nb/intel/*/gma.c: Skip NGI when VGA decode is not enabled<br><br>writes to VGA MEM and IO by NGI are invalid if the IGD is not decoding them.<br><br>Change-Id: I4b9329d14105eb563a0d4aea6ef75ff11febf6df<br>Signed-off-by: Arthur Heymans <arthur@aheymans.xyz><br>---<br>M src/northbridge/intel/gm45/gma.c<br>M src/northbridge/intel/haswell/gma.c<br>M src/northbridge/intel/i945/gma.c<br>M src/northbridge/intel/pineview/gma.c<br>M src/northbridge/intel/sandybridge/gma.c<br>M src/northbridge/intel/x4x/gma.c<br>6 files changed, 81 insertions(+), 37 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/27984/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/intel/gm45/gma.c b/src/northbridge/intel/gm45/gma.c</span><br><span>index 606170c..1316fad 100644</span><br><span>--- a/src/northbridge/intel/gm45/gma.c</span><br><span>+++ b/src/northbridge/intel/gm45/gma.c</span><br><span>@@ -771,11 +771,18 @@</span><br><span> /* Post VBIOS init */</span><br><span> gma_pm_init_post_vbios(dev, edid_lvds.ascii_string);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) {</span><br><span style="color: hsl(0, 100%, 40%);">- gma_ngi(dev, &edid_lvds);</span><br><span style="color: hsl(0, 100%, 40%);">- } else if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {</span><br><span style="color: hsl(0, 100%, 40%);">- int lightup_ok;</span><br><span style="color: hsl(0, 100%, 40%);">- gma_gfxinit(&lightup_ok);</span><br><span style="color: hsl(120, 100%, 40%);">+ int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (vga_disable) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_INFO,</span><br><span style="color: hsl(120, 100%, 40%);">+ "IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ gma_ngi(dev, &edid_lvds);</span><br><span style="color: hsl(120, 100%, 40%);">+ } else if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ int lightup_ok;</span><br><span style="color: hsl(120, 100%, 40%);">+ gma_gfxinit(&lightup_ok);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> }</span><br><span> </span><br><span> intel_gma_restore_opregion();</span><br><span>diff --git a/src/northbridge/intel/haswell/gma.c b/src/northbridge/intel/haswell/gma.c</span><br><span>index 8ffdce8..8f60da4 100644</span><br><span>--- a/src/northbridge/intel/haswell/gma.c</span><br><span>+++ b/src/northbridge/intel/haswell/gma.c</span><br><span>@@ -468,10 +468,17 @@</span><br><span> /* Pre panel init */</span><br><span> gma_setup_panel(dev);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+ int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_SPEW, "NATIVE graphics, run native enable\n");</span><br><span style="color: hsl(0, 100%, 40%);">- gma_gfxinit(&lightup_ok);</span><br><span style="color: hsl(0, 100%, 40%);">- gfx_set_init_done(1);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (vga_disable) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_INFO,</span><br><span style="color: hsl(120, 100%, 40%);">+ "IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_SPEW, "NATIVE graphics, run native enable\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ gma_gfxinit(&lightup_ok);</span><br><span style="color: hsl(120, 100%, 40%);">+ gfx_set_init_done(1);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> }</span><br><span> </span><br><span> if (! lightup_ok) {</span><br><span>diff --git a/src/northbridge/intel/i945/gma.c b/src/northbridge/intel/i945/gma.c</span><br><span>index 6c3d6ae..83dc42e 100644</span><br><span>--- a/src/northbridge/intel/i945/gma.c</span><br><span>+++ b/src/northbridge/intel/i945/gma.c</span><br><span>@@ -700,12 +700,20 @@</span><br><span> pci_write_config32(dev, PCI_COMMAND, reg32 | PCI_COMMAND_MASTER</span><br><span> | PCI_COMMAND_IO | PCI_COMMAND_MEMORY);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+ int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> if (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT)) {</span><br><span style="color: hsl(0, 100%, 40%);">- if (acpi_is_wakeup_s3())</span><br><span style="color: hsl(120, 100%, 40%);">+ if (acpi_is_wakeup_s3()) {</span><br><span> printk(BIOS_INFO,</span><br><span> "Skipping native VGA initialization when resuming from ACPI S3.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- else</span><br><span style="color: hsl(0, 100%, 40%);">- gma_ngi(dev);</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ if (vga_disable) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_INFO,</span><br><span style="color: hsl(120, 100%, 40%);">+ "IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ gma_ngi(dev);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> } else {</span><br><span> /* PCI Init, will run VBIOS */</span><br><span> pci_dev_init(dev);</span><br><span>diff --git a/src/northbridge/intel/pineview/gma.c b/src/northbridge/intel/pineview/gma.c</span><br><span>index 8cf4d22..02100e9 100644</span><br><span>--- a/src/northbridge/intel/pineview/gma.c</span><br><span>+++ b/src/northbridge/intel/pineview/gma.c</span><br><span>@@ -275,6 +275,8 @@</span><br><span> struct resource *pio_res;</span><br><span> struct northbridge_intel_pineview_config *conf = dev->chip_info;</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+ int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /* Find base addresses */</span><br><span> mmio_res = find_resource(dev, 0x10);</span><br><span> gtt_res = find_resource(dev, 0x1c);</span><br><span>@@ -282,11 +284,17 @@</span><br><span> physbase = pci_read_config32(dev, 0x5c) & ~0xf;</span><br><span> </span><br><span> if (gtt_res && gtt_res->base && physbase && pio_res && pio_res->base) {</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_SPEW, "Initializing VGA. MMIO 0x%llx\n",</span><br><span style="color: hsl(0, 100%, 40%);">- mmio_res->base);</span><br><span style="color: hsl(0, 100%, 40%);">- intel_gma_init(conf, dev, res2mmio(mmio_res, 0, 0),</span><br><span style="color: hsl(0, 100%, 40%);">- res2mmio(gtt_res, 0, 0),</span><br><span style="color: hsl(0, 100%, 40%);">- physbase, pio_res->base);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (vga_disable) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_INFO,</span><br><span style="color: hsl(120, 100%, 40%);">+ "IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_SPEW, "Initializing VGA. MMIO 0x%llx\n",</span><br><span style="color: hsl(120, 100%, 40%);">+ mmio_res->base);</span><br><span style="color: hsl(120, 100%, 40%);">+ intel_gma_init(conf, dev,</span><br><span style="color: hsl(120, 100%, 40%);">+ res2mmio(mmio_res, 0, 0),</span><br><span style="color: hsl(120, 100%, 40%);">+ res2mmio(gtt_res, 0, 0),</span><br><span style="color: hsl(120, 100%, 40%);">+ physbase, pio_res->base);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> }</span><br><span> </span><br><span> /* Linux relies on VBT for panel info. */</span><br><span>diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c</span><br><span>index 73546ce..042c2a9 100644</span><br><span>--- a/src/northbridge/intel/sandybridge/gma.c</span><br><span>+++ b/src/northbridge/intel/sandybridge/gma.c</span><br><span>@@ -631,29 +631,38 @@</span><br><span> /* Post VBIOS init */</span><br><span> gma_pm_init_post_vbios(dev);</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+ int vga_disable = (pci_read_config16(dev, GGC) & 2) >> 1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /* Running graphics init on S3 breaks Linux drm driver. */</span><br><span> if (!acpi_is_wakeup_s3() &&</span><br><span> (IS_ENABLED(CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT) ||</span><br><span> IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT))) {</span><br><span style="color: hsl(0, 100%, 40%);">- /* This should probably run before post VBIOS init. */</span><br><span style="color: hsl(0, 100%, 40%);">- printk(BIOS_SPEW, "Initializing VGA without OPROM.\n");</span><br><span style="color: hsl(0, 100%, 40%);">- u8 *mmiobase;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 iobase, physbase, graphics_base;</span><br><span style="color: hsl(0, 100%, 40%);">- struct northbridge_intel_sandybridge_config *conf = dev->chip_info;</span><br><span style="color: hsl(0, 100%, 40%);">- iobase = dev->resource_list[2].base;</span><br><span style="color: hsl(0, 100%, 40%);">- mmiobase = res2mmio(&dev->resource_list[0], 0, 0);</span><br><span style="color: hsl(0, 100%, 40%);">- physbase = pci_read_config32(dev, 0x5c) & ~0xf;</span><br><span style="color: hsl(0, 100%, 40%);">- graphics_base = dev->resource_list[1].base;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- int lightup_ok;</span><br><span style="color: hsl(0, 100%, 40%);">- if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {</span><br><span style="color: hsl(0, 100%, 40%);">- gma_gfxinit(&lightup_ok);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (vga_disable) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_INFO,</span><br><span style="color: hsl(120, 100%, 40%);">+ "IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");</span><br><span> } else {</span><br><span style="color: hsl(0, 100%, 40%);">- lightup_ok = i915lightup_sandy(&conf->gfx, physbase,</span><br><span style="color: hsl(0, 100%, 40%);">- iobase, mmiobase, graphics_base);</span><br><span style="color: hsl(120, 100%, 40%);">+ /* This should probably run before post VBIOS init. */</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_SPEW, "Initializing VGA without OPROM.\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ u8 *mmiobase;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 iobase, physbase, graphics_base;</span><br><span style="color: hsl(120, 100%, 40%);">+ struct northbridge_intel_sandybridge_config *conf = dev->chip_info;</span><br><span style="color: hsl(120, 100%, 40%);">+ iobase = dev->resource_list[2].base;</span><br><span style="color: hsl(120, 100%, 40%);">+ mmiobase = res2mmio(&dev->resource_list[0], 0, 0);</span><br><span style="color: hsl(120, 100%, 40%);">+ physbase = pci_read_config32(dev, 0x5c) & ~0xf;</span><br><span style="color: hsl(120, 100%, 40%);">+ graphics_base = dev->resource_list[1].base;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ int lightup_ok;</span><br><span style="color: hsl(120, 100%, 40%);">+ if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ gma_gfxinit(&lightup_ok);</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ lightup_ok = i915lightup_sandy(&conf->gfx,</span><br><span style="color: hsl(120, 100%, 40%);">+ physbase,</span><br><span style="color: hsl(120, 100%, 40%);">+ iobase, mmiobase,</span><br><span style="color: hsl(120, 100%, 40%);">+ graphics_base);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+ if (lightup_ok)</span><br><span style="color: hsl(120, 100%, 40%);">+ gfx_set_init_done(1);</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">- if (lightup_ok)</span><br><span style="color: hsl(0, 100%, 40%);">- gfx_set_init_done(1);</span><br><span> }</span><br><span> </span><br><span> gma_enable_swsci();</span><br><span>diff --git a/src/northbridge/intel/x4x/gma.c b/src/northbridge/intel/x4x/gma.c</span><br><span>index 2d2feee..d0c40b1 100644</span><br><span>--- a/src/northbridge/intel/x4x/gma.c</span><br><span>+++ b/src/northbridge/intel/x4x/gma.c</span><br><span>@@ -60,7 +60,7 @@</span><br><span> </span><br><span> static void gma_func0_init(struct device *dev)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- u16 reg16, ggc;</span><br><span style="color: hsl(120, 100%, 40%);">+ u16 reg16;</span><br><span> u32 reg32;</span><br><span> </span><br><span> /* IGD needs to be Bus Master */</span><br><span>@@ -74,11 +74,16 @@</span><br><span> reg16 |= 0xbc;</span><br><span> pci_write_config16(dev_find_slot(0, PCI_DEVFN(0x2, 0)), 0xcc, reg16);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- ggc = pci_read_config16(dev_find_slot(0, PCI_DEVFN(0, 0)), D0F0_GGC);</span><br><span style="color: hsl(120, 100%, 40%);">+ int vga_disable = pci_read_config16(dev, D0F0_GGC);</span><br><span> </span><br><span> if (IS_ENABLED(CONFIG_MAINBOARD_USE_LIBGFXINIT)) {</span><br><span style="color: hsl(0, 100%, 40%);">- int lightup_ok;</span><br><span style="color: hsl(0, 100%, 40%);">- gma_gfxinit(&lightup_ok);</span><br><span style="color: hsl(120, 100%, 40%);">+ if (vga_disable) {</span><br><span style="color: hsl(120, 100%, 40%);">+ printk(BIOS_INFO,</span><br><span style="color: hsl(120, 100%, 40%);">+ "IGD is not decoding legacy VGA MEM and IO: skipping NATIVE graphic init\n");</span><br><span style="color: hsl(120, 100%, 40%);">+ } else {</span><br><span style="color: hsl(120, 100%, 40%);">+ int lightup_ok;</span><br><span style="color: hsl(120, 100%, 40%);">+ gma_gfxinit(&lightup_ok);</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span> } else {</span><br><span> pci_dev_init(dev);</span><br><span> }</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27984">change 27984</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I4b9329d14105eb563a0d4aea6ef75ff11febf6df </div>
<div style="display:none"> Gerrit-Change-Number: 27984 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Arthur Heymans <arthur@aheymans.xyz> </div>