<p><a href="https://review.coreboot.org/27988">View Change</a></p><p>5 comments:</p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27988/1/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c">File src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27988/1/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c@927">Patch Set #1, Line 927:</a> <code style="font-family:monospace,monospace">                /* On Family15h processors, the value for the specific CS being targeted</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27988/1/src/northbridge/amd/amdmct/wrappers/mcti_d.c">File src/northbridge/amd/amdmct/wrappers/mcti_d.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27988/1/src/northbridge/amd/amdmct/wrappers/mcti_d.c@173">Patch Set #1, Line 173:</a> <code style="font-family:monospace,monospace">             //val = 2;      /* Override faulty SPD checksum (DIMM will be enabled), continue current node initialization */</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27988/1/src/northbridge/amd/lx/northbridgeinit.c">File src/northbridge/amd/lx/northbridgeinit.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27988/1/src/northbridge/amd/lx/northbridgeinit.c@275">Patch Set #1, Line 275:</a> <code style="font-family:monospace,monospace">          /* So we need a high page aligned address (pah) and low page aligned address (pal)</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27988/1/src/northbridge/via/vx900/raminit_ddr3.c">File src/northbridge/via/vx900/raminit_ddr3.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27988/1/src/northbridge/via/vx900/raminit_ddr3.c@1227">Patch Set #1, Line 1227:</a> <code style="font-family:monospace,monospace">static void vx900_dram_calibrate_receive_delays(vx900_delay_calib * delays,</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">"foo * bar" should be "foo *bar"</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27988/1/src/soc/broadcom/cygnus/include/soc/shmoo_and28/phy_and28_e2.h">File src/soc/broadcom/cygnus/include/soc/shmoo_and28/phy_and28_e2.h:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27988/1/src/soc/broadcom/cygnus/include/soc/shmoo_and28/phy_and28_e2.h@41">Patch Set #1, Line 41:</a> <code style="font-family:monospace,monospace"> *DDR34_CORE_PHY_CONTROL_REGS - DDR34 CORE DDR34 Address/Command control registers</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li></ul><p>To view, visit <a href="https://review.coreboot.org/27988">change 27988</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27988"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
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<div style="display:none"> Gerrit-Change-Id: I689c5663ef59861f79b68220abd146144f7618de </div>
<div style="display:none"> Gerrit-Change-Number: 27988 </div>
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<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>
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<div style="display:none"> Gerrit-Comment-Date: Thu, 09 Aug 2018 16:57:47 +0000 </div>
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