<p><a href="https://review.coreboot.org/27912">View Change</a></p><p>32 comments:</p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/advansus/a785e-i/resourcemap.c">File src/mainboard/advansus/a785e-i/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/advansus/a785e-i/resourcemap.c@122">Patch Set #2, Line 122:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/amd/bimini_fam10/resourcemap.c">File src/mainboard/amd/bimini_fam10/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/amd/bimini_fam10/resourcemap.c@123">Patch Set #2, Line 123:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/amd/mahogany_fam10/resourcemap.c">File src/mainboard/amd/mahogany_fam10/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/amd/mahogany_fam10/resourcemap.c@124">Patch Set #2, Line 124:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c">File src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c@122">Patch Set #2, Line 122:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/amd/south_station/mainboard.c">File src/mainboard/amd/south_station/mainboard.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/amd/south_station/mainboard.c@21">Patch Set #2, Line 21:</a> <code style="font-family:monospace,monospace">#include "SBPLATFORM.h" /* Platform Specific Definitions */</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">please, no space before tabs</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/amd/tilapia_fam10/resourcemap.c">File src/mainboard/amd/tilapia_fam10/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/amd/tilapia_fam10/resourcemap.c@122">Patch Set #2, Line 122:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/amd/torpedo/gpio.h">File src/mainboard/amd/torpedo/gpio.h:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/amd/torpedo/gpio.h@301">Patch Set #2, Line 301:</a> <code style="font-family:monospace,monospace">#define GPIO_189_SELECT FUNCTION1 // USED AS AC_OK RECEIVER, INPUT, low active</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/amd/torpedo/gpio.h@302">Patch Set #2, Line 302:</a> <code style="font-family:monospace,monospace">#define GPIO_190_SELECT FUNCTION1 // USED TO MONITER INTERRUPT FROM BATT CHARGER, INPUT</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/amd/union_station/mainboard.c">File src/mainboard/amd/union_station/mainboard.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/amd/union_station/mainboard.c@20">Patch Set #2, Line 20:</a> <code style="font-family:monospace,monospace">#include "SBPLATFORM.h" /* Platform Specific Definitions */</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">please, no space before tabs</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/asus/kcma-d8/resourcemap.c">File src/mainboard/asus/kcma-d8/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/asus/kcma-d8/resourcemap.c@127">Patch Set #2, Line 127:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/asus/kcma-d8/resourcemap.c@382">Patch Set #2, Line 382:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/asus/kfsn4-dre/resourcemap.c">File src/mainboard/asus/kfsn4-dre/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/asus/kfsn4-dre/resourcemap.c@127">Patch Set #2, Line 127:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/asus/kgpe-d16/resourcemap.c">File src/mainboard/asus/kgpe-d16/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/asus/kgpe-d16/resourcemap.c@127">Patch Set #2, Line 127:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/asus/kgpe-d16/resourcemap.c@382">Patch Set #2, Line 382:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/asus/m4a78-em/resourcemap.c">File src/mainboard/asus/m4a78-em/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/asus/m4a78-em/resourcemap.c@124">Patch Set #2, Line 124:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/asus/m4a785-m/resourcemap.c">File src/mainboard/asus/m4a785-m/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/asus/m4a785-m/resourcemap.c@124">Patch Set #2, Line 124:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/asus/m5a88-v/resourcemap.c">File src/mainboard/asus/m5a88-v/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/asus/m5a88-v/resourcemap.c@122">Patch Set #2, Line 122:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/avalue/eax-785e/resourcemap.c">File src/mainboard/avalue/eax-785e/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/avalue/eax-785e/resourcemap.c@122">Patch Set #2, Line 122:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/gigabyte/ma785gm/resourcemap.c">File src/mainboard/gigabyte/ma785gm/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/gigabyte/ma785gm/resourcemap.c@124">Patch Set #2, Line 124:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/gigabyte/ma785gmt/resourcemap.c">File src/mainboard/gigabyte/ma785gmt/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/gigabyte/ma785gmt/resourcemap.c@124">Patch Set #2, Line 124:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/gigabyte/ma78gm/resourcemap.c">File src/mainboard/gigabyte/ma78gm/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/gigabyte/ma78gm/resourcemap.c@124">Patch Set #2, Line 124:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/iei/kino-780am2-fam10/resourcemap.c">File src/mainboard/iei/kino-780am2-fam10/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/iei/kino-780am2-fam10/resourcemap.c@124">Patch Set #2, Line 124:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c">File src/mainboard/intel/glkrvp/variants/baseboard/gpio.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/intel/glkrvp/variants/baseboard/gpio.c@57">Patch Set #2, Line 57:</a> <code style="font-family:monospace,monospace"> PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_29, 1, DEEP, UP_20K, HIZCRx0, DISPUPD),/* Codec Power Down: Output/ISH_GPIO_3*/</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/jetway/pa78vm5/resourcemap.c">File src/mainboard/jetway/pa78vm5/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/jetway/pa78vm5/resourcemap.c@125">Patch Set #2, Line 125:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/msi/ms9652_fam10/resourcemap.c">File src/mainboard/msi/ms9652_fam10/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/msi/ms9652_fam10/resourcemap.c@125">Patch Set #2, Line 125:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/siemens/mc_tcu3/ptn3460.c">File src/mainboard/siemens/mc_tcu3/ptn3460.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/siemens/mc_tcu3/ptn3460.c@117">Patch Set #2, Line 117:</a> <code style="font-family:monospace,monospace"> status = i2c_write(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR, PTN_CONFIG_OFF + 5,</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/siemens/mc_tcu3/ptn3460.c@143">Patch Set #2, Line 143:</a> <code style="font-family:monospace,monospace"> status = i2c_write(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR, PTN_CONFIG_OFF + 5,</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/siemens/mc_tcu3/ptn3460.c@171">Patch Set #2, Line 171:</a> <code style="font-family:monospace,monospace"> status = i2c_write(PTN_I2C_CONTROLLER, PTN_SLAVE_ADR, PTN_CONFIG_OFF + 4,</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c">File src/mainboard/supermicro/h8dmr_fam10/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/supermicro/h8dmr_fam10/resourcemap.c@125">Patch Set #2, Line 125:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/supermicro/h8qme_fam10/resourcemap.c">File src/mainboard/supermicro/h8qme_fam10/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/supermicro/h8qme_fam10/resourcemap.c@125">Patch Set #2, Line 125:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/supermicro/h8scm_fam10/resourcemap.c">File src/mainboard/supermicro/h8scm_fam10/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/supermicro/h8scm_fam10/resourcemap.c@124">Patch Set #2, Line 124:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/tyan/s2912_fam10/resourcemap.c">File src/mainboard/tyan/s2912_fam10/resourcemap.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/27912/2/src/mainboard/tyan/s2912_fam10/resourcemap.c@125">Patch Set #2, Line 125:</a> <code style="font-family:monospace,monospace"> * This field defines the upp address bits of a 40-bit address that</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li></ul><p>To view, visit <a href="https://review.coreboot.org/27912">change 27912</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27912"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: comment </div>
<div style="display:none"> Gerrit-Change-Id: Ief6a04ccb63658b5fb03cd1d298bf00948cf7410 </div>
<div style="display:none"> Gerrit-Change-Number: 27912 </div>
<div style="display:none"> Gerrit-PatchSet: 2 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>
<div style="display:none"> Gerrit-Comment-Date: Tue, 07 Aug 2018 10:55:36 +0000 </div>
<div style="display:none"> Gerrit-HasComments: Yes </div>
<div style="display:none"> Gerrit-HasLabels: No </div>