<p>Julius Werner would like Patrick Rudolph to <strong>review</strong> this change.</p><p><a href="https://review.coreboot.org/27950">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">rk3288: Dig up two more KB of SRAM from under the couch cushions<br><br>RK3288 has always been notoriously low on SRAM, to the point where its<br>boards have less than 100 bytes left in both their bootblock/verstage<br>sections. This becomes a problem every time we try to add a tiny amount<br>of code to common coreboot interfaces that are included in them.<br><br>This patch manages to add another KB to each, one from the CBMEM console<br>(which now might get cut off a bit, but that's life) and one by moving<br>the TTB_SUBTABLES to PMUSRAM. PMUSRAM is a weird world where write<br>accesses must always be exactly 4 bytes long or they hang the CPU, so we<br>mostly ignore it... but thankfully, page table entries are exactly 4<br>bytes long and that's the only thing we write to this region, so it<br>works out in this case.<br><br>Change-Id: I5aecd66db40b3f52299b270322b8c8784dbe7e6f<br>Signed-off-by: Julius Werner <jwerner@chromium.org><br>---<br>M src/soc/rockchip/rk3288/include/soc/memlayout.ld<br>1 file changed, 4 insertions(+), 4 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/27950/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/rockchip/rk3288/include/soc/memlayout.ld b/src/soc/rockchip/rk3288/include/soc/memlayout.ld</span><br><span>index daff503..fc3758b 100644</span><br><span>--- a/src/soc/rockchip/rk3288/include/soc/memlayout.ld</span><br><span>+++ b/src/soc/rockchip/rk3288/include/soc/memlayout.ld</span><br><span>@@ -30,11 +30,10 @@</span><br><span> </span><br><span>    SRAM_START(0xFF700000)</span><br><span>       TTB(0xFF700000, 16K)</span><br><span style="color: hsl(0, 100%, 40%);">-    BOOTBLOCK(0xFF704004, 19K - 4)</span><br><span style="color: hsl(0, 100%, 40%);">-  PRERAM_CBMEM_CONSOLE(0xFF708C00, 4K)</span><br><span style="color: hsl(120, 100%, 40%);">+  BOOTBLOCK(0xFF704004, 20K - 4)</span><br><span style="color: hsl(120, 100%, 40%);">+        PRERAM_CBMEM_CONSOLE(0xFF709000, 3K)</span><br><span>         VBOOT2_WORK(0xFF709C00, 12K)</span><br><span style="color: hsl(0, 100%, 40%);">-    OVERLAP_VERSTAGE_ROMSTAGE(0xFF70CC00, 40K)</span><br><span style="color: hsl(0, 100%, 40%);">-      TTB_SUBTABLES(0xFF716C00, 1K)</span><br><span style="color: hsl(120, 100%, 40%);">+ OVERLAP_VERSTAGE_ROMSTAGE(0xFF70CC00, 41K)</span><br><span>   PRERAM_CBFS_CACHE(0xFF717000, 1K)</span><br><span>    TIMESTAMP(0xFF717400, 0x180)</span><br><span>         STACK(0xFF717580, 3K - 0x180)</span><br><span>@@ -43,6 +42,7 @@</span><br><span>    /* 4K of special SRAM in PMU power domain.</span><br><span>    * Careful: only supports 32-bit wide write accesses! */</span><br><span>     SYMBOL(pmu_sram, 0xFF720000)</span><br><span style="color: hsl(120, 100%, 40%);">+  TTB_SUBTABLES(0xFF720800, 1K)</span><br><span>        WATCHDOG_TOMBSTONE(0xFF720FFC, 4)</span><br><span>    SYMBOL(epmu_sram, 0xFF721000)</span><br><span> }</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27950">change 27950</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27950"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I5aecd66db40b3f52299b270322b8c8784dbe7e6f </div>
<div style="display:none"> Gerrit-Change-Number: 27950 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Julius Werner <jwerner@chromium.org> </div>
<div style="display:none"> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph@9elements.com> </div>