<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27866">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/supermicro/h8qme_fam10: Use common pnp_{enter,exit} functions<br><br>Change-Id: Ie3ee4acfd272991133f02a56df6e23aa6071d3e9<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/mainboard/supermicro/h8qme_fam10/romstage.c<br>1 file changed, 6 insertions(+), 20 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/27866/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/supermicro/h8qme_fam10/romstage.c b/src/mainboard/supermicro/h8qme_fam10/romstage.c</span><br><span>index f5222ed..ddbb97c 100644</span><br><span>--- a/src/mainboard/supermicro/h8qme_fam10/romstage.c</span><br><span>+++ b/src/mainboard/supermicro/h8qme_fam10/romstage.c</span><br><span>@@ -120,23 +120,9 @@</span><br><span> #define GPIO2_DEV PNP_DEV(0x2e, W83627HF_GPIO2)</span><br><span> #define GPIO3_DEV PNP_DEV(0x2e, W83627HF_GPIO3)</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-/* TODO: superio code should really not be in mainboard */</span><br><span style="color: hsl(0, 100%, 40%);">-static void pnp_enter_ext_func_mode(pnp_devfn_t dev)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-   u16 port = dev >> 8;</span><br><span style="color: hsl(0, 100%, 40%);">-      outb(0x87, port);</span><br><span style="color: hsl(0, 100%, 40%);">-       outb(0x87, port);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static void pnp_exit_ext_func_mode(pnp_devfn_t dev)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-  u16 port = dev >> 8;</span><br><span style="color: hsl(0, 100%, 40%);">-      outb(0xaa, port);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> static void write_GPIO(void)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- pnp_enter_ext_func_mode(GPIO1_DEV);</span><br><span style="color: hsl(120, 100%, 40%);">+   pnp_enter_conf_state(GPIO1_DEV);</span><br><span>     pnp_set_logical_device(GPIO1_DEV);</span><br><span>   pnp_write_config(GPIO1_DEV, 0x30, 0x01);</span><br><span>     pnp_write_config(GPIO1_DEV, 0x60, 0x00);</span><br><span>@@ -147,9 +133,9 @@</span><br><span>       pnp_write_config(GPIO1_DEV, 0xf0, 0xff);</span><br><span>     pnp_write_config(GPIO1_DEV, 0xf1, 0xff);</span><br><span>     pnp_write_config(GPIO1_DEV, 0xf2, 0x00);</span><br><span style="color: hsl(0, 100%, 40%);">-        pnp_exit_ext_func_mode(GPIO1_DEV);</span><br><span style="color: hsl(120, 100%, 40%);">+    pnp_exit_conf_state(GPIO1_DEV);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-     pnp_enter_ext_func_mode(GPIO2_DEV);</span><br><span style="color: hsl(120, 100%, 40%);">+   pnp_enter_conf_state(GPIO2_DEV);</span><br><span>     pnp_set_logical_device(GPIO2_DEV);</span><br><span>   pnp_write_config(GPIO2_DEV, 0x30, 0x01);</span><br><span>     pnp_write_config(GPIO2_DEV, 0xf0, 0xef);</span><br><span>@@ -159,16 +145,16 @@</span><br><span>     pnp_write_config(GPIO2_DEV, 0xf5, 0x48);</span><br><span>     pnp_write_config(GPIO2_DEV, 0xf6, 0x00);</span><br><span>     pnp_write_config(GPIO2_DEV, 0xf7, 0xc0);</span><br><span style="color: hsl(0, 100%, 40%);">-        pnp_exit_ext_func_mode(GPIO2_DEV);</span><br><span style="color: hsl(120, 100%, 40%);">+    pnp_exit_conf_state(GPIO2_DEV);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-     pnp_enter_ext_func_mode(GPIO3_DEV);</span><br><span style="color: hsl(120, 100%, 40%);">+   pnp_enter_conf_state(GPIO3_DEV);</span><br><span>     pnp_set_logical_device(GPIO3_DEV);</span><br><span>   pnp_write_config(GPIO3_DEV, 0x30, 0x00);</span><br><span>     pnp_write_config(GPIO3_DEV, 0xf0, 0xff);</span><br><span>     pnp_write_config(GPIO3_DEV, 0xf1, 0xff);</span><br><span>     pnp_write_config(GPIO3_DEV, 0xf2, 0xff);</span><br><span>     pnp_write_config(GPIO3_DEV, 0xf3, 0x40);</span><br><span style="color: hsl(0, 100%, 40%);">-        pnp_exit_ext_func_mode(GPIO3_DEV);</span><br><span style="color: hsl(120, 100%, 40%);">+    pnp_exit_conf_state(GPIO3_DEV);</span><br><span> }</span><br><span> </span><br><span> void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27866">change 27866</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ie3ee4acfd272991133f02a56df6e23aa6071d3e9 </div>
<div style="display:none"> Gerrit-Change-Number: 27866 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>