<p>Elyes HAOUAS has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27868">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/kontron/ktqm77: Use common pnp_{enter,exit} functions<br><br>Change-Id: Ib5799cceacefa89385a7615ef1c4b4d06157044f<br>Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr><br>---<br>M src/mainboard/kontron/ktqm77/romstage.c<br>1 file changed, 3 insertions(+), 16 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/27868/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c</span><br><span>index 2a674a5..4afcebb 100644</span><br><span>--- a/src/mainboard/kontron/ktqm77/romstage.c</span><br><span>+++ b/src/mainboard/kontron/ktqm77/romstage.c</span><br><span>@@ -18,7 +18,6 @@</span><br><span> #include <string.h></span><br><span> #include <lib.h></span><br><span> #include <timestamp.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <arch/io.h></span><br><span> #include <device/pci_def.h></span><br><span> #include <device/pnp_def.h></span><br><span> #include <cpu/x86/lapic.h></span><br><span>@@ -34,6 +33,7 @@</span><br><span> #include <arch/cpu.h></span><br><span> #include <cpu/x86/msr.h></span><br><span> #include <halt.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <superio/winbond/common/winbond.h></span><br><span> </span><br><span> void pch_enable_lpc(void)</span><br><span> {</span><br><span>@@ -62,25 +62,12 @@</span><br><span>      RCBA32(FD) = reg32;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pnp_enter_ext_func_mode(pnp_devfn_t dev)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-       u16 port = dev >> 8;</span><br><span style="color: hsl(0, 100%, 40%);">-      outb(0x87, port);</span><br><span style="color: hsl(0, 100%, 40%);">-       outb(0x87, port);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static void pnp_exit_ext_func_mode(pnp_devfn_t dev)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">-  u16 port = dev >> 8;</span><br><span style="color: hsl(0, 100%, 40%);">-      outb(0xaa, port);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> void mainboard_config_superio(void)</span><br><span> {</span><br><span>       int lvds_3v = 0; /* 0 (5V) or 1 (3V3) */</span><br><span>     int dis_bl_inv = 1; /* backlight inversion: 1 = disabled, 0 = enabled */</span><br><span>     pnp_devfn_t dev = PNP_DEV(0x2e, 0x9);</span><br><span style="color: hsl(0, 100%, 40%);">-   pnp_enter_ext_func_mode(dev);</span><br><span style="color: hsl(120, 100%, 40%);">+ pnp_enter_conf_state(dev);</span><br><span>   pnp_write_config(dev, 0x29, 0x02); /* Pins 119, 120 are GPIO21, 20 */</span><br><span>        pnp_write_config(dev, 0x30, 0x03); /* Enable GPIO2+3 */</span><br><span>      pnp_write_config(dev, 0x2a, 0x01); /* Pins 62, 63, 65, 66 are</span><br><span>@@ -94,7 +81,7 @@</span><br><span>    pnp_write_config(dev, 0xe3, 0xdd); /* GPIO2 bits 1, 5 are output */</span><br><span>  pnp_write_config(dev, 0xe4, (dis_bl_inv << 5) | (lvds_3v << 1)); /* GPIO2 bits 1, 5 */</span><br><span>   pnp_write_config(dev, 0xf3, 0x40); /* Disable suspend LED during normal operation */</span><br><span style="color: hsl(0, 100%, 40%);">-    pnp_exit_ext_func_mode(dev);</span><br><span style="color: hsl(120, 100%, 40%);">+  pnp_exit_conf_state(dev);</span><br><span> }</span><br><span> </span><br><span> void mainboard_fill_pei_data(struct pei_data *pei_data)</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27868">change 27868</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27868"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ib5799cceacefa89385a7615ef1c4b4d06157044f </div>
<div style="display:none"> Gerrit-Change-Number: 27868 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Elyes HAOUAS <ehaouas@noos.fr> </div>