<p><a href="https://review.coreboot.org/15164">View Change</a></p><p>9 comments:</p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0;"><p><a href="https://review.coreboot.org/#/c/15164/23/src/northbridge/amd/pi/00730F01/northbridge.c">File src/northbridge/amd/pi/00730F01/northbridge.c:</a></p><ul style="list-style: none; padding: 0;"><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/15164/23/src/northbridge/amd/pi/00730F01/northbridge.c@488">Patch Set #23, Line 488:</a> <code style="font-family:monospace,monospace"> unsigned int depth, int linknum, int8_t *root_level,</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/15164/23/src/northbridge/amd/pi/00730F01/northbridge.c@511">Patch Set #23, Line 511:</a> <code style="font-family:monospace,monospace"> add_ivhd_dev_entry(parent, dev, current, length, 0x2, 0x97);</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/15164/23/src/northbridge/amd/pi/00730F01/northbridge.c@517">Patch Set #23, Line 517:</a> <code style="font-family:monospace,monospace"> add_ivhd_dev_entry(parent, dev, current, length, 0x2, 0x0);</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/15164/23/src/northbridge/amd/pi/00730F01/northbridge.c@521">Patch Set #23, Line 521:</a> <code style="font-family:monospace,monospace"> is_pcie = pci_find_capability(dev, PCI_CAP_ID_PCIE);</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/15164/23/src/northbridge/amd/pi/00730F01/northbridge.c@526">Patch Set #23, Line 526:</a> <code style="font-family:monospace,monospace"> add_ivhd_dev_entry(parent, dev, current, length, 0x2, 0x0);</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/15164/23/src/northbridge/amd/pi/00730F01/northbridge.c@527">Patch Set #23, Line 527:</a> <code style="font-family:monospace,monospace"> } else if ((header_type == PCI_HEADER_TYPE_NORMAL) &&</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/15164/23/src/northbridge/amd/pi/00730F01/northbridge.c@529">Patch Set #23, Line 529:</a> <code style="font-family:monospace,monospace"> add_ivhd_dev_entry(parent, dev, current, length, 0x42, 0x0);</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/15164/23/src/northbridge/amd/pi/00730F01/northbridge.c@589">Patch Set #23, Line 589:</a> <code style="font-family:monospace,monospace"> printk(BIOS_WARNING, "%s: G-series northbridge device not present!\n", __func__);</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li><li style="margin: 0; padding: 0 0 0 16px;"><p style="margin-bottom: 4px;"><a href="https://review.coreboot.org/#/c/15164/23/src/northbridge/amd/pi/00730F01/northbridge.c@590">Patch Set #23, Line 590:</a> <code style="font-family:monospace,monospace"> printk(BIOS_WARNING, "%s: IVRS table not generated...\n", __func__);</code></p><p style="white-space: pre-wrap; word-wrap: break-word;">line over 80 characters</p></li></ul></li></ul><p>To view, visit <a href="https://review.coreboot.org/15164">change 15164</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/15164"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: comment </div>
<div style="display:none"> Gerrit-Change-Id: I1ae789f75363435accd14a1b556e1570f43f94c4 </div>
<div style="display:none"> Gerrit-Change-Number: 15164 </div>
<div style="display:none"> Gerrit-PatchSet: 23 </div>
<div style="display:none"> Gerrit-Owner: Timothy Pearson <tpearson@raptorengineering.com> </div>
<div style="display:none"> Gerrit-Reviewer: Alexander Couzens <lynxis@fe80.eu> </div>
<div style="display:none"> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki@gmail.com> </div>
<div style="display:none"> Gerrit-Reviewer: Martin Roth <martinroth@google.com> </div>
<div style="display:none"> Gerrit-Reviewer: Paul Menzel <paulepanter@users.sourceforge.net> </div>
<div style="display:none"> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki@gmail.com> </div>
<div style="display:none"> Gerrit-Reviewer: Timothy Pearson <tpearson@raptorengineering.com> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>
<div style="display:none"> Gerrit-CC: Piotr Król <piotr.krol@3mdeb.com> </div>
<div style="display:none"> Gerrit-Comment-Date: Sat, 04 Aug 2018 00:14:10 +0000 </div>
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