<p>Kane Chen has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27814">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">vendorcode/intel/fsp/fsp2_0/glk: Add nWR config in Odt Config<br><br>From doc 571118, the bit 5 of OdtConfig is nWR config.<br><br>Change-Id: Ic8e4e2ffb098c8ba2f670535981e9a30c3d45b64<br>Signed-off-by: Kane Chen <kane.chen@intel.com><br>---<br>M src/vendorcode/intel/fsp/fsp2_0/glk/FspmUpd.h<br>1 file changed, 1 insertion(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/27814/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/vendorcode/intel/fsp/fsp2_0/glk/FspmUpd.h b/src/vendorcode/intel/fsp/fsp2_0/glk/FspmUpd.h</span><br><span>index c25fd40..0329c93 100644</span><br><span>--- a/src/vendorcode/intel/fsp/fsp2_0/glk/FspmUpd.h</span><br><span>+++ b/src/vendorcode/intel/fsp/fsp2_0/glk/FspmUpd.h</span><br><span>@@ -474,6 +474,7 @@</span><br><span>   1 - ODT_AB_HIGH_HIGH. DDR3L & LPDDR3:  X - Don't Care. [4] TX ODT. DDR3L only:</span><br><span>   0 = RZQ/4 (60 Ohms)  = MRC_SMIP_DDR3L_TX_ODT_RTT_WR_60_OHMS,   1 = RZQ/2 (120</span><br><span>   Ohms) = MRC_SMIP_DDR3L_TX_ODT_RTT_WR_120_OHMS. LPDDR3 & LPDDR4:   X = Don't Care</span><br><span style="color: hsl(120, 100%, 40%);">+  [5] nWR config: 0 - nWR6, 1 - nWR24.</span><br><span> **/</span><br><span>   UINT8                       Ch0_OdtConfig;</span><br><span> </span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27814">change 27814</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27814"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ic8e4e2ffb098c8ba2f670535981e9a30c3d45b64 </div>
<div style="display:none"> Gerrit-Change-Number: 27814 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Kane Chen <kane.chen@intel.com> </div>