<p>Kevin Chiu has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27816">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">google/grunt: Override BayHub EMMC driving strength<br><br>Careena EVT SanDisk EMMC sku has high fail rate of 0x5B reboot failure.<br>It will need to increases 1.8V EMMC CLK/CMD,Data driving strength for this issue.<br><br>CLK[6:4]<br>CMD,DATA[3:1]<br><br>original: 0x6B<br>enhanced: 0x7F<br><br>BUG=b:111964336<br>BRANCH=master<br>TEST=emerge-grunt coreboot<br>Change-Id: I3db38ff12c566c258895c6643008a0472ca528bb<br>Signed-off-by: Kevin Chiu <Kevin.Chiu@quantatw.com><br>---<br>M src/drivers/generic/bayhub/bh720.c<br>A src/drivers/generic/bayhub/bh720.h<br>M src/mainboard/google/kahlee/variants/baseboard/mainboard.c<br>3 files changed, 77 insertions(+), 22 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/27816/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/drivers/generic/bayhub/bh720.c b/src/drivers/generic/bayhub/bh720.c</span><br><span>index 3e78b4f..b689b67 100644</span><br><span>--- a/src/drivers/generic/bayhub/bh720.c</span><br><span>+++ b/src/drivers/generic/bayhub/bh720.c</span><br><span>@@ -21,28 +21,11 @@</span><br><span> #include <device/pci.h></span><br><span> #include <device/pci_ids.h></span><br><span> #include "chip.h"</span><br><span style="color: hsl(120, 100%, 40%);">+#include "bh720.h"</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-enum {</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_PROTECT = 0xd0,</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_PROTECT_LOCK_OFF = 0,</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_PROTECT_LOCK_ON = BIT(0),</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_PROTECT_OFF = 0,</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_PROTECT_ON = BIT(31),</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_LINK_CTRL = 0x90,</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_LINK_CTRL_L0_ENABLE = BIT(0),</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_LINK_CTRL_L1_ENABLE = BIT(1),</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_LINK_CTRL_CLKREQ = BIT(8),</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_MISC2 = 0xf0,</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_MISC2_ASPM_DISABLE = BIT(0),</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_MISC2_APSM_CLKREQ_L1 = BIT(7),</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_MISC2_APSM_PHY_L1 = BIT(10),</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_MISC2_APSM_MORE = BIT(12),</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_RTD3_L1 = 0x3e0,</span><br><span style="color: hsl(0, 100%, 40%);">- BH720_RTD3_L1_DISABLE_L1 = BIT(28),</span><br><span style="color: hsl(0, 100%, 40%);">-};</span><br><span style="color: hsl(120, 100%, 40%);">+__attribute__((weak)) void bh720_driving_strength(struct device *dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span> </span><br><span> static void bh720_init(struct device *dev)</span><br><span> {</span><br><span>@@ -71,6 +54,8 @@</span><br><span> printk(BIOS_INFO, "BayHub BH720: Power-saving enabled (link_ctrl=%#x)\n",</span><br><span> pci_read_config32(dev, BH720_LINK_CTRL));</span><br><span> }</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ bh720_driving_strength(dev);</span><br><span> }</span><br><span> </span><br><span> static struct pci_operations pci_ops = {</span><br><span>diff --git a/src/drivers/generic/bayhub/bh720.h b/src/drivers/generic/bayhub/bh720.h</span><br><span>new file mode 100644</span><br><span>index 0000000..b6fd273</span><br><span>--- /dev/null</span><br><span>+++ b/src/drivers/generic/bayhub/bh720.h</span><br><span>@@ -0,0 +1,47 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * Driver for BayHub Technology BH720 PCI to eMMC 5.0 HS200 bridge</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright 2018 Google LLC.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+enum {</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_PROTECT = 0xd0,</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_PROTECT_LOCK_OFF = 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_PROTECT_LOCK_ON = BIT(0),</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_PROTECT_OFF = 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_PROTECT_ON = BIT(31),</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_LINK_CTRL = 0x90,</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_LINK_CTRL_L0_ENABLE = BIT(0),</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_LINK_CTRL_L1_ENABLE = BIT(1),</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_LINK_CTRL_CLKREQ = BIT(8),</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_MISC2 = 0xf0,</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_MISC2_ASPM_DISABLE = BIT(0),</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_MISC2_APSM_CLKREQ_L1 = BIT(7),</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_MISC2_APSM_PHY_L1 = BIT(10),</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_MISC2_APSM_MORE = BIT(12),</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_MEM_RW_DATA = 0x200,</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_MEM_RW_ADR = 0x204,</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_MEM_ACCESS_EN = 0x208,</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_PCR = 0x304,</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_PCR_DATA_CMD_DRV_MAX = 7,</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_PCR_CLK_DRV_MAX = 7,</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_RTD3_L1 = 0x3e0,</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_RTD3_L1_DISABLE_L1 = BIT(28),</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void bh720_driving_strength(struct device *dev);</span><br><span>diff --git a/src/mainboard/google/kahlee/variants/baseboard/mainboard.c b/src/mainboard/google/kahlee/variants/baseboard/mainboard.c</span><br><span>index 54743ef..cdb26e5 100644</span><br><span>--- a/src/mainboard/google/kahlee/variants/baseboard/mainboard.c</span><br><span>+++ b/src/mainboard/google/kahlee/variants/baseboard/mainboard.c</span><br><span>@@ -17,7 +17,8 @@</span><br><span> #include <baseboard/variants.h></span><br><span> #include <gpio.h></span><br><span> #include <variant/gpio.h></span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(120, 100%, 40%);">+#include <device/pci.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <drivers/generic/bayhub/bh720.h></span><br><span> </span><br><span> uint8_t variant_board_sku(void)</span><br><span> {</span><br><span>@@ -36,3 +37,25 @@</span><br><span> gpio_set(GPIO_133, 0);</span><br><span> }</span><br><span> #endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void bh720_driving_strength(struct device *dev)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 SDBAR;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 BH720_PCR_DATA;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ SDBAR = pci_read_config32(dev, PCI_BASE_ADDRESS_1);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Enable Memory Access Function */</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(SDBAR + BH720_MEM_ACCESS_EN), 0x40000000);</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(SDBAR + BH720_MEM_RW_DATA), 0x80000000);</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(SDBAR + BH720_MEM_RW_ADR), 0x800000D0);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* Read current EMMC 1.8V CLK/DATA,CMD driving strength */</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(SDBAR + BH720_MEM_RW_ADR), 0x40000304);</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_PCR_DATA = read32((void *)(SDBAR + BH720_MEM_RW_DATA));</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ /* set EMMC 1.8V CLK/DATA,CMD the max level */</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(SDBAR + BH720_MEM_RW_DATA),</span><br><span style="color: hsl(120, 100%, 40%);">+ BH720_PCR_DATA | (BH720_PCR_CLK_DRV_MAX << 4) | (BH720_PCR_DATA_CMD_DRV_MAX << 1));</span><br><span style="color: hsl(120, 100%, 40%);">+ write32((void *)(SDBAR + BH720_MEM_RW_ADR), 0x80000304);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27816">change 27816</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I3db38ff12c566c258895c6643008a0472ca528bb </div>
<div style="display:none"> Gerrit-Change-Number: 27816 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Kevin Chiu <Kevin.Chiu@quantatw.com> </div>