<p>Gaggery Tsai has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27788">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">src/mb/google/poppy/variants/atlas: Apply correct AC/DC loadlines<br><br>This patch applies correct AC/DC loadline settings for Atlas from<br>VRTT report.<br><br>BUG=b/111419622<br>BRANCH=None<br>TEST=emerge-atlas coreboot chromeos-bootimage and use DbC to check<br>     the AC/DC loadline settgins.<br><br>Change-Id: I6e85b885a6d3a1db9a980d12f3cfc036a771422a<br>Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com><br>---<br>M src/mainboard/google/poppy/variants/atlas/devicetree.cb<br>1 file changed, 9 insertions(+), 9 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/27788/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/poppy/variants/atlas/devicetree.cb b/src/mainboard/google/poppy/variants/atlas/devicetree.cb</span><br><span>index f6610df..f2c2a12 100644</span><br><span>--- a/src/mainboard/google/poppy/variants/atlas/devicetree.cb</span><br><span>+++ b/src/mainboard/google/poppy/variants/atlas/devicetree.cb</span><br><span>@@ -88,8 +88,8 @@</span><br><span>   #| ImonOffset     | 0     | 0     | 0     | 0     |</span><br><span>  #| IccMax         | 4A    | 24A   | 24A   | 24A   |</span><br><span>  #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |</span><br><span style="color: hsl(0, 100%, 40%);">-     #| AcLoadline     | 14.9  | 5     | 5.7   | 4.57  |</span><br><span style="color: hsl(0, 100%, 40%);">-     #| DcLoadline     | 14.2  | 4.86  | 4.2   | 4.3   |</span><br><span style="color: hsl(120, 100%, 40%);">+   #| AcLoadline     | 14.75 | 4.42  | 4.7   | 4.7   |</span><br><span style="color: hsl(120, 100%, 40%);">+   #| DcLoadline     | 14.2  | 4.2   | 4.41  | 4.41  |</span><br><span>  #+----------------+-------+-------+-------+-------+</span><br><span>  register "domain_vr_config[VR_SYSTEM_AGENT]" = "{</span><br><span>             .vr_config_enable = 1,</span><br><span>@@ -102,7 +102,7 @@</span><br><span>                 .imon_offset = 0x0,</span><br><span>          .icc_max = VR_CFG_AMP(4),</span><br><span>            .voltage_limit = 1520,</span><br><span style="color: hsl(0, 100%, 40%);">-          .ac_loadline = 1490,</span><br><span style="color: hsl(120, 100%, 40%);">+          .ac_loadline = 1475,</span><br><span>                 .dc_loadline = 1420,</span><br><span>         }"</span><br><span> </span><br><span>@@ -117,8 +117,8 @@</span><br><span>            .imon_offset = 0x0,</span><br><span>          .icc_max = VR_CFG_AMP(24),</span><br><span>           .voltage_limit = 1520,</span><br><span style="color: hsl(0, 100%, 40%);">-          .ac_loadline = 500,</span><br><span style="color: hsl(0, 100%, 40%);">-             .dc_loadline = 486,</span><br><span style="color: hsl(120, 100%, 40%);">+           .ac_loadline = 442,</span><br><span style="color: hsl(120, 100%, 40%);">+           .dc_loadline = 420,</span><br><span>  }"</span><br><span> </span><br><span>  register "domain_vr_config[VR_GT_UNSLICED]" = "{</span><br><span>@@ -132,8 +132,8 @@</span><br><span>                .imon_offset = 0x0,</span><br><span>          .icc_max = VR_CFG_AMP(24),</span><br><span>           .voltage_limit = 1520,</span><br><span style="color: hsl(0, 100%, 40%);">-          .ac_loadline = 570,</span><br><span style="color: hsl(0, 100%, 40%);">-             .dc_loadline = 420,</span><br><span style="color: hsl(120, 100%, 40%);">+           .ac_loadline = 470,</span><br><span style="color: hsl(120, 100%, 40%);">+           .dc_loadline = 441,</span><br><span>  }"</span><br><span> </span><br><span>  register "domain_vr_config[VR_GT_SLICED]" = "{</span><br><span>@@ -147,8 +147,8 @@</span><br><span>          .imon_offset = 0x0,</span><br><span>          .icc_max = VR_CFG_AMP(24),</span><br><span>           .voltage_limit = 1520,</span><br><span style="color: hsl(0, 100%, 40%);">-          .ac_loadline = 457,</span><br><span style="color: hsl(0, 100%, 40%);">-             .dc_loadline = 430,</span><br><span style="color: hsl(120, 100%, 40%);">+           .ac_loadline = 470,</span><br><span style="color: hsl(120, 100%, 40%);">+           .dc_loadline = 441,</span><br><span>  }"</span><br><span> </span><br><span>  # PCIe Root port 1 with SRCCLKREQ1#</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27788">change 27788</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27788"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I6e85b885a6d3a1db9a980d12f3cfc036a771422a </div>
<div style="display:none"> Gerrit-Change-Number: 27788 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Gaggery Tsai <gaggery.tsai@intel.com> </div>