<p>Matt DeVillier has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27786">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/google,samsung/*: Add LPC TPM chip driver to devicetree<br><br>With commits 9987534 [southbridge/intel: Remove leftover TPM ACPI code]<br>and 66ce18c [soc/intel: Remove legacy static TPM asl code] removing<br>TPM ASL code from the southbridge's LPCB device, the LPC TPM chip driver<br>(drivers/pc80/tpm) must be added to devicetree in order to ensure the<br>new acpigen code is used to replace it.<br><br>Test: boot various google/samsung boards, verify SSDT created with LPBC.TPM device<br>and TPM visible to and usable by SeaBIOS and Linux<br><br>Change-Id: Iedaa01f26fb357914549bb3dda24b0bd6ef67480<br>Signed-off-by: Matt DeVillier <matt.devillier@gmail.com><br>---<br>M src/mainboard/google/beltino/devicetree.cb<br>M src/mainboard/google/butterfly/devicetree.cb<br>M src/mainboard/google/jecht/devicetree.cb<br>M src/mainboard/google/link/devicetree.cb<br>M src/mainboard/google/rambi/variants/banjo/devicetree.cb<br>M src/mainboard/google/rambi/variants/candy/devicetree.cb<br>M src/mainboard/google/rambi/variants/clapper/devicetree.cb<br>M src/mainboard/google/rambi/variants/enguarde/devicetree.cb<br>M src/mainboard/google/rambi/variants/glimmer/devicetree.cb<br>M src/mainboard/google/rambi/variants/gnawty/devicetree.cb<br>M src/mainboard/google/rambi/variants/heli/devicetree.cb<br>M src/mainboard/google/rambi/variants/kip/devicetree.cb<br>M src/mainboard/google/rambi/variants/ninja/devicetree.cb<br>M src/mainboard/google/rambi/variants/orco/devicetree.cb<br>M src/mainboard/google/rambi/variants/quawks/devicetree.cb<br>M src/mainboard/google/rambi/variants/rambi/devicetree.cb<br>M src/mainboard/google/rambi/variants/squawks/devicetree.cb<br>M src/mainboard/google/rambi/variants/sumo/devicetree.cb<br>M src/mainboard/google/rambi/variants/swanky/devicetree.cb<br>M src/mainboard/google/rambi/variants/winky/devicetree.cb<br>M src/mainboard/google/slippy/variants/falco/devicetree.cb<br>M src/mainboard/google/slippy/variants/leon/devicetree.cb<br>M src/mainboard/google/slippy/variants/peppy/devicetree.cb<br>M src/mainboard/google/slippy/variants/wolf/devicetree.cb<br>M src/mainboard/google/stout/devicetree.cb<br>M src/mainboard/samsung/lumpy/devicetree.cb<br>M src/mainboard/samsung/stumpy/devicetree.cb<br>27 files changed, 81 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/27786/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/beltino/devicetree.cb b/src/mainboard/google/beltino/devicetree.cb</span><br><span>index 90409cd..89758dd 100644</span><br><span>--- a/src/mainboard/google/beltino/devicetree.cb</span><br><span>+++ b/src/mainboard/google/beltino/devicetree.cb</span><br><span>@@ -96,6 +96,9 @@</span><br><span> device pci 1d.0 on end # USB2 EHCI</span><br><span> device pci 1e.0 off end # PCI bridge</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip superio/ite/it8772f</span><br><span> # Skip keyboard init</span><br><span> register "skip_keyboard" = "1"</span><br><span>diff --git a/src/mainboard/google/butterfly/devicetree.cb b/src/mainboard/google/butterfly/devicetree.cb</span><br><span>index 9b44fe8..692414c 100644</span><br><span>--- a/src/mainboard/google/butterfly/devicetree.cb</span><br><span>+++ b/src/mainboard/google/butterfly/devicetree.cb</span><br><span>@@ -87,6 +87,9 @@</span><br><span> device pci 1d.0 on end # USB2 EHCI #1</span><br><span> device pci 1e.0 off end # PCI bridge</span><br><span> device pci 1f.0 on #LPC bridge</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/quanta/ene_kb3940q</span><br><span> # 60/64 KBC</span><br><span> device pnp ff.1 on # dummy address</span><br><span>diff --git a/src/mainboard/google/jecht/devicetree.cb b/src/mainboard/google/jecht/devicetree.cb</span><br><span>index 8a2129f..d34bf7a 100644</span><br><span>--- a/src/mainboard/google/jecht/devicetree.cb</span><br><span>+++ b/src/mainboard/google/jecht/devicetree.cb</span><br><span>@@ -76,6 +76,9 @@</span><br><span> device pci 1d.0 on end # USB2 EHCI</span><br><span> device pci 1e.0 off end # PCI bridge</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip superio/ite/it8772f</span><br><span> # Skip keyboard init</span><br><span> register "skip_keyboard" = "1"</span><br><span>diff --git a/src/mainboard/google/link/devicetree.cb b/src/mainboard/google/link/devicetree.cb</span><br><span>index 437b3cb..07be8e7 100644</span><br><span>--- a/src/mainboard/google/link/devicetree.cb</span><br><span>+++ b/src/mainboard/google/link/devicetree.cb</span><br><span>@@ -86,6 +86,9 @@</span><br><span> device pci 1d.0 on end # USB2 EHCI #1</span><br><span> device pci 1e.0 off end # PCI bridge</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/rambi/variants/banjo/devicetree.cb b/src/mainboard/google/rambi/variants/banjo/devicetree.cb</span><br><span>index e380920..acfb271 100644</span><br><span>--- a/src/mainboard/google/rambi/variants/banjo/devicetree.cb</span><br><span>+++ b/src/mainboard/google/rambi/variants/banjo/devicetree.cb</span><br><span>@@ -88,6 +88,9 @@</span><br><span> device pci 1e.4 off end # HSUART2</span><br><span> device pci 1e.5 off end # SPI</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/rambi/variants/candy/devicetree.cb b/src/mainboard/google/rambi/variants/candy/devicetree.cb</span><br><span>index 5cbb974..e4a39e9 100644</span><br><span>--- a/src/mainboard/google/rambi/variants/candy/devicetree.cb</span><br><span>+++ b/src/mainboard/google/rambi/variants/candy/devicetree.cb</span><br><span>@@ -89,6 +89,9 @@</span><br><span> device pci 1e.4 off end # HSUART2</span><br><span> device pci 1e.5 off end # SPI</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/rambi/variants/clapper/devicetree.cb b/src/mainboard/google/rambi/variants/clapper/devicetree.cb</span><br><span>index 13902b0..497a0b1 100644</span><br><span>--- a/src/mainboard/google/rambi/variants/clapper/devicetree.cb</span><br><span>+++ b/src/mainboard/google/rambi/variants/clapper/devicetree.cb</span><br><span>@@ -76,6 +76,9 @@</span><br><span> device pci 1e.4 off end # HSUART2</span><br><span> device pci 1e.5 off end # SPI</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/rambi/variants/enguarde/devicetree.cb b/src/mainboard/google/rambi/variants/enguarde/devicetree.cb</span><br><span>index 89929b0..3b00bb7 100644</span><br><span>--- a/src/mainboard/google/rambi/variants/enguarde/devicetree.cb</span><br><span>+++ b/src/mainboard/google/rambi/variants/enguarde/devicetree.cb</span><br><span>@@ -88,6 +88,9 @@</span><br><span> device pci 1e.4 off end # HSUART2</span><br><span> device pci 1e.5 off end # SPI</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/rambi/variants/glimmer/devicetree.cb b/src/mainboard/google/rambi/variants/glimmer/devicetree.cb</span><br><span>index 5148225..db26366 100644</span><br><span>--- a/src/mainboard/google/rambi/variants/glimmer/devicetree.cb</span><br><span>+++ b/src/mainboard/google/rambi/variants/glimmer/devicetree.cb</span><br><span>@@ -85,6 +85,9 @@</span><br><span> device pci 1e.4 off end # HSUART2</span><br><span> device pci 1e.5 off end # SPI</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/rambi/variants/gnawty/devicetree.cb b/src/mainboard/google/rambi/variants/gnawty/devicetree.cb</span><br><span>index 0024679..30320cc 100644</span><br><span>--- a/src/mainboard/google/rambi/variants/gnawty/devicetree.cb</span><br><span>+++ b/src/mainboard/google/rambi/variants/gnawty/devicetree.cb</span><br><span>@@ -88,6 +88,9 @@</span><br><span> device pci 1e.4 off end # HSUART2</span><br><span> device pci 1e.5 off end # SPI</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/rambi/variants/heli/devicetree.cb b/src/mainboard/google/rambi/variants/heli/devicetree.cb</span><br><span>index 8b3c83f..c3ec601 100644</span><br><span>--- a/src/mainboard/google/rambi/variants/heli/devicetree.cb</span><br><span>+++ b/src/mainboard/google/rambi/variants/heli/devicetree.cb</span><br><span>@@ -89,6 +89,9 @@</span><br><span> device pci 1e.4 off end # HSUART2</span><br><span> device pci 1e.5 off end # SPI</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/rambi/variants/kip/devicetree.cb b/src/mainboard/google/rambi/variants/kip/devicetree.cb</span><br><span>index d1d6beb..5bb99f0 100644</span><br><span>--- a/src/mainboard/google/rambi/variants/kip/devicetree.cb</span><br><span>+++ b/src/mainboard/google/rambi/variants/kip/devicetree.cb</span><br><span>@@ -88,6 +88,9 @@</span><br><span> device pci 1e.4 off end # HSUART2</span><br><span> device pci 1e.5 off end # SPI</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/rambi/variants/ninja/devicetree.cb b/src/mainboard/google/rambi/variants/ninja/devicetree.cb</span><br><span>index 5c9595c..c983681 100644</span><br><span>--- a/src/mainboard/google/rambi/variants/ninja/devicetree.cb</span><br><span>+++ b/src/mainboard/google/rambi/variants/ninja/devicetree.cb</span><br><span>@@ -89,6 +89,9 @@</span><br><span> device pci 1e.4 off end # HSUART2</span><br><span> device pci 1e.5 off end # SPI</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/rambi/variants/orco/devicetree.cb b/src/mainboard/google/rambi/variants/orco/devicetree.cb</span><br><span>index 8291794..63b6097 100644</span><br><span>--- a/src/mainboard/google/rambi/variants/orco/devicetree.cb</span><br><span>+++ b/src/mainboard/google/rambi/variants/orco/devicetree.cb</span><br><span>@@ -88,6 +88,9 @@</span><br><span> device pci 1e.4 off end # HSUART2</span><br><span> device pci 1e.5 off end # SPI</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/rambi/variants/quawks/devicetree.cb b/src/mainboard/google/rambi/variants/quawks/devicetree.cb</span><br><span>index 320b59b..0e1f789 100644</span><br><span>--- a/src/mainboard/google/rambi/variants/quawks/devicetree.cb</span><br><span>+++ b/src/mainboard/google/rambi/variants/quawks/devicetree.cb</span><br><span>@@ -85,6 +85,9 @@</span><br><span> device pci 1e.4 off end # HSUART2</span><br><span> device pci 1e.5 off end # SPI</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/rambi/variants/rambi/devicetree.cb b/src/mainboard/google/rambi/variants/rambi/devicetree.cb</span><br><span>index ddd1914..a24bd33 100644</span><br><span>--- a/src/mainboard/google/rambi/variants/rambi/devicetree.cb</span><br><span>+++ b/src/mainboard/google/rambi/variants/rambi/devicetree.cb</span><br><span>@@ -89,6 +89,9 @@</span><br><span> device pci 1e.4 off end # HSUART2</span><br><span> device pci 1e.5 off end # SPI</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/rambi/variants/squawks/devicetree.cb b/src/mainboard/google/rambi/variants/squawks/devicetree.cb</span><br><span>index 46f2385..ae4bfe5 100644</span><br><span>--- a/src/mainboard/google/rambi/variants/squawks/devicetree.cb</span><br><span>+++ b/src/mainboard/google/rambi/variants/squawks/devicetree.cb</span><br><span>@@ -85,6 +85,9 @@</span><br><span> device pci 1e.4 off end # HSUART2</span><br><span> device pci 1e.5 off end # SPI</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/rambi/variants/sumo/devicetree.cb b/src/mainboard/google/rambi/variants/sumo/devicetree.cb</span><br><span>index 89e2f2b..f354815 100644</span><br><span>--- a/src/mainboard/google/rambi/variants/sumo/devicetree.cb</span><br><span>+++ b/src/mainboard/google/rambi/variants/sumo/devicetree.cb</span><br><span>@@ -89,6 +89,9 @@</span><br><span> device pci 1e.4 off end # HSUART2</span><br><span> device pci 1e.5 off end # SPI</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/rambi/variants/swanky/devicetree.cb b/src/mainboard/google/rambi/variants/swanky/devicetree.cb</span><br><span>index db21bd6..d591e3f 100644</span><br><span>--- a/src/mainboard/google/rambi/variants/swanky/devicetree.cb</span><br><span>+++ b/src/mainboard/google/rambi/variants/swanky/devicetree.cb</span><br><span>@@ -88,6 +88,9 @@</span><br><span> device pci 1e.4 off end # HSUART2</span><br><span> device pci 1e.5 off end # SPI</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/rambi/variants/winky/devicetree.cb b/src/mainboard/google/rambi/variants/winky/devicetree.cb</span><br><span>index 6d52b89..9c25d1e 100644</span><br><span>--- a/src/mainboard/google/rambi/variants/winky/devicetree.cb</span><br><span>+++ b/src/mainboard/google/rambi/variants/winky/devicetree.cb</span><br><span>@@ -89,6 +89,9 @@</span><br><span> device pci 1e.4 off end # HSUART2</span><br><span> device pci 1e.5 off end # SPI</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/slippy/variants/falco/devicetree.cb b/src/mainboard/google/slippy/variants/falco/devicetree.cb</span><br><span>index cdf47cf..f2a9520 100644</span><br><span>--- a/src/mainboard/google/slippy/variants/falco/devicetree.cb</span><br><span>+++ b/src/mainboard/google/slippy/variants/falco/devicetree.cb</span><br><span>@@ -109,6 +109,9 @@</span><br><span> device pci 1d.0 on end # USB2 EHCI</span><br><span> device pci 1e.0 off end # PCI bridge</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/slippy/variants/leon/devicetree.cb b/src/mainboard/google/slippy/variants/leon/devicetree.cb</span><br><span>index b0edb7f..8951e99 100644</span><br><span>--- a/src/mainboard/google/slippy/variants/leon/devicetree.cb</span><br><span>+++ b/src/mainboard/google/slippy/variants/leon/devicetree.cb</span><br><span>@@ -114,6 +114,9 @@</span><br><span> device pci 1d.0 on end # USB2 EHCI</span><br><span> device pci 1e.0 off end # PCI bridge</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/slippy/variants/peppy/devicetree.cb b/src/mainboard/google/slippy/variants/peppy/devicetree.cb</span><br><span>index e9875a6..6451d95 100644</span><br><span>--- a/src/mainboard/google/slippy/variants/peppy/devicetree.cb</span><br><span>+++ b/src/mainboard/google/slippy/variants/peppy/devicetree.cb</span><br><span>@@ -113,6 +113,9 @@</span><br><span> device pci 1d.0 on end # USB2 EHCI</span><br><span> device pci 1e.0 off end # PCI bridge</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/slippy/variants/wolf/devicetree.cb b/src/mainboard/google/slippy/variants/wolf/devicetree.cb</span><br><span>index 7655c41..2cad23b 100644</span><br><span>--- a/src/mainboard/google/slippy/variants/wolf/devicetree.cb</span><br><span>+++ b/src/mainboard/google/slippy/variants/wolf/devicetree.cb</span><br><span>@@ -114,6 +114,9 @@</span><br><span> device pci 1d.0 on end # USB2 EHCI</span><br><span> device pci 1e.0 off end # PCI bridge</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/google/chromeec</span><br><span> # We only have one init function that</span><br><span> # we need to call to initialize the</span><br><span>diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb</span><br><span>index 76f2856..0fdb55e 100644</span><br><span>--- a/src/mainboard/google/stout/devicetree.cb</span><br><span>+++ b/src/mainboard/google/stout/devicetree.cb</span><br><span>@@ -97,6 +97,9 @@</span><br><span> device pci 1d.0 on end # USB2 EHCI #1 (Camera, WLAN, WWAN)</span><br><span> device pci 1e.0 off end # PCI bridge</span><br><span> device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> chip ec/quanta/it8518</span><br><span> # 60h/64h KBC</span><br><span> device pnp ff.1 on # dummy address</span><br><span>diff --git a/src/mainboard/samsung/lumpy/devicetree.cb b/src/mainboard/samsung/lumpy/devicetree.cb</span><br><span>index 0dd3228..0362b2c 100644</span><br><span>--- a/src/mainboard/samsung/lumpy/devicetree.cb</span><br><span>+++ b/src/mainboard/samsung/lumpy/devicetree.cb</span><br><span>@@ -119,6 +119,9 @@</span><br><span> register "base" = "(void *)0xfec00000"</span><br><span> device ioapic 4 on end</span><br><span> end</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> end</span><br><span> device pci 1f.2 on # SATA Controller 1</span><br><span> ioapic_irq 4 INTA 0x10</span><br><span>diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb</span><br><span>index adc15e6..825dfa0 100644</span><br><span>--- a/src/mainboard/samsung/stumpy/devicetree.cb</span><br><span>+++ b/src/mainboard/samsung/stumpy/devicetree.cb</span><br><span>@@ -116,6 +116,9 @@</span><br><span> end # Mouse</span><br><span> device pnp 2e.a off end # IR</span><br><span> end</span><br><span style="color: hsl(120, 100%, 40%);">+ chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+ device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+ end</span><br><span> end</span><br><span> device pci 1f.2 on end # SATA Controller 1</span><br><span> device pci 1f.3 on end # SMBus</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27786">change 27786</a>. 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<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Iedaa01f26fb357914549bb3dda24b0bd6ef67480 </div>
<div style="display:none"> Gerrit-Change-Number: 27786 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Matt DeVillier <matt.devillier@gmail.com> </div>