<p>Felix Held has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27750">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">sandybridge/raminit_common: use macro for execute command queue register<br><br>This patch doesn't change the hash of a timeless build.<br><br>Change-Id: I5d329f65be0eee741fd330c0926881ff4f956624<br>Signed-off-by: Felix Held <felix-coreboot@felixheld.de><br>---<br>M src/northbridge/intel/sandybridge/raminit_common.c<br>1 file changed, 78 insertions(+), 33 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/27750/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c</span><br><span>index 4de83fb..ca135b4 100644</span><br><span>--- a/src/northbridge/intel/sandybridge/raminit_common.c</span><br><span>+++ b/src/northbridge/intel/sandybridge/raminit_common.c</span><br><span>@@ -62,9 +62,11 @@</span><br><span>  * DEFAULT_MCHBAR + 0x4284 + 0x400 * channel: execute command queue</span><br><span>  *  Starts to execute all queued commands</span><br><span>  *  Bit 0    : start DRAM command execution</span><br><span style="color: hsl(0, 100%, 40%);">- *  Bit 16-20: (number of queued commands - 1) * 4</span><br><span style="color: hsl(120, 100%, 40%);">+ *  Bit 18-19 : number of queued commands - 1</span><br><span>  */</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+#define RUN_QUEUE_4284(x)     ((((x) - 1) << 18) | 1)   // 0 <= x < 4</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> static void sfence(void)</span><br><span> {</span><br><span>       asm volatile ("sfence");</span><br><span>@@ -643,12 +645,12 @@</span><br><span>   /* DRAM command ZQCS */</span><br><span>      MCHBAR32(0x4220 + 0x400 * channel) = 0x0f003;</span><br><span>        MCHBAR32(0x4230 + 0x400 * channel) = 0x80c01;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span>        MCHBAR32(0x4200 + 0x400 * channel) = (slotrank << 24) | 0x60000;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span>       MCHBAR32(0x4210 + 0x400 * channel) = 0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-     MCHBAR32(0x4284 + 0x400 * channel) = 0x400001;</span><br><span style="color: hsl(120, 100%, 40%);">+        // execute command queue - why is bit 22 set here?!</span><br><span style="color: hsl(120, 100%, 40%);">+   MCHBAR32(0x4284 + 0x400 * channel) = (1 << 22) | RUN_QUEUE_4284(1);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>  wait_428c(channel);</span><br><span> }</span><br><span> </span><br><span>@@ -754,7 +756,9 @@</span><br><span>   MCHBAR32(0x4208 + 0x400 * channel) =</span><br><span>                 (slotrank << 24) | (reg << 20) | val | 0x60000;</span><br><span>  MCHBAR32(0x4218 + 0x400 * channel) = 0;</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x4284 + 0x400 * channel) = 0x80001;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+       // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+      MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(3);</span><br><span> }</span><br><span> </span><br><span> static u32 make_mr0(ramctr_timing * ctrl, u8 rank)</span><br><span>@@ -920,7 +924,9 @@</span><br><span>                 MCHBAR32(0x4200 + 0x400 * channel) =</span><br><span>                         (slotrank << 24) | 0x60000;</span><br><span>            MCHBAR32(0x4210 + 0x400 * channel) = 0x3e0;</span><br><span style="color: hsl(0, 100%, 40%);">-             MCHBAR32(0x4284 + 0x400 * channel) = 0x1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+           // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+              MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(1);</span><br><span> </span><br><span>          // Drain</span><br><span>             wait_428c(channel);</span><br><span>@@ -1109,7 +1115,8 @@</span><br><span>  MCHBAR32(0x420c + 0x400 * channel) = (slotrank << 24) | 0x360000;</span><br><span>      MCHBAR32(0x421c + 0x400 * channel) = 0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-     MCHBAR32(0x4284 + 0x400 * channel) = 0xc0001;</span><br><span style="color: hsl(120, 100%, 40%);">+ // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+      MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(4);</span><br><span> </span><br><span>  wait_428c(channel);</span><br><span> }</span><br><span>@@ -1368,7 +1375,9 @@</span><br><span>             MCHBAR32(0x4230 + 0x400 * channel) = 0xc01 | (ctrl->tRP << 16);</span><br><span>             MCHBAR32(0x4200 + 0x400 * channel) = (slotrank << 24) | 0x60400;</span><br><span>               MCHBAR32(0x4210 + 0x400 * channel) = 0;</span><br><span style="color: hsl(0, 100%, 40%);">-         MCHBAR32(0x4284 + 0x400 * channel) = 1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+             // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+              MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(1);</span><br><span> </span><br><span>          MCHBAR32(0x3400) = (slotrank << 2) | 0x8001;</span><br><span> </span><br><span>@@ -1493,7 +1502,8 @@</span><br><span>       MCHBAR32(0x420c + 0x400 * channel) = (slotrank << 24) | 8;</span><br><span>     MCHBAR32(0x421c + 0x400 * channel) = 0x3e0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x4284 + 0x400 * channel) = 0xc0001;</span><br><span style="color: hsl(120, 100%, 40%);">+ // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+      MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(4);</span><br><span> </span><br><span>  wait_428c(channel);</span><br><span> </span><br><span>@@ -1525,7 +1535,10 @@</span><br><span>     MCHBAR32(0x423c + 0x400 * channel) = 0xc01 | (ctrl->tRP << 16);</span><br><span>     MCHBAR32(0x420c + 0x400 * channel) = (slotrank << 24) | 0x60400;</span><br><span>       MCHBAR32(0x421c + 0x400 * channel) = 0x240;</span><br><span style="color: hsl(0, 100%, 40%);">-     MCHBAR32(0x4284 + 0x400 * channel) = 0xc0001;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+       // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+      MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(4);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>    wait_428c(channel);</span><br><span> }</span><br><span> </span><br><span>@@ -1542,7 +1555,9 @@</span><br><span>         MCHBAR32(0x4230 + 0x400 * channel) = 0xc01 | (ctrl->tRP << 16);</span><br><span>     MCHBAR32(0x4200 + 0x400 * channel) =  (slotrank << 24) | 0x60400;</span><br><span>      MCHBAR32(0x4210 + 0x400 * channel) = 0x240;</span><br><span style="color: hsl(0, 100%, 40%);">-     MCHBAR32(0x4284 + 0x400 * channel) = 1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+     // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+      MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(1);</span><br><span> </span><br><span>  for (timC = 0; timC <= MAX_TIMC; timC++) {</span><br><span>                FOR_ALL_LANES ctrl->timings[channel][slotrank].lanes[lane].</span><br><span>@@ -1661,7 +1676,9 @@</span><br><span>                       MCHBAR32(0x420c + 0x400 * channel) =</span><br><span>                                 (slotrank << 24) | 0x360000;</span><br><span>                   MCHBAR32(0x421c + 0x400 * channel) = 0;</span><br><span style="color: hsl(0, 100%, 40%);">-                 MCHBAR32(0x4284 + 0x400 * channel) = 0xc0001;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+                       // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+                      MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(4);</span><br><span> </span><br><span>                  wait_428c(channel);</span><br><span>          }</span><br><span>@@ -1713,7 +1730,9 @@</span><br><span>                            (slotrank << 24) | 0x360000;</span><br><span>                   MCHBAR32(0x421c + 0x400 * channel) = 0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-                     MCHBAR32(0x4284 + 0x400 * channel) = 0xc0001;</span><br><span style="color: hsl(120, 100%, 40%);">+                 // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+                      MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(4);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>                    wait_428c(channel);</span><br><span>          }</span><br><span>    }</span><br><span>@@ -1740,7 +1759,9 @@</span><br><span>    MCHBAR32(0x4204 + 0x400 * channel) = (slotrank << 24) | 4;</span><br><span>     MCHBAR32(0x4214 + 0x400 * channel) = 0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-     MCHBAR32(0x400 * channel + 0x4284) = 0x40001;</span><br><span style="color: hsl(120, 100%, 40%);">+ // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+      MCHBAR32(0x400 * channel + 0x4284) = RUN_QUEUE_4284(2);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>    wait_428c(channel);</span><br><span> </span><br><span>      /* disable DQs on this slotrank */</span><br><span>@@ -1859,7 +1880,8 @@</span><br><span>           MCHBAR32(0x420c + 0x400 * channel) = (slotrank << 24) | 0x8;</span><br><span>           MCHBAR32(0x421c + 0x400 * channel) = 0x3e0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-         MCHBAR32(0x4284 + 0x400 * channel) = 0xc0001;</span><br><span style="color: hsl(120, 100%, 40%);">+         // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+              MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(4);</span><br><span> </span><br><span>          wait_428c(channel);</span><br><span> </span><br><span>@@ -1886,7 +1908,9 @@</span><br><span>              MCHBAR32(0x4208 + 0x400 * channel) = (slotrank << 24) | 0x60008;</span><br><span>               MCHBAR32(0x4218 + 0x400 * channel) = 0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-             MCHBAR32(0x4284 + 0x400 * channel) = 0x80001;</span><br><span style="color: hsl(120, 100%, 40%);">+         // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+              MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(3);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>            wait_428c(channel);</span><br><span>          FOR_ALL_LANES {</span><br><span>                      u64 res = MCHBAR32(lane_registers[lane] +</span><br><span>@@ -1919,12 +1943,12 @@</span><br><span>  /* DRAM command ACT */</span><br><span>       MCHBAR32(0x4220 + 0x400 * channel) = 0x0f003;</span><br><span>        MCHBAR32(0x4230 + 0x400 * channel) = 0x41001;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span>        MCHBAR32(0x4200 + 0x400 * channel) = (slotrank << 24) | 0x60000;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span>       MCHBAR32(0x4210 + 0x400 * channel) = 0x3e0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x4284 + 0x400 * channel) = 1;</span><br><span style="color: hsl(120, 100%, 40%);">+       // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+      MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(1);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>    wait_428c(channel);</span><br><span> }</span><br><span> </span><br><span>@@ -2003,7 +2027,9 @@</span><br><span>                 MCHBAR32(0x4200 + 0x400 * channel) = 0x60000;</span><br><span>                MCHBAR32(0x4210 + 0x400 * channel) = 0x3e0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-         MCHBAR32(0x4284 + 0x400 * channel) = 1;</span><br><span style="color: hsl(120, 100%, 40%);">+               // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+              MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(1);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>            wait_428c(channel);</span><br><span>  }</span><br><span> </span><br><span>@@ -2096,7 +2122,9 @@</span><br><span>                MCHBAR32(0x420c + 0x400 * channel) = (slotrank << 24) | 0x60400;</span><br><span>               MCHBAR32(0x421c + 0x400 * channel) = 0x240;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-         MCHBAR32(0x4284 + 0x400 * channel) = 0xc0001;</span><br><span style="color: hsl(120, 100%, 40%);">+         // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+              MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(4);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>            wait_428c(channel);</span><br><span>          FOR_ALL_LANES {</span><br><span>                      u32 r32 = MCHBAR32(0x4340 + 4 * lane + 0x400 * channel);</span><br><span>@@ -2159,12 +2187,12 @@</span><br><span>           /* DRAM command ZQCS */</span><br><span>              MCHBAR32(0x4220 + 0x400 * channel) = 0x0f003;</span><br><span>                MCHBAR32(0x4230 + 0x400 * channel) = 0x41001;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span>                MCHBAR32(0x4200 + 0x400 * channel) = (slotrank << 24) | 0x60000;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span>               MCHBAR32(0x4210 + 0x400 * channel) = 0x3e0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-         MCHBAR32(0x4284 + 0x400 * channel) = 1;</span><br><span style="color: hsl(120, 100%, 40%);">+               // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+              MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(1);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>            wait_428c(channel);</span><br><span>          MCHBAR32_OR(0x4020 + 0x400 * channel, 0x200000);</span><br><span>     }</span><br><span>@@ -2180,12 +2208,12 @@</span><br><span>          /* DRAM command ZQCS */</span><br><span>              MCHBAR32(0x4220 + 0x400 * channel) = 0x0f003;</span><br><span>                MCHBAR32(0x4230 + 0x400 * channel) = 0x41001;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span>                MCHBAR32(0x4200 + 0x400 * channel) = (slotrank << 24) | 0x60000;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span>               MCHBAR32(0x4210 + 0x400 * channel) = 0x3e0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-         MCHBAR32(0x4284 + 0x400 * channel) = 1;</span><br><span style="color: hsl(120, 100%, 40%);">+               // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+              MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(1);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>            wait_428c(channel);</span><br><span>  }</span><br><span> </span><br><span>@@ -2373,7 +2401,8 @@</span><br><span>                        (slotrank << 24) | 0x360000;</span><br><span>           MCHBAR32(0x421c + 0x400 * channel) = 0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-             MCHBAR32(0x4284 + 0x400 * channel) = 0xc0001;</span><br><span style="color: hsl(120, 100%, 40%);">+         // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+              MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(4);</span><br><span> </span><br><span>          wait_428c(channel);</span><br><span> </span><br><span>@@ -2467,7 +2496,9 @@</span><br><span>                      MCHBAR32(0x420c + 0x400 * channel) =</span><br><span>                                 (slotrank << 24) | 0x360000;</span><br><span>                   MCHBAR32(0x421c + 0x400 * channel) = 0;</span><br><span style="color: hsl(0, 100%, 40%);">-                 MCHBAR32(0x4284 + 0x400 * channel) = 0xc0001;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+                       // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+                      MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(4);</span><br><span> </span><br><span>                  wait_428c(channel);</span><br><span>          }</span><br><span>@@ -2522,7 +2553,9 @@</span><br><span>                            (slotrank << 24) | 0x360000;</span><br><span>                   MCHBAR32(0x421c + 0x400 * channel) = 0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-                     MCHBAR32(0x4284 + 0x400 * channel) = 0xc0001;</span><br><span style="color: hsl(120, 100%, 40%);">+                 // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+                      MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(4);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>                    wait_428c(channel);</span><br><span>          }</span><br><span> </span><br><span>@@ -2655,7 +2688,10 @@</span><br><span>                                       (slotrank << 24) | 0x60400;</span><br><span>                            MCHBAR32(0x421c + 0x400 * channel) = 0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-                             MCHBAR32(0x4284 + 0x400 * channel) = 0xc0001;</span><br><span style="color: hsl(120, 100%, 40%);">+                         // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+                              MCHBAR32(0x4284 + 0x400 * channel) =</span><br><span style="color: hsl(120, 100%, 40%);">+                                  RUN_QUEUE_4284(4);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>                                 wait_428c(channel);</span><br><span>                          FOR_ALL_LANES {</span><br><span>                                      volatile u32 tmp;</span><br><span>@@ -2774,7 +2810,9 @@</span><br><span>    MCHBAR32(0x420c + 0x400 * channel) = (slotrank << 24) | 0x60400;</span><br><span>       MCHBAR32(0x421c + 0x400 * channel) = 0;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-     MCHBAR32(0x4284 + 0x400 * channel) = 0xc0001;</span><br><span style="color: hsl(120, 100%, 40%);">+ // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+      MCHBAR32(0x4284 + 0x400 * channel) = RUN_QUEUE_4284(4);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>    wait_428c(channel);</span><br><span> }</span><br><span> </span><br><span>@@ -2940,31 +2978,38 @@</span><br><span>                       MCHBAR32(0x4d40 + 4 * lane) = 0;</span><br><span>             }</span><br><span>            wait_428c(channel);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>                /* DRAM command ACT */</span><br><span>               MCHBAR32(0x4220 + (channel << 10)) = 0x0001f006;</span><br><span>               MCHBAR32(0x4230 + (channel << 10)) = 0x0028a004;</span><br><span>               MCHBAR32(0x4200 + (channel << 10)) =</span><br><span>                   0x00060000 | (slotrank << 24);</span><br><span>                 MCHBAR32(0x4210 + (channel << 10)) = 0x00000244;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>             /* DRAM command WR */</span><br><span>                MCHBAR32(0x4224 + (channel << 10)) = 0x0001f201;</span><br><span>               MCHBAR32(0x4234 + (channel << 10)) = 0x08281064;</span><br><span>               MCHBAR32(0x4204 + (channel << 10)) =</span><br><span>                   0x00000000 | (slotrank << 24);</span><br><span>                 MCHBAR32(0x4214 + (channel << 10)) = 0x00000242;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>             /* DRAM command RD */</span><br><span>                MCHBAR32(0x4228 + (channel << 10)) = 0x0001f105;</span><br><span>               MCHBAR32(0x4238 + (channel << 10)) = 0x04281064;</span><br><span>               MCHBAR32(0x4208 + (channel << 10)) =</span><br><span>                   0x00000000 | (slotrank << 24);</span><br><span>                 MCHBAR32(0x4218 + (channel << 10)) = 0x00000242;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>             /* DRAM command PRE */</span><br><span>               MCHBAR32(0x422c + (channel << 10)) = 0x0001f002;</span><br><span>               MCHBAR32(0x423c + (channel << 10)) = 0x00280c01;</span><br><span>               MCHBAR32(0x420c + (channel << 10)) =</span><br><span>                   0x00060400 | (slotrank << 24);</span><br><span>                 MCHBAR32(0x421c + (channel << 10)) = 0x00000240;</span><br><span style="color: hsl(0, 100%, 40%);">-          MCHBAR32(0x4284 + (channel << 10)) = 0x000c0001;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+              // execute command queue</span><br><span style="color: hsl(120, 100%, 40%);">+              MCHBAR32(0x4284 + (channel << 10)) = RUN_QUEUE_4284(4);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span>              wait_428c(channel);</span><br><span>          FOR_ALL_LANES</span><br><span>                        if (MCHBAR32(0x4340 + (channel << 10) + 4 * lane)) {</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27750">change 27750</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27750"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I5d329f65be0eee741fd330c0926881ff4f956624 </div>
<div style="display:none"> Gerrit-Change-Number: 27750 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Felix Held <felix-coreboot@felixheld.de> </div>