<p>Philipp Deppenwiese <strong>merged</strong> this change.</p><p><a href="https://review.coreboot.org/25084">View Change</a></p><div style="white-space:pre-wrap">Approvals:
  build bot (Jenkins): Verified
  Patrick Rudolph: Looks good to me, approved
  Arthur Heymans: Looks good to me, approved

</div><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mainboard/opencellular/rotundu: Add FMAP support<br><br>* Add 8M and 16M fmap configurations.<br>* Fix kconfig selects.<br>* Add vboot options and fixes<br><br>Change-Id: I49d97a9d324207e45520d43b814b03a20005122a<br>Signed-off-by: zaolin <zaolin@das-labor.org><br>Reviewed-on: https://review.coreboot.org/25084<br>Reviewed-by: Patrick Rudolph <siro@das-labor.org><br>Reviewed-by: Arthur Heymans <arthur@aheymans.xyz><br>Tested-by: build bot (Jenkins) <no-reply@coreboot.org><br>---<br>M src/mainboard/opencellular/rotundu/Kconfig<br>A src/mainboard/opencellular/rotundu/vboot-16M.fmd<br>A src/mainboard/opencellular/rotundu/vboot-8M.fmd<br>3 files changed, 84 insertions(+), 4 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/opencellular/rotundu/Kconfig b/src/mainboard/opencellular/rotundu/Kconfig</span><br><span>index a062a7a..edacf0d 100644</span><br><span>--- a/src/mainboard/opencellular/rotundu/Kconfig</span><br><span>+++ b/src/mainboard/opencellular/rotundu/Kconfig</span><br><span>@@ -18,7 +18,7 @@</span><br><span> config BOARD_OPENCELLULAR_BASEBOARD_ROTUNDU</span><br><span>   def_bool n</span><br><span>   select SOC_INTEL_FSP_BAYTRAIL</span><br><span style="color: hsl(0, 100%, 40%);">-   select BOARD_ROMSIZE_KB_16384</span><br><span style="color: hsl(120, 100%, 40%);">+ select BOARD_ROMSIZE_KB_8192</span><br><span>         select HAVE_ACPI_TABLES</span><br><span>      select HAVE_OPTION_TABLE</span><br><span>     select ENABLE_BUILTIN_COM1</span><br><span>@@ -32,6 +32,21 @@</span><br><span> </span><br><span> if BOARD_OPENCELLULAR_BASEBOARD_ROTUNDU</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+config VBOOT</span><br><span style="color: hsl(120, 100%, 40%);">+      select MRC_CACHE_FMAP</span><br><span style="color: hsl(120, 100%, 40%);">+ select VBOOT_VBNV_CMOS</span><br><span style="color: hsl(120, 100%, 40%);">+        select VBOOT_NO_BOARD_SUPPORT</span><br><span style="color: hsl(120, 100%, 40%);">+ select GBB_FLAG_DISABLE_LID_SHUTDOWN</span><br><span style="color: hsl(120, 100%, 40%);">+  select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC</span><br><span style="color: hsl(120, 100%, 40%);">+      select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC</span><br><span style="color: hsl(120, 100%, 40%);">+      select GBB_FLAG_DISABLE_FWMP</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config GBB_HWID</span><br><span style="color: hsl(120, 100%, 40%);">+       string</span><br><span style="color: hsl(120, 100%, 40%);">+        depends on VBOOT</span><br><span style="color: hsl(120, 100%, 40%);">+      default "ROTUNDU" if BOARD_OPENCELLULAR_ROTUNDU</span><br><span style="color: hsl(120, 100%, 40%);">+     default "SUPABRCKV1" if BOARD_OPENCELLULAR_SUPABRCKV1</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> config VARIANT_DIR</span><br><span>      string</span><br><span>       default "rotundu" if BOARD_OPENCELLULAR_ROTUNDU</span><br><span>@@ -67,11 +82,16 @@</span><br><span>      hex</span><br><span>  default 0xfffb0000</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-# FIXME: Slow boot performance when increasing CBFS_SIZE beyond 8MB?</span><br><span style="color: hsl(120, 100%, 40%);">+config FMDFILE</span><br><span style="color: hsl(120, 100%, 40%);">+    string</span><br><span style="color: hsl(120, 100%, 40%);">+        depends on VBOOT</span><br><span style="color: hsl(120, 100%, 40%);">+      default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot-8M.fmd" if BOARD_ROMSIZE_KB_8192</span><br><span style="color: hsl(120, 100%, 40%);">+       default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot-16M.fmd" if BOARD_ROMSIZE_KB_16384</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> config CBFS_SIZE</span><br><span>      hex</span><br><span style="color: hsl(0, 100%, 40%);">-     default 0x00200000 if BOARD_ROMSIZE_KB_8192</span><br><span style="color: hsl(0, 100%, 40%);">-     default 0x00800000</span><br><span style="color: hsl(120, 100%, 40%);">+    default 0x00140000 if BOARD_ROMSIZE_KB_8192</span><br><span style="color: hsl(120, 100%, 40%);">+   default 0x003effc0 if BOARD_ROMSIZE_KB_16384</span><br><span> </span><br><span> config VIRTUAL_ROM_SIZE</span><br><span>  hex</span><br><span>diff --git a/src/mainboard/opencellular/rotundu/vboot-16M.fmd b/src/mainboard/opencellular/rotundu/vboot-16M.fmd</span><br><span>new file mode 100644</span><br><span>index 0000000..ec078e5</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/opencellular/rotundu/vboot-16M.fmd</span><br><span>@@ -0,0 +1,30 @@</span><br><span style="color: hsl(120, 100%, 40%);">+FLASH 16M {</span><br><span style="color: hsl(120, 100%, 40%);">+       SI_ALL@0x0 0x300000 {</span><br><span style="color: hsl(120, 100%, 40%);">+         SI_DESC@0x0 0x1000</span><br><span style="color: hsl(120, 100%, 40%);">+            SI_ME@0x1000 0x2ff000</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+     SI_BIOS@0x300000 0xd00000 {</span><br><span style="color: hsl(120, 100%, 40%);">+           RW_SECTION_B@0x0 0x400000 {</span><br><span style="color: hsl(120, 100%, 40%);">+                   VBLOCK_B@0x0 0x10000</span><br><span style="color: hsl(120, 100%, 40%);">+                  FW_MAIN_B(CBFS)@0x10000 0x3effc0</span><br><span style="color: hsl(120, 100%, 40%);">+                      RW_FWID_B@0x3fffc0 0x40</span><br><span style="color: hsl(120, 100%, 40%);">+               }</span><br><span style="color: hsl(120, 100%, 40%);">+             RW_SECTION_A@0x400000 0x400000 {</span><br><span style="color: hsl(120, 100%, 40%);">+                      VBLOCK_A@0x0 0x10000</span><br><span style="color: hsl(120, 100%, 40%);">+                  FW_MAIN_A(CBFS)@0x10000 0x3effc0</span><br><span style="color: hsl(120, 100%, 40%);">+                      RW_FWID_A@0x3fffc0 0x40</span><br><span style="color: hsl(120, 100%, 40%);">+               }</span><br><span style="color: hsl(120, 100%, 40%);">+             RW_MRC_CACHE@0x800000 0x10000</span><br><span style="color: hsl(120, 100%, 40%);">+         RW_VPD@0x810000 0x2000</span><br><span style="color: hsl(120, 100%, 40%);">+                WP_RO@0x812000 0x4ee000 {</span><br><span style="color: hsl(120, 100%, 40%);">+                     RO_VPD@0x0 0x4000</span><br><span style="color: hsl(120, 100%, 40%);">+                     RO_SECTION@0x4000 0x4ea000 {</span><br><span style="color: hsl(120, 100%, 40%);">+                          FMAP@0x0 0x800</span><br><span style="color: hsl(120, 100%, 40%);">+                                RO_FRID@0x800 0x40</span><br><span style="color: hsl(120, 100%, 40%);">+                            RO_FRID_PAD@0x840 0x7c0</span><br><span style="color: hsl(120, 100%, 40%);">+                               GBB@0x1000 0xef000</span><br><span style="color: hsl(120, 100%, 40%);">+                            COREBOOT(CBFS)@0xf0000 0x3fa000</span><br><span style="color: hsl(120, 100%, 40%);">+                       }</span><br><span style="color: hsl(120, 100%, 40%);">+             }</span><br><span style="color: hsl(120, 100%, 40%);">+     }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/mainboard/opencellular/rotundu/vboot-8M.fmd b/src/mainboard/opencellular/rotundu/vboot-8M.fmd</span><br><span>new file mode 100644</span><br><span>index 0000000..623f86a</span><br><span>--- /dev/null</span><br><span>+++ b/src/mainboard/opencellular/rotundu/vboot-8M.fmd</span><br><span>@@ -0,0 +1,30 @@</span><br><span style="color: hsl(120, 100%, 40%);">+FLASH 8M {</span><br><span style="color: hsl(120, 100%, 40%);">+  SI_ALL@0x0 0x300000 {</span><br><span style="color: hsl(120, 100%, 40%);">+         SI_DESC@0x0 0x1000</span><br><span style="color: hsl(120, 100%, 40%);">+            SI_ME@0x1000 0x2ff000</span><br><span style="color: hsl(120, 100%, 40%);">+ }</span><br><span style="color: hsl(120, 100%, 40%);">+     SI_BIOS@0x300000 0x500000 {</span><br><span style="color: hsl(120, 100%, 40%);">+           RW_SECTION_B@0x0 0x150040 {</span><br><span style="color: hsl(120, 100%, 40%);">+                   VBLOCK_B@0x0 0x10000</span><br><span style="color: hsl(120, 100%, 40%);">+                  FW_MAIN_B(CBFS)@0x10000 0x140000</span><br><span style="color: hsl(120, 100%, 40%);">+                      RW_FWID_B@0x150000 0x40</span><br><span style="color: hsl(120, 100%, 40%);">+               }</span><br><span style="color: hsl(120, 100%, 40%);">+             RW_SECTION_A@0x150040 0x150040 {</span><br><span style="color: hsl(120, 100%, 40%);">+                      VBLOCK_A@0x0 0x10000</span><br><span style="color: hsl(120, 100%, 40%);">+                  FW_MAIN_A(CBFS)@0x10000 0x140000</span><br><span style="color: hsl(120, 100%, 40%);">+                      RW_FWID_A@0x150000 0x40</span><br><span style="color: hsl(120, 100%, 40%);">+               }</span><br><span style="color: hsl(120, 100%, 40%);">+             RW_MRC_CACHE@0x2a0080 0x10000</span><br><span style="color: hsl(120, 100%, 40%);">+         RW_VPD@0x2b0080 0x2000</span><br><span style="color: hsl(120, 100%, 40%);">+                WP_RO@0x2b2080 0x24df80 {</span><br><span style="color: hsl(120, 100%, 40%);">+                     RO_VPD@0x0 0x4000</span><br><span style="color: hsl(120, 100%, 40%);">+                     RO_SECTION@0x4000 0x249f80 {</span><br><span style="color: hsl(120, 100%, 40%);">+                          FMAP@0x0 0x800</span><br><span style="color: hsl(120, 100%, 40%);">+                                RO_FRID@0x800 0x40</span><br><span style="color: hsl(120, 100%, 40%);">+                            RO_FRID_PAD@0x840 0x7c0</span><br><span style="color: hsl(120, 100%, 40%);">+                               GBB@0x1000 0xef000</span><br><span style="color: hsl(120, 100%, 40%);">+                            COREBOOT(CBFS)@0xf0000 0x159f80</span><br><span style="color: hsl(120, 100%, 40%);">+                       }</span><br><span style="color: hsl(120, 100%, 40%);">+             }</span><br><span style="color: hsl(120, 100%, 40%);">+     }</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/25084">change 25084</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/25084"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: merged </div>
<div style="display:none"> Gerrit-Change-Id: I49d97a9d324207e45520d43b814b03a20005122a </div>
<div style="display:none"> Gerrit-Change-Number: 25084 </div>
<div style="display:none"> Gerrit-PatchSet: 15 </div>
<div style="display:none"> Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki@gmail.com> </div>
<div style="display:none"> Gerrit-Reviewer: Arthur Heymans <arthur@aheymans.xyz> </div>
<div style="display:none"> Gerrit-Reviewer: Patrick Rudolph <siro@das-labor.org> </div>
<div style="display:none"> Gerrit-Reviewer: Paul Menzel <paulepanter@users.sourceforge.net> </div>
<div style="display:none"> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki@gmail.com> </div>
<div style="display:none"> Gerrit-Reviewer: build bot (Jenkins) <no-reply@coreboot.org> </div>