<p>Richard Spiegel has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27744">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/amd/stoneyridge/lpc.c: Fix LPC host control<br><br>2 bits of LPC host control were originally not public, and wrongly<br>identified as IMC related. Now that the bits are available in public BKDG,<br>fix the naming of the bits.<br><br>BUG=b:111912080<br>TEST=build and boot grunt.<br><br>Change-Id: I1921f46c6be54eda6329c98267cec27004caadd5<br>Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com><br>---<br>M src/soc/amd/stoneyridge/include/soc/southbridge.h<br>M src/soc/amd/stoneyridge/lpc.c<br>2 files changed, 5 insertions(+), 6 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/44/27744/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h</span><br><span>index ece78b6..15c9581 100644</span><br><span>--- a/src/soc/amd/stoneyridge/include/soc/southbridge.h</span><br><span>+++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h</span><br><span>@@ -213,8 +213,8 @@</span><br><span> #define   SPI_FROM_USB_PREFETCH_EN       BIT(23)</span><br><span> </span><br><span> #define LPC_HOST_CONTROL         0xbb</span><br><span style="color: hsl(0, 100%, 40%);">-#define   IMC_PAGE_FROM_HOST_EN             BIT(0)</span><br><span style="color: hsl(0, 100%, 40%);">-#define   IMC_PORT_FROM_HOST_EN           BIT(3)</span><br><span style="color: hsl(120, 100%, 40%);">+#define   PREFETCH_EN_SPI_FROM_HOST     BIT(0)</span><br><span style="color: hsl(120, 100%, 40%);">+#define   T_START_ENH                   BIT(3)</span><br><span> </span><br><span> /* SPI Controller */</span><br><span> #define SPI_CNTRL0                        0x00</span><br><span>diff --git a/src/soc/amd/stoneyridge/lpc.c b/src/soc/amd/stoneyridge/lpc.c</span><br><span>index 4bf5a4f..6833db6 100644</span><br><span>--- a/src/soc/amd/stoneyridge/lpc.c</span><br><span>+++ b/src/soc/amd/stoneyridge/lpc.c</span><br><span>@@ -76,12 +76,11 @@</span><br><span>  pci_write_config8(dev, LPC_MISC_CONTROL_BITS, byte);</span><br><span> </span><br><span>     /*</span><br><span style="color: hsl(0, 100%, 40%);">-       * IMC is not used, but some of its registers and ports need to be</span><br><span style="color: hsl(0, 100%, 40%);">-       * programmed/accessed. So enable CPU access to them. This fixes</span><br><span style="color: hsl(0, 100%, 40%);">-         * SPI_CS# timing issue when running at 66MHz.</span><br><span style="color: hsl(120, 100%, 40%);">+         * Enable hand-instance of the pulse generator and SPI</span><br><span style="color: hsl(120, 100%, 40%);">+         * controller prefetch of flash.</span><br><span>      */</span><br><span>  byte = pci_read_config8(dev, LPC_HOST_CONTROL);</span><br><span style="color: hsl(0, 100%, 40%);">- byte |= IMC_PAGE_FROM_HOST_EN | IMC_PORT_FROM_HOST_EN;</span><br><span style="color: hsl(120, 100%, 40%);">+        byte |= PREFETCH_EN_SPI_FROM_HOST | T_START_ENH;</span><br><span>     pci_write_config8(dev, LPC_HOST_CONTROL, byte);</span><br><span> </span><br><span>  cmos_check_update_date();</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27744">change 27744</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27744"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I1921f46c6be54eda6329c98267cec27004caadd5 </div>
<div style="display:none"> Gerrit-Change-Number: 27744 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Richard Spiegel <richard.spiegel@silverbackltd.com> </div>