<p>Michał Żygowski has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27729">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mb/pcengines/apu2: correct LED setting<br><br>Due to vendor's requirements LED 2 and LED 3 should be turned<br>off in late boot process. Add appropriate functions to read and<br>write GPIO status.<br><br>Change-Id: Ia286ef7d02cfcefacf0e8d358847406efe1496fb<br>Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com><br>---<br>M src/mainboard/pcengines/apu2/gpio_ftns.c<br>M src/mainboard/pcengines/apu2/gpio_ftns.h<br>M src/mainboard/pcengines/apu2/mainboard.c<br>3 files changed, 24 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/27729/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/pcengines/apu2/gpio_ftns.c b/src/mainboard/pcengines/apu2/gpio_ftns.c</span><br><span>index b14d8a4..9a4a9ff 100644</span><br><span>--- a/src/mainboard/pcengines/apu2/gpio_ftns.c</span><br><span>+++ b/src/mainboard/pcengines/apu2/gpio_ftns.c</span><br><span>@@ -41,6 +41,18 @@</span><br><span> *iomuxptr = iomux_ftn & 0x3;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+u8 read_gpio(u32 gpio)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 *memptr = (u32 *)(ACPI_MMIO_BASE + GPIO_OFFSET + gpio);</span><br><span style="color: hsl(120, 100%, 40%);">+ return (*memptr & GPIO_PIN_STS) ? 1 : 0;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void write_gpio(u32 gpio, u8 value)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 *memptr = (u32 *)(ACPI_MMIO_BASE + GPIO_OFFSET + gpio);</span><br><span style="color: hsl(120, 100%, 40%);">+ *memptr |= (value > 0) ? GPIO_OUTPUT_VALUE : 0;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> int get_spd_offset(void)</span><br><span> {</span><br><span> u8 index = 0;</span><br><span>diff --git a/src/mainboard/pcengines/apu2/gpio_ftns.h b/src/mainboard/pcengines/apu2/gpio_ftns.h</span><br><span>index 05f5414..24d6a7f 100644</span><br><span>--- a/src/mainboard/pcengines/apu2/gpio_ftns.h</span><br><span>+++ b/src/mainboard/pcengines/apu2/gpio_ftns.h</span><br><span>@@ -17,6 +17,8 @@</span><br><span> #define GPIO_FTNS_H</span><br><span> </span><br><span> void configure_gpio(u32 iomux_gpio, u8 iomux_ftn, u32 gpio, u32 setting);</span><br><span style="color: hsl(120, 100%, 40%);">+u8 read_gpio(u32 gpio);</span><br><span style="color: hsl(120, 100%, 40%);">+void write_gpio(u32 gpio, u8 value);</span><br><span> int get_spd_offset(void);</span><br><span> </span><br><span> #define IOMUX_OFFSET 0xD00</span><br><span>diff --git a/src/mainboard/pcengines/apu2/mainboard.c b/src/mainboard/pcengines/apu2/mainboard.c</span><br><span>index 8f2d622..9434b93 100644</span><br><span>--- a/src/mainboard/pcengines/apu2/mainboard.c</span><br><span>+++ b/src/mainboard/pcengines/apu2/mainboard.c</span><br><span>@@ -178,6 +178,15 @@</span><br><span> pirq_setup();</span><br><span> }</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+static void mainboard_final(void *chip_info)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ //</span><br><span style="color: hsl(120, 100%, 40%);">+ // Turn off LED 2 and LED 3</span><br><span style="color: hsl(120, 100%, 40%);">+ //</span><br><span style="color: hsl(120, 100%, 40%);">+ write_gpio(GPIO_58, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+ write_gpio(GPIO_59, 1);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> /*</span><br><span> * We will stuff a modified version of the first NICs (BDF 1:0.0) MAC address</span><br><span> * into the smbios serial number location.</span><br><span>@@ -228,4 +237,5 @@</span><br><span> </span><br><span> struct chip_operations mainboard_ops = {</span><br><span> .enable_dev = mainboard_enable,</span><br><span style="color: hsl(120, 100%, 40%);">+ .final = mainboard_final,</span><br><span> };</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27729">change 27729</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27729"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ia286ef7d02cfcefacf0e8d358847406efe1496fb </div>
<div style="display:none"> Gerrit-Change-Number: 27729 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Michał Żygowski <michal.zygowski@3mdeb.com> </div>