<p>Felix Held has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27718">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">x4x/raminit_ddr23: use MCHBAR AND/OR/AND_OR macros [2/2]<br><br>This patch contains the parts that changed the hash of the generated binary;<br>probably due to the compiler optimizing things slightly different.<br><br>Change-Id: I3233ba1747dcf5ad05b2ad771a86e3936f655d1c<br>Signed-off-by: Felix Held <felix-coreboot@felixheld.de><br>---<br>M src/northbridge/intel/x4x/raminit_ddr23.c<br>1 file changed, 97 insertions(+), 142 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/27718/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c</span><br><span>index 71130e0..c445cad 100644</span><br><span>--- a/src/northbridge/intel/x4x/raminit_ddr23.c</span><br><span>+++ b/src/northbridge/intel/x4x/raminit_ddr23.c</span><br><span>@@ -265,87 +265,72 @@</span><br><span> </span><br><span> static void clkset0(u8 ch, const struct dll_setting *setting)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR16(0x400*ch + 0x5a0) = (MCHBAR16(0x400*ch + 0x5a0) & ~0xc440) |</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR16_AND_OR(0x400*ch + 0x5a0, ~0xc440,</span><br><span> (setting->clk_delay << 14) |</span><br><span> (setting->db_sel << 6) |</span><br><span style="color: hsl(0, 100%, 40%);">- (setting->db_en << 10);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x581) = (MCHBAR8(0x400*ch + 0x581) & ~0x70) |</span><br><span style="color: hsl(0, 100%, 40%);">- (setting->pi << 4);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x581) = (MCHBAR8(0x400*ch + 0x581) & ~0xf) |</span><br><span style="color: hsl(0, 100%, 40%);">- setting->tap;</span><br><span style="color: hsl(120, 100%, 40%);">+ (setting->db_en << 10));</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x581, ~0x70, setting->pi << 4);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x581, ~0xf, setting->tap);</span><br><span> }</span><br><span> </span><br><span> static void clkset1(u8 ch, const struct dll_setting *setting)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*ch + 0x5a0) = (MCHBAR32(0x400*ch + 0x5a0) & ~0x30880) |</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*ch + 0x5a0, ~0x30880,</span><br><span> (setting->clk_delay << 16) |</span><br><span> (setting->db_sel << 7) |</span><br><span style="color: hsl(0, 100%, 40%);">- (setting->db_en << 11);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x582) = (MCHBAR8(0x400*ch + 0x582) & ~0x70) |</span><br><span style="color: hsl(0, 100%, 40%);">- (setting->pi << 4);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x582) = (MCHBAR8(0x400*ch + 0x582) & ~0xf) |</span><br><span style="color: hsl(0, 100%, 40%);">- setting->tap;</span><br><span style="color: hsl(120, 100%, 40%);">+ (setting->db_en << 11));</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x582, ~0x70, setting->pi << 4);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x582, ~0xf, setting->tap);</span><br><span> }</span><br><span> </span><br><span> static void ctrlset0(u8 ch, const struct dll_setting *setting)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*ch + 0x59c) = (MCHBAR32(0x400*ch + 0x59c) & ~0x3300000) |</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*ch + 0x59c, ~0x3300000,</span><br><span> (setting->clk_delay << 24) |</span><br><span> (setting->db_sel << 20) |</span><br><span style="color: hsl(0, 100%, 40%);">- (setting->db_en << 21);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x584) = (MCHBAR8(0x400*ch + 0x584) & ~0x70) |</span><br><span style="color: hsl(0, 100%, 40%);">- (setting->pi << 4);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x584) = (MCHBAR8(0x400*ch + 0x584) & ~0xf) |</span><br><span style="color: hsl(0, 100%, 40%);">- setting->tap;</span><br><span style="color: hsl(120, 100%, 40%);">+ (setting->db_en << 21));</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x584, ~0x70, setting->pi << 4);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x584, ~0xf, setting->tap);</span><br><span> }</span><br><span> </span><br><span> static void ctrlset1(u8 ch, const struct dll_setting *setting)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*ch + 0x59c) = (MCHBAR32(0x400*ch + 0x59c) & ~0x18c00000) |</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*ch + 0x59c, ~0x18c00000,</span><br><span> (setting->clk_delay << 27) |</span><br><span> (setting->db_sel << 22) |</span><br><span style="color: hsl(0, 100%, 40%);">- (setting->db_en << 23);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x585) = (MCHBAR8(0x400*ch + 0x585) & ~0x70) |</span><br><span style="color: hsl(0, 100%, 40%);">- (setting->pi << 4);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x585) = (MCHBAR8(0x400*ch + 0x585) & ~0xf) |</span><br><span style="color: hsl(0, 100%, 40%);">- setting->tap;</span><br><span style="color: hsl(120, 100%, 40%);">+ (setting->db_en << 23));</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x585, ~0x70, setting->pi << 4);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x585, ~0xf, setting->tap);</span><br><span> }</span><br><span> </span><br><span> static void ctrlset2(u8 ch, const struct dll_setting *setting)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*ch + 0x598) = (MCHBAR32(0x400*ch + 0x598) & ~0x18c00000) |</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*ch + 0x598, ~0x18c00000,</span><br><span> (setting->clk_delay << 14) |</span><br><span> (setting->db_sel << 12) |</span><br><span style="color: hsl(0, 100%, 40%);">- (setting->db_en << 13);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x586) = (MCHBAR8(0x400*ch + 0x586) & ~0x70) |</span><br><span style="color: hsl(0, 100%, 40%);">- (setting->pi << 4);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x586) = (MCHBAR8(0x400*ch + 0x586) & ~0xf) |</span><br><span style="color: hsl(0, 100%, 40%);">- setting->tap;</span><br><span style="color: hsl(120, 100%, 40%);">+ (setting->db_en << 13));</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x586, ~0x70, setting->pi << 4);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x586, ~0xf, setting->tap);</span><br><span> }</span><br><span> </span><br><span> static void ctrlset3(u8 ch, const struct dll_setting *setting)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*ch + 0x598) = (MCHBAR32(0x400*ch + 0x598) & ~0x18c00000) |</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*ch + 0x598, ~0x18c00000,</span><br><span> (setting->clk_delay << 10) |</span><br><span> (setting->db_sel << 8) |</span><br><span style="color: hsl(0, 100%, 40%);">- (setting->db_en << 9);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x587) = (MCHBAR8(0x400*ch + 0x587) & ~0x70) |</span><br><span style="color: hsl(0, 100%, 40%);">- (setting->pi << 4);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x587) = (MCHBAR8(0x400*ch + 0x587) & ~0xf) |</span><br><span style="color: hsl(0, 100%, 40%);">- setting->tap;</span><br><span style="color: hsl(120, 100%, 40%);">+ (setting->db_en << 9));</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x587, ~0x70, setting->pi << 4);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x587, ~0xf, setting->tap);</span><br><span> }</span><br><span> </span><br><span> static void cmdset(u8 ch, const struct dll_setting *setting)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x598) = (MCHBAR8(0x400*ch + 0x598) & ~0x30) |</span><br><span style="color: hsl(0, 100%, 40%);">- (setting->clk_delay << 4);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x594) = (MCHBAR8(0x400*ch + 0x594) & ~0x60) |</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x598, ~0x30, setting->clk_delay << 4);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x594, ~0x60,</span><br><span> (setting->db_sel << 5) |</span><br><span style="color: hsl(0, 100%, 40%);">- (setting->db_en << 6);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x580) = (MCHBAR8(0x400*ch + 0x580) & ~0x70) |</span><br><span style="color: hsl(0, 100%, 40%);">- (setting->pi << 4);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x580) = (MCHBAR8(0x400*ch + 0x580) & ~0xf) |</span><br><span style="color: hsl(0, 100%, 40%);">- setting->tap;</span><br><span style="color: hsl(120, 100%, 40%);">+ (setting->db_en << 6));</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x580, ~0x70, setting->pi << 4);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x580, ~0xf, setting->tap);</span><br><span> }</span><br><span> </span><br><span> /**</span><br><span>@@ -356,52 +341,41 @@</span><br><span> {</span><br><span> int rank;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400 * ch + 0x5fc) = (MCHBAR32(0x400 * ch + 0x5fc)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~(1 << (lane * 4 + 1)))</span><br><span style="color: hsl(0, 100%, 40%);">- | (setting->coarse << (lane * 4 + 1));</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400 * ch + 0x5fc, ~(1 << (lane * 4 + 1)),</span><br><span style="color: hsl(120, 100%, 40%);">+ setting->coarse << (lane * 4 + 1));</span><br><span> </span><br><span> for (rank = 0; rank < 4; rank++) {</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400 * ch + 0x5b4 + rank * 4) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR32(0x400 * ch + 0x5b4 + rank * 4)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~(0x201 << lane))</span><br><span style="color: hsl(0, 100%, 40%);">- | (setting->db_en << (9 + lane))</span><br><span style="color: hsl(0, 100%, 40%);">- | (setting->db_sel << lane);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400 * ch + 0x5b4 + rank * 4, ~(0x201 << lane),</span><br><span style="color: hsl(120, 100%, 40%);">+ (setting->db_en << (9 + lane)) |</span><br><span style="color: hsl(120, 100%, 40%);">+ (setting->db_sel << lane));</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*ch + 0x5c8 + rank * 4) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR32(0x400 * ch + 0x5c8 + rank * 4)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~(0x3 << (16 + lane * 2)))</span><br><span style="color: hsl(0, 100%, 40%);">- | (setting->clk_delay << (16+lane * 2));</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*ch + 0x5c8 + rank * 4,</span><br><span style="color: hsl(120, 100%, 40%);">+ ~(0x3 << (16 + lane * 2)),</span><br><span style="color: hsl(120, 100%, 40%);">+ setting->clk_delay << (16+lane * 2));</span><br><span> </span><br><span> MCHBAR8(0x400*ch + 0x520 + lane * 4 + rank) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR8(0x400*ch + 0x520 + lane*4) & ~0x7f)</span><br><span style="color: hsl(0, 100%, 40%);">- | (setting->pi << 4)</span><br><span style="color: hsl(0, 100%, 40%);">- | setting->tap;</span><br><span style="color: hsl(120, 100%, 40%);">+ (MCHBAR8(0x400*ch + 0x520 + lane * 4) & ~0x7f) |</span><br><span style="color: hsl(120, 100%, 40%);">+ (setting->pi << 4) |</span><br><span style="color: hsl(120, 100%, 40%);">+ setting->tap;</span><br><span> }</span><br><span> }</span><br><span> </span><br><span> void dqset(u8 ch, u8 lane, const struct dll_setting *setting)</span><br><span> {</span><br><span> int rank;</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400 * ch + 0x5fc) = (MCHBAR32(0x400 * ch + 0x5fc)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~(1 << (lane * 4)))</span><br><span style="color: hsl(0, 100%, 40%);">- | (setting->coarse << (lane * 4));</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400 * ch + 0x5fc, ~(1 << (lane * 4)),</span><br><span style="color: hsl(120, 100%, 40%);">+ setting->coarse << (lane * 4));</span><br><span> </span><br><span> for (rank = 0; rank < 4; rank++) {</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400 * ch + 0x5a4 + rank * 4) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR32(0x400 * ch + 0x5a4 + rank * 4)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~(0x201 << lane))</span><br><span style="color: hsl(0, 100%, 40%);">- | (setting->db_en << (9 + lane))</span><br><span style="color: hsl(0, 100%, 40%);">- | (setting->db_sel << lane);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400 * ch + 0x5a4 + rank * 4, ~(0x201 << lane),</span><br><span style="color: hsl(120, 100%, 40%);">+ (setting->db_en << (9 + lane)) |</span><br><span style="color: hsl(120, 100%, 40%);">+ (setting->db_sel << lane));</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400 * ch + 0x5c8 + rank * 4) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR32(0x400 * ch + 0x5c8 + rank * 4)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~(0x3 << (lane * 2)))</span><br><span style="color: hsl(0, 100%, 40%);">- | (setting->clk_delay << (2 * lane));</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400 * ch + 0x5c8 + rank * 4,</span><br><span style="color: hsl(120, 100%, 40%);">+ ~(0x3 << (lane * 2)), setting->clk_delay << (2 * lane));</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*ch + 0x500 + lane * 4 + rank) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR8(0x400 * ch + 0x500 + lane * 4 + rank) & ~0x7f)</span><br><span style="color: hsl(0, 100%, 40%);">- | (setting->pi << 4)</span><br><span style="color: hsl(0, 100%, 40%);">- | setting->tap;</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*ch + 0x500 + lane * 4 + rank, ~0x7f,</span><br><span style="color: hsl(120, 100%, 40%);">+ (setting->pi << 4) | setting->tap);</span><br><span> }</span><br><span> }</span><br><span> </span><br><span>@@ -545,10 +519,9 @@</span><br><span> MCHBAR8_AND_OR(0x400*i + 0x228, ~0x7, 0x2);</span><br><span> /* tWL - x ?? */</span><br><span> MCHBAR8_AND_OR(0x400*i + 0x240, ~0xf0, 0 << 4);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*i + 0x240) = (MCHBAR8(0x400*i + 0x240) & ~0xf) |</span><br><span style="color: hsl(0, 100%, 40%);">- adjusted_cas;</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR16(0x400*i + 0x265) = (MCHBAR16(0x400*i + 0x265) & ~0x3f00) |</span><br><span style="color: hsl(0, 100%, 40%);">- ((adjusted_cas + 9) << 8);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*i + 0x240, ~0xf, adjusted_cas);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR16_AND_OR(0x400*i + 0x265, ~0x3f00,</span><br><span style="color: hsl(120, 100%, 40%);">+ (adjusted_cas + 9) << 8);</span><br><span> </span><br><span> reg16 = (s->selected_timings.tRAS << 11) |</span><br><span> ((twl + 4 + s->selected_timings.tWR) << 6) |</span><br><span>@@ -583,11 +556,11 @@</span><br><span> MCHBAR16(0x400*i + 0x25b) = ((s->selected_timings.tRP + trpmod) << 9) |</span><br><span> s->selected_timings.tRFC;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR16(0x400*i + 0x260) = (MCHBAR16(0x400*i + 0x260) & ~0x3fe)</span><br><span style="color: hsl(0, 100%, 40%);">- | ((s->spd_type == DDR2 ? 100 : 256) << 1);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR16_AND_OR(0x400*i + 0x260, ~0x3fe,</span><br><span style="color: hsl(120, 100%, 40%);">+ (s->spd_type == DDR2 ? 100 : 256) << 1);</span><br><span> MCHBAR8(0x400*i + 0x264) = 0xff;</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*i + 0x25d) = (MCHBAR8(0x400*i + 0x25d) & ~0x3f) |</span><br><span style="color: hsl(0, 100%, 40%);">- s->selected_timings.tRAS;</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*i + 0x25d, ~0x3f,</span><br><span style="color: hsl(120, 100%, 40%);">+ s->selected_timings.tRAS);</span><br><span> MCHBAR16(0x400*i + 0x244) = 0x2310;</span><br><span> </span><br><span> switch (s->selected_timings.mem_clk) {</span><br><span>@@ -599,8 +572,7 @@</span><br><span> break;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*i + 0x246) = (MCHBAR8(0x400*i + 0x246) & ~0x1f) |</span><br><span style="color: hsl(0, 100%, 40%);">- (reg8 << 2) | 1;</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*i + 0x246, ~0x1f, (reg8 << 2) | 1);</span><br><span> </span><br><span> fsb = fsb2ps[s->selected_timings.fsb_clk];</span><br><span> ddr = ddr2ps[s->selected_timings.mem_clk];</span><br><span>@@ -611,8 +583,7 @@</span><br><span> ddr2mhz(s->selected_timings.mem_clk)) > 2) {</span><br><span> reg32 |= 1 << 24;</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*i + 0x248) = (MCHBAR32(0x400*i + 0x248) & ~0x0f001f00) |</span><br><span style="color: hsl(0, 100%, 40%);">- reg32;</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*i + 0x248, ~0x0f001f00, reg32);</span><br><span> </span><br><span> if (twl > 2)</span><br><span> flag1 = 1;</span><br><span>@@ -778,8 +749,7 @@</span><br><span> reg16 = 0;</span><br><span> if ((s->spd_type == DDR3) && (i == 0))</span><br><span> reg16 = (0x3 << 12);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR16(0x400*i + 0x59c) = (MCHBAR16(0x400*i + 0x59c)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~0x3000) | reg16;</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR16_AND_OR(0x400*i + 0x59c, ~0x3000, reg16);</span><br><span> </span><br><span> reg32 = 0;</span><br><span> FOR_EACH_RANK_IN_CHANNEL(r) {</span><br><span>@@ -818,9 +788,8 @@</span><br><span> </span><br><span> } else { /* DDR3 */</span><br><span> FOR_EACH_POPULATED_RANK_IN_CHANNEL(s->dimms, i, r) {</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400 * i + 0x5a0 + 3) =</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400 * i + 0x5a0 + 3)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~rank2clken[r + i * 4];</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND(0x400 * i + 0x5a0 + 3,</span><br><span style="color: hsl(120, 100%, 40%);">+ ~rank2clken[r + i * 4]);</span><br><span> }</span><br><span> }</span><br><span> </span><br><span>@@ -1142,58 +1111,46 @@</span><br><span> FOR_EACH_POPULATED_CHANNEL(s->dimms, i) {</span><br><span> for (j = 0; j < 6; j++) {</span><br><span> if (j == 0) {</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*i + addr[j]) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR32(0x400*i + addr[j]) & ~0xff000)</span><br><span style="color: hsl(0, 100%, 40%);">- | 0xaa000;</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*i + addr[j], ~0xff000,</span><br><span style="color: hsl(120, 100%, 40%);">+ 0xaa000);</span><br><span> MCHBAR16_AND_OR(0x400*i + 0x320, ~0xffff,</span><br><span> 0x6666);</span><br><span> for (k = 0; k < 8; k++) {</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*i + addr[j] + 0xe + (k << 2)) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR32(0x400*i + addr[j] + 0xe + (k << 2))</span><br><span style="color: hsl(0, 100%, 40%);">- & ~0x3f3f3f3f) | x32a[k];</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*i + addr[j] + 0x2e + (k << 2)) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR32(0x400*i + addr[j] + 0x2e + (k << 2))</span><br><span style="color: hsl(0, 100%, 40%);">- & ~0x3f3f3f3f) | x32a[k];</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*i + addr[j] +</span><br><span style="color: hsl(120, 100%, 40%);">+ 0xe + (k << 2),</span><br><span style="color: hsl(120, 100%, 40%);">+ ~0x3f3f3f3f, x32a[k]);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*i + addr[j] +</span><br><span style="color: hsl(120, 100%, 40%);">+ 0x2e + (k << 2),</span><br><span style="color: hsl(120, 100%, 40%);">+ ~0x3f3f3f3f, x32a[k]);</span><br><span> }</span><br><span> } else {</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR16(0x400*i + addr[j]) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR16(0x400*i + addr[j])</span><br><span style="color: hsl(0, 100%, 40%);">- & ~0xf000) | 0xa000;</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR16(0x400*i + addr[j] + 4) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR16(0x400*i + addr[j] + 4)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~0xffff) | x378[j];</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*i + addr[j] + 0xe) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR32(0x400*i + addr[j] + 0xe)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~0x3f3f3f3f) | x382[j];</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*i + addr[j] + 0x12) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR32(0x400*i + addr[j] + 0x12)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~0x3f3f3f3f) | x386[j];</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*i + addr[j] + 0x16) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR32(0x400*i + addr[j] + 0x16)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~0x3f3f3f3f) | x38a[j];</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*i + addr[j] + 0x1a) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR32(0x400*i + addr[j] + 0x1a)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~0x3f3f3f3f) | x38e[j];</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*i + addr[j] + 0x1e) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR32(0x400*i + addr[j] + 0x1e)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~0x3f3f3f3f) | x392[j];</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*i + addr[j] + 0x22) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR32(0x400*i + addr[j] + 0x22)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~0x3f3f3f3f) | x396[j];</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*i + addr[j] + 0x26) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR32(0x400*i + addr[j] + 0x26)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~0x3f3f3f3f) | x39a[j];</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*i + addr[j] + 0x2a) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR32(0x400*i + addr[j] + 0x2a)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~0x3f3f3f3f) | x39e[j];</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR16_AND_OR(0x400*i + addr[j],</span><br><span style="color: hsl(120, 100%, 40%);">+ ~0xf000, 0xa000);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR16_AND_OR(0x400*i + addr[j] + 4,</span><br><span style="color: hsl(120, 100%, 40%);">+ ~0xffff, x378[j]);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*i + addr[j] + 0xe,</span><br><span style="color: hsl(120, 100%, 40%);">+ ~0x3f3f3f3f, x382[j]);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*i + addr[j] + 0x12,</span><br><span style="color: hsl(120, 100%, 40%);">+ ~0x3f3f3f3f, x386[j]);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*i + addr[j] + 0x16,</span><br><span style="color: hsl(120, 100%, 40%);">+ ~0x3f3f3f3f, x38a[j]);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*i + addr[j] + 0x1a,</span><br><span style="color: hsl(120, 100%, 40%);">+ ~0x3f3f3f3f, x38e[j]);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*i + addr[j] + 0x1e,</span><br><span style="color: hsl(120, 100%, 40%);">+ ~0x3f3f3f3f, x392[j]);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*i + addr[j] + 0x22,</span><br><span style="color: hsl(120, 100%, 40%);">+ ~0x3f3f3f3f, x396[j]);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*i + addr[j] + 0x26,</span><br><span style="color: hsl(120, 100%, 40%);">+ ~0x3f3f3f3f, x39a[j]);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*i + addr[j] + 0x2a,</span><br><span style="color: hsl(120, 100%, 40%);">+ ~0x3f3f3f3f, x39e[j]);</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">- if (s->spd_type == DDR3</span><br><span style="color: hsl(0, 100%, 40%);">- && BOTH_DIMMS_ARE_POPULATED(s->dimms, i)) {</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR16(0x378 + 0x400 * i) =</span><br><span style="color: hsl(0, 100%, 40%);">- (MCHBAR16(0x378 + 0x400 * i)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~0xffff) | 0xcccc;</span><br><span style="color: hsl(120, 100%, 40%);">+ if (s->spd_type == DDR3 &&</span><br><span style="color: hsl(120, 100%, 40%);">+ BOTH_DIMMS_ARE_POPULATED(s->dimms, i)) {</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR16_AND_OR(0x378 + 0x400 * i,</span><br><span style="color: hsl(120, 100%, 40%);">+ ~0xffff, 0xcccc);</span><br><span> }</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR8(0x400*i + addr[j]) = (MCHBAR8(0x400*i + addr[j]) & ~1) | bit[j];</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR8_AND_OR(0x400*i + addr[j], ~1, bit[j]);</span><br><span> }</span><br><span> reg8 = (s->spd_type == DDR2) ? 0x12 : 0x36;</span><br><span> MCHBAR8_AND_OR(0x400*i + 0x45a, ~0x3f, reg8);</span><br><span>@@ -1272,8 +1229,7 @@</span><br><span> reg16 &= ~0xfff;</span><br><span> reg16 |= (s->spd_type == DDR2 ? 0x66b : 0x778);</span><br><span> MCHBAR16(0x400*i + 0x29c) = reg16;</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0x400*i + 0x260) = (MCHBAR32(0x400*i + 0x260)</span><br><span style="color: hsl(0, 100%, 40%);">- & ~0x70e3c00) | 0x3063c00;</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0x400*i + 0x260, ~0x70e3c00, 0x3063c00);</span><br><span> }</span><br><span> }</span><br><span> </span><br><span>@@ -1843,9 +1799,8 @@</span><br><span> </span><br><span> reg8 = pci_read_config8(PCI_DEV(0, 0, 0), 0xf0);</span><br><span> pci_write_config8(PCI_DEV(0, 0, 0), 0xf0, reg8 | 1);</span><br><span style="color: hsl(0, 100%, 40%);">- MCHBAR32(0xfa0) = (MCHBAR32(0xfa0) & ~0x20002) | 0x2</span><br><span style="color: hsl(0, 100%, 40%);">- | (s->selected_timings.fsb_clk == FSB_CLOCK_1333MHz</span><br><span style="color: hsl(0, 100%, 40%);">- ? 0x20000 : 0);</span><br><span style="color: hsl(120, 100%, 40%);">+ MCHBAR32_AND_OR(0xfa0, ~0x20002, 0x2 | (s->selected_timings.fsb_clk ==</span><br><span style="color: hsl(120, 100%, 40%);">+ FSB_CLOCK_1333MHz ? 0x20000 : 0));</span><br><span> reg32 = 0x219100c2;</span><br><span> if (s->selected_timings.fsb_clk == FSB_CLOCK_1333MHz) {</span><br><span> reg32 |= 1;</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27718">change 27718</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27718"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I3233ba1747dcf5ad05b2ad771a86e3936f655d1c </div>
<div style="display:none"> Gerrit-Change-Number: 27718 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Felix Held <felix-coreboot@felixheld.de> </div>