<p>Philipp Deppenwiese has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27715">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">soc/intel: Remove legacy static TPM asl code<br><br>Since the TPM software stack refactoring static<br>TPM ACPI code isn't needed anymore.<br><br>Change-Id: I36a99cbc420ecfa55aa5c89787151d482225adf2<br>Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org><br>---<br>M src/soc/intel/baytrail/acpi/lpc.asl<br>M src/soc/intel/braswell/acpi/lpc.asl<br>M src/soc/intel/denverton_ns/acpi/lpc.asl<br>M src/soc/intel/fsp_baytrail/acpi/lpc.asl<br>4 files changed, 0 insertions(+), 93 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/27715/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/baytrail/acpi/lpc.asl b/src/soc/intel/baytrail/acpi/lpc.asl</span><br><span>index 17d6f43..00aac51 100644</span><br><span>--- a/src/soc/intel/baytrail/acpi/lpc.asl</span><br><span>+++ b/src/soc/intel/baytrail/acpi/lpc.asl</span><br><span>@@ -135,27 +135,4 @@</span><br><span> </span><br><span>        // Include mainboard's superio.asl file.</span><br><span>         #include "acpi/superio.asl"</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#if IS_ENABLED(CONFIG_LPC_TPM)</span><br><span style="color: hsl(0, 100%, 40%);">-     Device (TPM)            // Trusted Platform Module</span><br><span style="color: hsl(0, 100%, 40%);">-      {</span><br><span style="color: hsl(0, 100%, 40%);">-               Name(_HID, EISAID("IFX0102"))</span><br><span style="color: hsl(0, 100%, 40%);">-         Name(_CID, 0x310cd041)</span><br><span style="color: hsl(0, 100%, 40%);">-          Name(_UID, 1)</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-           Method(_STA, 0)</span><br><span style="color: hsl(0, 100%, 40%);">-         {</span><br><span style="color: hsl(0, 100%, 40%);">-                       If (TPMP) {</span><br><span style="color: hsl(0, 100%, 40%);">-                             Return (0xf)</span><br><span style="color: hsl(0, 100%, 40%);">-                    }</span><br><span style="color: hsl(0, 100%, 40%);">-                       Return (0x0)</span><br><span style="color: hsl(0, 100%, 40%);">-            }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-               Name(_CRS, ResourceTemplate() {</span><br><span style="color: hsl(0, 100%, 40%);">-                 IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)</span><br><span style="color: hsl(0, 100%, 40%);">-                   IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)</span><br><span style="color: hsl(0, 100%, 40%);">-                 Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)</span><br><span style="color: hsl(0, 100%, 40%);">-           })</span><br><span style="color: hsl(0, 100%, 40%);">-      }</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span> }</span><br><span>diff --git a/src/soc/intel/braswell/acpi/lpc.asl b/src/soc/intel/braswell/acpi/lpc.asl</span><br><span>index eb4a16a..0a8b8bc 100644</span><br><span>--- a/src/soc/intel/braswell/acpi/lpc.asl</span><br><span>+++ b/src/soc/intel/braswell/acpi/lpc.asl</span><br><span>@@ -137,27 +137,4 @@</span><br><span> </span><br><span>     /* Include mainboard's superio.asl file. */</span><br><span>      #include "acpi/superio.asl"</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#if IS_ENABLED(CONFIG_LPC_TPM)</span><br><span style="color: hsl(0, 100%, 40%);">-     Device (TPM)            /* Trusted Platform Module */</span><br><span style="color: hsl(0, 100%, 40%);">-   {</span><br><span style="color: hsl(0, 100%, 40%);">-               Name(_HID, EISAID("IFX0102"))</span><br><span style="color: hsl(0, 100%, 40%);">-         Name(_CID, 0x310cd041)</span><br><span style="color: hsl(0, 100%, 40%);">-          Name(_UID, 1)</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-           Method(_STA, 0)</span><br><span style="color: hsl(0, 100%, 40%);">-         {</span><br><span style="color: hsl(0, 100%, 40%);">-                       If (TPMP) {</span><br><span style="color: hsl(0, 100%, 40%);">-                             Return (0xf)</span><br><span style="color: hsl(0, 100%, 40%);">-                    }</span><br><span style="color: hsl(0, 100%, 40%);">-                       Return (0x0)</span><br><span style="color: hsl(0, 100%, 40%);">-            }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-               Name(_CRS, ResourceTemplate() {</span><br><span style="color: hsl(0, 100%, 40%);">-                 IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)</span><br><span style="color: hsl(0, 100%, 40%);">-                   IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)</span><br><span style="color: hsl(0, 100%, 40%);">-                 Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)</span><br><span style="color: hsl(0, 100%, 40%);">-           })</span><br><span style="color: hsl(0, 100%, 40%);">-      }</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span> }</span><br><span>diff --git a/src/soc/intel/denverton_ns/acpi/lpc.asl b/src/soc/intel/denverton_ns/acpi/lpc.asl</span><br><span>index 3167c18..cc36451 100644</span><br><span>--- a/src/soc/intel/denverton_ns/acpi/lpc.asl</span><br><span>+++ b/src/soc/intel/denverton_ns/acpi/lpc.asl</span><br><span>@@ -205,28 +205,4 @@</span><br><span>                 Return(BUF0)</span><br><span>           }</span><br><span>  }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#ifdef ENABLE_TPM</span><br><span style="color: hsl(0, 100%, 40%);">-      Device (TPM)            // Trusted Platform Module</span><br><span style="color: hsl(0, 100%, 40%);">-      {</span><br><span style="color: hsl(0, 100%, 40%);">-               Name(_HID, EISAID("IFX0102"))</span><br><span style="color: hsl(0, 100%, 40%);">-         Name(_CID, 0x310cd041)</span><br><span style="color: hsl(0, 100%, 40%);">-          Name(_UID, 1)</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-           Method(_STA, 0)</span><br><span style="color: hsl(0, 100%, 40%);">-         {</span><br><span style="color: hsl(0, 100%, 40%);">-                       If (TPMP) {</span><br><span style="color: hsl(0, 100%, 40%);">-                             Return (0xf)</span><br><span style="color: hsl(0, 100%, 40%);">-                    }</span><br><span style="color: hsl(0, 100%, 40%);">-                       Return (0x0)</span><br><span style="color: hsl(0, 100%, 40%);">-            }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-               Name(_CRS, ResourceTemplate() {</span><br><span style="color: hsl(0, 100%, 40%);">-                 IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)</span><br><span style="color: hsl(0, 100%, 40%);">-                   IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)</span><br><span style="color: hsl(0, 100%, 40%);">-                 Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)</span><br><span style="color: hsl(0, 100%, 40%);">-                   IRQ (Edge, Activehigh, Exclusive) { 6 }</span><br><span style="color: hsl(0, 100%, 40%);">-         })</span><br><span style="color: hsl(0, 100%, 40%);">-      }</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span> }</span><br><span>diff --git a/src/soc/intel/fsp_baytrail/acpi/lpc.asl b/src/soc/intel/fsp_baytrail/acpi/lpc.asl</span><br><span>index 17d6f43..00aac51 100644</span><br><span>--- a/src/soc/intel/fsp_baytrail/acpi/lpc.asl</span><br><span>+++ b/src/soc/intel/fsp_baytrail/acpi/lpc.asl</span><br><span>@@ -135,27 +135,4 @@</span><br><span> </span><br><span>     // Include mainboard's superio.asl file.</span><br><span>         #include "acpi/superio.asl"</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-#if IS_ENABLED(CONFIG_LPC_TPM)</span><br><span style="color: hsl(0, 100%, 40%);">-     Device (TPM)            // Trusted Platform Module</span><br><span style="color: hsl(0, 100%, 40%);">-      {</span><br><span style="color: hsl(0, 100%, 40%);">-               Name(_HID, EISAID("IFX0102"))</span><br><span style="color: hsl(0, 100%, 40%);">-         Name(_CID, 0x310cd041)</span><br><span style="color: hsl(0, 100%, 40%);">-          Name(_UID, 1)</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-           Method(_STA, 0)</span><br><span style="color: hsl(0, 100%, 40%);">-         {</span><br><span style="color: hsl(0, 100%, 40%);">-                       If (TPMP) {</span><br><span style="color: hsl(0, 100%, 40%);">-                             Return (0xf)</span><br><span style="color: hsl(0, 100%, 40%);">-                    }</span><br><span style="color: hsl(0, 100%, 40%);">-                       Return (0x0)</span><br><span style="color: hsl(0, 100%, 40%);">-            }</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-               Name(_CRS, ResourceTemplate() {</span><br><span style="color: hsl(0, 100%, 40%);">-                 IO (Decode16, 0x2e, 0x2e, 0x01, 0x02)</span><br><span style="color: hsl(0, 100%, 40%);">-                   IO (Decode16, 0x6f0, 0x6f0, 0x01, 0x10)</span><br><span style="color: hsl(0, 100%, 40%);">-                 Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)</span><br><span style="color: hsl(0, 100%, 40%);">-           })</span><br><span style="color: hsl(0, 100%, 40%);">-      }</span><br><span style="color: hsl(0, 100%, 40%);">-#endif</span><br><span> }</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27715">change 27715</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27715"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: I36a99cbc420ecfa55aa5c89787151d482225adf2 </div>
<div style="display:none"> Gerrit-Change-Number: 27715 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki@gmail.com> </div>