<p>Philipp Deppenwiese has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27685">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mainboard/opencellular/rotundu: Enable TPM 1.2 support<br><br>* Enable support for all variants.<br><br>Change-Id: Ibdd43d8cff23d3fa1154e2b72aa6095682783fe5<br>Signed-off-by: Philipp Deppenwiese <zaolin@das-labor.org><br>---<br>M src/mainboard/opencellular/rotundu/Kconfig<br>M src/mainboard/opencellular/rotundu/acpi_tables.c<br>M src/mainboard/opencellular/rotundu/variants/rotundu/devicetree.cb<br>M src/mainboard/opencellular/rotundu/variants/supabrckv1/devicetree.cb<br>4 files changed, 13 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/27685/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/opencellular/rotundu/Kconfig b/src/mainboard/opencellular/rotundu/Kconfig</span><br><span>index 9b50cef..a062a7a 100644</span><br><span>--- a/src/mainboard/opencellular/rotundu/Kconfig</span><br><span>+++ b/src/mainboard/opencellular/rotundu/Kconfig</span><br><span>@@ -27,6 +27,8 @@</span><br><span>    select HAVE_ACPI_RESUME</span><br><span>      select USE_BLOBS</span><br><span>     select HAVE_FSP_BIN if FSP_PACKAGE_DEFAULT</span><br><span style="color: hsl(120, 100%, 40%);">+    select MAINBOARD_HAS_LPC_TPM</span><br><span style="color: hsl(120, 100%, 40%);">+  select MAINBOARD_HAS_TPM1</span><br><span> </span><br><span> if BOARD_OPENCELLULAR_BASEBOARD_ROTUNDU</span><br><span> </span><br><span>diff --git a/src/mainboard/opencellular/rotundu/acpi_tables.c b/src/mainboard/opencellular/rotundu/acpi_tables.c</span><br><span>index eeb9618..4f95bff 100644</span><br><span>--- a/src/mainboard/opencellular/rotundu/acpi_tables.c</span><br><span>+++ b/src/mainboard/opencellular/rotundu/acpi_tables.c</span><br><span>@@ -36,7 +36,7 @@</span><br><span>        gnvs->s5u1 = 0;</span><br><span> </span><br><span>       /* TPM Present */</span><br><span style="color: hsl(0, 100%, 40%);">-       gnvs->tpmp = 0;</span><br><span style="color: hsl(120, 100%, 40%);">+    gnvs->tpmp = 1;</span><br><span> </span><br><span>       /* Enable DPTF */</span><br><span>    gnvs->dpte = 0;</span><br><span>diff --git a/src/mainboard/opencellular/rotundu/variants/rotundu/devicetree.cb b/src/mainboard/opencellular/rotundu/variants/rotundu/devicetree.cb</span><br><span>index a31a001..7eeac7a 100644</span><br><span>--- a/src/mainboard/opencellular/rotundu/variants/rotundu/devicetree.cb</span><br><span>+++ b/src/mainboard/opencellular/rotundu/variants/rotundu/devicetree.cb</span><br><span>@@ -75,7 +75,11 @@</span><br><span>             device pci 1e.3 on end  # 8086 0F0A -   HSUART 1</span><br><span>             device pci 1e.4 off end # 8086 0F0C -   HSUART 2</span><br><span>             device pci 1e.5 off end # 8086 0F0E -   SPI</span><br><span style="color: hsl(0, 100%, 40%);">-             device pci 1f.0 on end  # 8086 0F1C - LPC bridge</span><br><span style="color: hsl(120, 100%, 40%);">+              device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+                    chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+                         device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+                      end</span><br><span style="color: hsl(120, 100%, 40%);">+           end     # 8086 0F1C - LPC bridge</span><br><span>             device pci 1f.3 on end  # 8086 0F12 - SMBus 0</span><br><span>        end</span><br><span> end</span><br><span>diff --git a/src/mainboard/opencellular/rotundu/variants/supabrckv1/devicetree.cb b/src/mainboard/opencellular/rotundu/variants/supabrckv1/devicetree.cb</span><br><span>index df08922..c0bd2f0 100644</span><br><span>--- a/src/mainboard/opencellular/rotundu/variants/supabrckv1/devicetree.cb</span><br><span>+++ b/src/mainboard/opencellular/rotundu/variants/supabrckv1/devicetree.cb</span><br><span>@@ -75,7 +75,11 @@</span><br><span>                 device pci 1e.3 on end  # 8086 0F0A -   HSUART 1</span><br><span>             device pci 1e.4 off end # 8086 0F0C -   HSUART 2</span><br><span>             device pci 1e.5 off end # 8086 0F0E -   SPI</span><br><span style="color: hsl(0, 100%, 40%);">-             device pci 1f.0 on end  # 8086 0F1C - LPC bridge</span><br><span style="color: hsl(120, 100%, 40%);">+              device pci 1f.0 on</span><br><span style="color: hsl(120, 100%, 40%);">+                    chip drivers/pc80/tpm</span><br><span style="color: hsl(120, 100%, 40%);">+                         device pnp 0c31.0 on end</span><br><span style="color: hsl(120, 100%, 40%);">+                      end</span><br><span style="color: hsl(120, 100%, 40%);">+           end     # 8086 0F1C - LPC bridge</span><br><span>             device pci 1f.3 on end  # 8086 0F12 - SMBus 0</span><br><span>        end</span><br><span> end</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27685">change 27685</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27685"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ibdd43d8cff23d3fa1154e2b72aa6095682783fe5 </div>
<div style="display:none"> Gerrit-Change-Number: 27685 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki@gmail.com> </div>