<p>Xiang Wang has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27645">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">riscv: add support move bootblock to CAR/SRAM before exection<br><br>It cannot access the data segment, if program located in masked rom.<br>So we can move it to CAR/SRAM before execution.<br><br>Change-Id: If1f53a7dbd7db9643bd9aeea6567cd4fae0f310e<br>Signed-off-by: Xiang Wang <wxjstz@126.com><br>---<br>M src/arch/riscv/Kconfig<br>M src/arch/riscv/bootblock.S<br>2 files changed, 29 insertions(+), 0 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/27645/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/arch/riscv/Kconfig b/src/arch/riscv/Kconfig</span><br><span>index 916e269..e36bbd6 100644</span><br><span>--- a/src/arch/riscv/Kconfig</span><br><span>+++ b/src/arch/riscv/Kconfig</span><br><span>@@ -28,3 +28,7 @@</span><br><span> config ARCH_RAMSTAGE_RISCV</span><br><span> bool</span><br><span> default n</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+config MOVE_BOOTBLOCK_TO_CAR</span><br><span style="color: hsl(120, 100%, 40%);">+ bool</span><br><span style="color: hsl(120, 100%, 40%);">+ default n</span><br><span>diff --git a/src/arch/riscv/bootblock.S b/src/arch/riscv/bootblock.S</span><br><span>index f92ed4b..378214c 100644</span><br><span>--- a/src/arch/riscv/bootblock.S</span><br><span>+++ b/src/arch/riscv/bootblock.S</span><br><span>@@ -37,6 +37,31 @@</span><br><span> # initialize cache as ram</span><br><span> call cache_as_ram</span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+ # It cannot access the data segment, if program located in masked rom.</span><br><span style="color: hsl(120, 100%, 40%);">+ # so we can move it to CAR/SRAM before execution.</span><br><span style="color: hsl(120, 100%, 40%);">+#if IS_ENABLED(CONFIG_MOVE_BOOTBLOCK_TO_CAR)</span><br><span style="color: hsl(120, 100%, 40%);">+_m2car:</span><br><span style="color: hsl(120, 100%, 40%);">+ la a0, _program</span><br><span style="color: hsl(120, 100%, 40%);">+ la a1, _eprogram</span><br><span style="color: hsl(120, 100%, 40%);">+ ld a2, _program_execution_address</span><br><span style="color: hsl(120, 100%, 40%);">+ beq a0, a2, _em2car</span><br><span style="color: hsl(120, 100%, 40%);">+1:</span><br><span style="color: hsl(120, 100%, 40%);">+ lb t0, 0(a0)</span><br><span style="color: hsl(120, 100%, 40%);">+ sb t0, 0(a2)</span><br><span style="color: hsl(120, 100%, 40%);">+ addi a0, a0, 1</span><br><span style="color: hsl(120, 100%, 40%);">+ addi a2, a2, 1</span><br><span style="color: hsl(120, 100%, 40%);">+ blt a0, a1, 1b</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ ld a0, _em2car_execution_address</span><br><span style="color: hsl(120, 100%, 40%);">+ jr a0</span><br><span style="color: hsl(120, 100%, 40%);">+_program_execution_address:</span><br><span style="color: hsl(120, 100%, 40%);">+ .dword _program</span><br><span style="color: hsl(120, 100%, 40%);">+_em2car_execution_address:</span><br><span style="color: hsl(120, 100%, 40%);">+ .dword _em2car</span><br><span style="color: hsl(120, 100%, 40%);">+_em2car:</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#endif</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> # Save the FDT pointer to memory.</span><br><span> # Make mscratch vacate for exception context switching.</span><br><span> csrrw a1, mscratch, zero</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27645">change 27645</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27645"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: If1f53a7dbd7db9643bd9aeea6567cd4fae0f310e </div>
<div style="display:none"> Gerrit-Change-Number: 27645 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Xiang Wang <wxjstz@126.com> </div>