<p>Gaggery Tsai has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27610">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">src/soc/intel/skl: Add AML IccMax and show IGD SKU<br><br>This patch adds AML IccMax for VR configuration. From doc #594883, the<br>IccMax for Core was changed to 28A, we need this patch to accommodate<br>the changes. Besides, add up AML-Y GFX sku ID while reporting system<br>information.<br><br>BUG=None<br>BRANCH=None<br>TEST=emerge-atlas coreboot chromeos-bootimage<br>     I will need a AML device to test. WIP.<br><br>Change-Id: Ic22bae162b58b06b9519f1b708be55bde5e4641e<br>Signed-off-by: Gaggery Tsai <gaggery.tsai@intel.com><br>---<br>M src/soc/intel/skylake/bootblock/report_platform.c<br>M src/soc/intel/skylake/vr_config.c<br>2 files changed, 22 insertions(+), 3 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/27610/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/soc/intel/skylake/bootblock/report_platform.c b/src/soc/intel/skylake/bootblock/report_platform.c</span><br><span>index 7d5bc3f..1072236 100644</span><br><span>--- a/src/soc/intel/skylake/bootblock/report_platform.c</span><br><span>+++ b/src/soc/intel/skylake/bootblock/report_platform.c</span><br><span>@@ -102,6 +102,7 @@</span><br><span>       { PCI_DEVICE_ID_INTEL_KBL_GT2_SULTMR, "Kabylake-R ULT GT2"},</span><br><span>       { PCI_DEVICE_ID_INTEL_KBL_GT2_SHALM, "Kabylake HALO GT2" },</span><br><span>        { PCI_DEVICE_ID_INTEL_KBL_GT2_DT2P2, "Kabylake DT GT2" },</span><br><span style="color: hsl(120, 100%, 40%);">+   { PCI_DEVICE_ID_INTEL_KBL_GT2_ULX_R, "Amberlake ULX GT2" },</span><br><span> };</span><br><span> </span><br><span> static uint8_t get_dev_revision(pci_devfn_t dev)</span><br><span>diff --git a/src/soc/intel/skylake/vr_config.c b/src/soc/intel/skylake/vr_config.c</span><br><span>index 57affe5..6a1f3e5 100644</span><br><span>--- a/src/soc/intel/skylake/vr_config.c</span><br><span>+++ b/src/soc/intel/skylake/vr_config.c</span><br><span>@@ -23,6 +23,7 @@</span><br><span> </span><br><span> #define KBLY_ICCMAX_SA                                  VR_CFG_AMP(4.1)</span><br><span> #define KBLY_ICCMAX_CORE                             VR_CFG_AMP(24)</span><br><span style="color: hsl(120, 100%, 40%);">+#define AMLY_ICCMAX_CORE                                VR_CFG_AMP(28)</span><br><span> #define KBLY_ICCMAX_GTS_GTUS                  VR_CFG_AMP(24)</span><br><span> #define KBLR_ICCMAX_SA_U42                            VR_CFG_AMP(6)</span><br><span> #define KBLU_ICCMAX_SA_U22                             VR_CFG_AMP(4.5)</span><br><span>@@ -36,11 +37,13 @@</span><br><span>        KBL_R_SKU,</span><br><span>   KBL_U_BASE_SKU,</span><br><span>      KBL_U_PREMIUM_SKU,</span><br><span style="color: hsl(120, 100%, 40%);">+    AML_Y_SKU,</span><br><span> };</span><br><span> </span><br><span> /*</span><br><span>  * Iccmax table from Doc #559100 Section 7.2 DC Specifications, the</span><br><span>  * Iccmax is the same among KBL-Y but KBL-U/R.</span><br><span style="color: hsl(120, 100%, 40%);">+ * Addendum for AML-Y #594883, IccMax for IA core is 28A.</span><br><span>  * +----------------+-------------+---------------+------+-----+</span><br><span>  * | Domain/Setting |  SA         |  IA           | GTUS | GTS |</span><br><span>  * +----------------+-------------+---------------+------+-----+</span><br><span>@@ -50,6 +53,8 @@</span><br><span>  * +----------------+-------------+---------------+------+-----+</span><br><span>  * | IccMax(KBL-Y)  | 4.1A        | 24A           | 24A  | 24A |</span><br><span>  * +----------------+-------------+---------------+------+-----+</span><br><span style="color: hsl(120, 100%, 40%);">+ * | IccMax(AML-Y)  | 4.1A        | 28A           | 24A  | 24A |</span><br><span style="color: hsl(120, 100%, 40%);">+ * +----------------+-------------+---------------+------+-----+</span><br><span>  */</span><br><span> </span><br><span> static const struct {</span><br><span>@@ -92,6 +97,15 @@</span><br><span>                      KBLUR_ICCMAX_GTS_GTUS</span><br><span>                }</span><br><span>    },</span><br><span style="color: hsl(120, 100%, 40%);">+    [AML_Y_SKU] = {</span><br><span style="color: hsl(120, 100%, 40%);">+               .sku = AML_Y_SKU,</span><br><span style="color: hsl(120, 100%, 40%);">+             .icc_max = {</span><br><span style="color: hsl(120, 100%, 40%);">+                  KBLY_ICCMAX_SA,</span><br><span style="color: hsl(120, 100%, 40%);">+                       AMLY_ICCMAX_CORE,</span><br><span style="color: hsl(120, 100%, 40%);">+                     KBLY_ICCMAX_GTS_GTUS,</span><br><span style="color: hsl(120, 100%, 40%);">+                 KBLY_ICCMAX_GTS_GTUS</span><br><span style="color: hsl(120, 100%, 40%);">+          }</span><br><span style="color: hsl(120, 100%, 40%);">+     },</span><br><span> };</span><br><span> </span><br><span> /* Default values for domain configuration. PSI3 and PSI4 are disabled. */</span><br><span>@@ -176,9 +190,13 @@</span><br><span>    id = get_dev_id(SA_DEV_ROOT);</span><br><span>        if (id == PCI_DEVICE_ID_INTEL_KBL_U_R)</span><br><span>               sku = KBL_R_SKU;</span><br><span style="color: hsl(0, 100%, 40%);">-        else if (id == PCI_DEVICE_ID_INTEL_KBL_ID_Y)</span><br><span style="color: hsl(0, 100%, 40%);">-            sku = KBL_Y_SKU;</span><br><span style="color: hsl(0, 100%, 40%);">-        else if (id == PCI_DEVICE_ID_INTEL_KBL_ID_U) {</span><br><span style="color: hsl(120, 100%, 40%);">+        else if (id == PCI_DEVICE_ID_INTEL_KBL_ID_Y) {</span><br><span style="color: hsl(120, 100%, 40%);">+                id = get_dev_id(SA_DEV_IGD);</span><br><span style="color: hsl(120, 100%, 40%);">+          if (id == PCI_DEVICE_ID_INTEL_KBL_GT2_ULX_R)</span><br><span style="color: hsl(120, 100%, 40%);">+                  sku = AML_Y_SKU;</span><br><span style="color: hsl(120, 100%, 40%);">+              else</span><br><span style="color: hsl(120, 100%, 40%);">+                  sku = KBL_Y_SKU;</span><br><span style="color: hsl(120, 100%, 40%);">+      } else if (id == PCI_DEVICE_ID_INTEL_KBL_ID_U) {</span><br><span>             id = get_dev_id(PCH_DEV_LPC);</span><br><span>                if (id == PCI_DEVICE_ID_INTEL_SPT_LP_U_BASE_HDCP22)</span><br><span>                  sku = KBL_U_BASE_SKU;</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27610">change 27610</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27610"/><meta itemprop="name" content="View Change"/></div></div>

<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Ic22bae162b58b06b9519f1b708be55bde5e4641e </div>
<div style="display:none"> Gerrit-Change-Number: 27610 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Gaggery Tsai <gaggery.tsai@intel.com> </div>