<p>Tristan Hsieh has uploaded this change for <strong>review</strong>.</p><p><a href="https://review.coreboot.org/27416">View Change</a></p><pre style="font-family: monospace,monospace; white-space: pre-wrap;">mediatek: Share GPIO code among similar SOCs<br><br>Refactor GPIO code which will be reused among similar SOCs.<br><br>BUG=b:80501386<br>BRANCH=none<br>TEST=Boots correctly on Elm<br><br>Change-Id: Icdd1f2a1dd1bd64a7218bf9c63bd4a0af1acbcc0<br>Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com><br>---<br>M src/mainboard/google/oak/bootblock.c<br>A src/soc/mediatek/common/gpio.c<br>M src/soc/mediatek/mt8173/Makefile.inc<br>M src/soc/mediatek/mt8173/gpio.c<br>M src/soc/mediatek/mt8173/gpio_init.c<br>M src/soc/mediatek/mt8173/include/soc/gpio.h<br>M src/soc/mediatek/mt8173/include/soc/pinmux.h<br>7 files changed, 440 insertions(+), 293 deletions(-)<br><br></pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;">git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/27416/1</pre><pre style="font-family: monospace,monospace; white-space: pre-wrap;"><span>diff --git a/src/mainboard/google/oak/bootblock.c b/src/mainboard/google/oak/bootblock.c</span><br><span>index fe9c9ba..8034526 100644</span><br><span>--- a/src/mainboard/google/oak/bootblock.c</span><br><span>+++ b/src/mainboard/google/oak/bootblock.c</span><br><span>@@ -44,9 +44,9 @@</span><br><span> * 3: 16mA</span><br><span> */</span><br><span> /* EINT4: 0x10005B20[14:13] */</span><br><span style="color: hsl(0, 100%, 40%);">- clrsetbits_le16(&mt8173_gpio->drv_mode[2].val, 0xf << 12, 2 << 13);</span><br><span style="color: hsl(120, 100%, 40%);">+ clrsetbits_le16(&mtk_gpio->drv_mode[2].val, 0xf << 12, 2 << 13);</span><br><span> /* EINT5~EINT9: 0x10005B30[2:1] */</span><br><span style="color: hsl(0, 100%, 40%);">- clrsetbits_le16(&mt8173_gpio->drv_mode[3].val, 0xf << 0, 2 << 1),</span><br><span style="color: hsl(120, 100%, 40%);">+ clrsetbits_le16(&mtk_gpio->drv_mode[3].val, 0xf << 0, 2 << 1),</span><br><span> </span><br><span> gpio_set_pull(PAD_EINT4, GPIO_PULL_ENABLE, GPIO_PULL_UP);</span><br><span> gpio_set_pull(PAD_EINT5, GPIO_PULL_ENABLE, GPIO_PULL_UP);</span><br><span>diff --git a/src/soc/mediatek/common/gpio.c b/src/soc/mediatek/common/gpio.c</span><br><span>new file mode 100644</span><br><span>index 0000000..e6f99cb</span><br><span>--- /dev/null</span><br><span>+++ b/src/soc/mediatek/common/gpio.c</span><br><span>@@ -0,0 +1,128 @@</span><br><span style="color: hsl(120, 100%, 40%);">+/*</span><br><span style="color: hsl(120, 100%, 40%);">+ * This file is part of the coreboot project.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * Copyright 2018 MediaTek Inc.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is free software; you can redistribute it and/or modify</span><br><span style="color: hsl(120, 100%, 40%);">+ * it under the terms of the GNU General Public License as published by</span><br><span style="color: hsl(120, 100%, 40%);">+ * the Free Software Foundation; version 2 of the License.</span><br><span style="color: hsl(120, 100%, 40%);">+ *</span><br><span style="color: hsl(120, 100%, 40%);">+ * This program is distributed in the hope that it will be useful,</span><br><span style="color: hsl(120, 100%, 40%);">+ * but WITHOUT ANY WARRANTY; without even the implied warranty of</span><br><span style="color: hsl(120, 100%, 40%);">+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the</span><br><span style="color: hsl(120, 100%, 40%);">+ * GNU General Public License for more details.</span><br><span style="color: hsl(120, 100%, 40%);">+ */</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+#include <arch/io.h></span><br><span style="color: hsl(120, 100%, 40%);">+#include <gpio.h></span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+enum {</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_DIRECTION_IN = 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_DIRECTION_OUT = 1,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+enum {</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_MODE = 0,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void pos_bit_calc(gpio_t gpio, u32 *pos, u32 *bit)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ *pos = GPIO_GET_ID(gpio) / MAX_GPIO_REG_BITS;</span><br><span style="color: hsl(120, 100%, 40%);">+ *bit = GPIO_GET_ID(gpio) % MAX_GPIO_REG_BITS;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static void pos_bit_calc_for_mode(gpio_t gpio, u32 *pos, u32 *bit)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ *pos = GPIO_GET_ID(gpio) / MAX_GPIO_MODE_PER_REG;</span><br><span style="color: hsl(120, 100%, 40%);">+ *bit = (GPIO_GET_ID(gpio) % MAX_GPIO_MODE_PER_REG) * GPIO_MODE_BITS;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+static s32 gpio_set_dir(gpio_t gpio, u32 dir)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 pos;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 bit;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 *reg;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ pos_bit_calc(gpio, &pos, &bit);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (dir == GPIO_DIRECTION_IN)</span><br><span style="color: hsl(120, 100%, 40%);">+ reg = &mtk_gpio->dir[pos].rst;</span><br><span style="color: hsl(120, 100%, 40%);">+ else</span><br><span style="color: hsl(120, 100%, 40%);">+ reg = &mtk_gpio->dir[pos].set;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(reg, 1L << bit);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return 0;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void gpio_set_mode(gpio_t gpio, int mode)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 pos;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 bit;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 mask = (1L << GPIO_MODE_BITS) - 1;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ pos_bit_calc_for_mode(gpio, &pos, &bit);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ clrsetbits_le32(&mtk_gpio->mode[pos].val,</span><br><span style="color: hsl(120, 100%, 40%);">+ mask << bit, mode << bit);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+int gpio_get(gpio_t gpio)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 pos;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 bit;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 *reg;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 data;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ pos_bit_calc(gpio, &pos, &bit);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ reg = &mtk_gpio->din[pos].val;</span><br><span style="color: hsl(120, 100%, 40%);">+ data = read32(reg);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ return (data & (1L << bit)) ? 1 : 0;</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void gpio_set(gpio_t gpio, int output)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 pos;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 bit;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 *reg;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ pos_bit_calc(gpio, &pos, &bit);</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ if (output == 0)</span><br><span style="color: hsl(120, 100%, 40%);">+ reg = &mtk_gpio->dout[pos].rst;</span><br><span style="color: hsl(120, 100%, 40%);">+ else</span><br><span style="color: hsl(120, 100%, 40%);">+ reg = &mtk_gpio->dout[pos].set;</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+ write32(reg, 1L << bit);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void gpio_input_pulldown(gpio_t gpio)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ gpio_set_pull(gpio, GPIO_PULL_ENABLE, GPIO_PULL_DOWN);</span><br><span style="color: hsl(120, 100%, 40%);">+ gpio_set_dir(gpio, GPIO_DIRECTION_IN);</span><br><span style="color: hsl(120, 100%, 40%);">+ gpio_set_mode(gpio, GPIO_MODE);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void gpio_input_pullup(gpio_t gpio)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ gpio_set_pull(gpio, GPIO_PULL_ENABLE, GPIO_PULL_UP);</span><br><span style="color: hsl(120, 100%, 40%);">+ gpio_set_dir(gpio, GPIO_DIRECTION_IN);</span><br><span style="color: hsl(120, 100%, 40%);">+ gpio_set_mode(gpio, GPIO_MODE);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void gpio_input(gpio_t gpio)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ gpio_set_pull(gpio, GPIO_PULL_DISABLE, GPIO_PULL_DOWN);</span><br><span style="color: hsl(120, 100%, 40%);">+ gpio_set_dir(gpio, GPIO_DIRECTION_IN);</span><br><span style="color: hsl(120, 100%, 40%);">+ gpio_set_mode(gpio, GPIO_MODE);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+void gpio_output(gpio_t gpio, int value)</span><br><span style="color: hsl(120, 100%, 40%);">+{</span><br><span style="color: hsl(120, 100%, 40%);">+ gpio_set_pull(gpio, GPIO_PULL_DISABLE, GPIO_PULL_DOWN);</span><br><span style="color: hsl(120, 100%, 40%);">+ gpio_set(gpio, value);</span><br><span style="color: hsl(120, 100%, 40%);">+ gpio_set_dir(gpio, GPIO_DIRECTION_OUT);</span><br><span style="color: hsl(120, 100%, 40%);">+ gpio_set_mode(gpio, GPIO_MODE);</span><br><span style="color: hsl(120, 100%, 40%);">+}</span><br><span>diff --git a/src/soc/mediatek/mt8173/Makefile.inc b/src/soc/mediatek/mt8173/Makefile.inc</span><br><span>index 56c966a..ae7fd5b 100644</span><br><span>--- a/src/soc/mediatek/mt8173/Makefile.inc</span><br><span>+++ b/src/soc/mediatek/mt8173/Makefile.inc</span><br><span>@@ -27,7 +27,7 @@</span><br><span> bootblock-$(CONFIG_DRIVERS_UART) += ../common/uart.c</span><br><span> endif</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-bootblock-y += gpio.c gpio_init.c pmic_wrap.c mt6391.c</span><br><span style="color: hsl(120, 100%, 40%);">+bootblock-y += ../common/gpio.c gpio.c gpio_init.c pmic_wrap.c mt6391.c</span><br><span> bootblock-y += ../common/wdt.c</span><br><span> bootblock-y += mmu_operations.c</span><br><span> </span><br><span>@@ -42,7 +42,7 @@</span><br><span> verstage-y += timer.c</span><br><span> verstage-y += ../common/wdt.c</span><br><span> verstage-$(CONFIG_SPI_FLASH) += flash_controller.c</span><br><span style="color: hsl(0, 100%, 40%);">-verstage-y += gpio.c</span><br><span style="color: hsl(120, 100%, 40%);">+verstage-y += ../common/gpio.c gpio.c</span><br><span> </span><br><span> ################################################################################</span><br><span> </span><br><span>@@ -54,7 +54,7 @@</span><br><span> romstage-$(CONFIG_DRIVERS_UART) += ../common/uart.c</span><br><span> romstage-y += ../common/cbmem.c</span><br><span> romstage-y += spi.c</span><br><span style="color: hsl(0, 100%, 40%);">-romstage-y += gpio.c</span><br><span style="color: hsl(120, 100%, 40%);">+romstage-y += ../common/gpio.c gpio.c</span><br><span> romstage-y += pmic_wrap.c mt6391.c</span><br><span> romstage-y += memory.c</span><br><span> romstage-y += emi.c dramc_pi_basic_api.c dramc_pi_calibration_api.c</span><br><span>@@ -73,7 +73,7 @@</span><br><span> ramstage-y += pmic_wrap.c mt6391.c i2c.c</span><br><span> ramstage-y += mt6311.c</span><br><span> ramstage-y += da9212.c</span><br><span style="color: hsl(0, 100%, 40%);">-ramstage-y += gpio.c</span><br><span style="color: hsl(120, 100%, 40%);">+ramstage-y += ../common/gpio.c gpio.c</span><br><span> ramstage-y += ../common/wdt.c</span><br><span> ramstage-y += pll.c</span><br><span> ramstage-y += rtc.c</span><br><span>diff --git a/src/soc/mediatek/mt8173/gpio.c b/src/soc/mediatek/mt8173/gpio.c</span><br><span>index c5ca08b..f3bbeb2 100644</span><br><span>--- a/src/soc/mediatek/mt8173/gpio.c</span><br><span>+++ b/src/soc/mediatek/mt8173/gpio.c</span><br><span>@@ -14,80 +14,38 @@</span><br><span> */</span><br><span> #include <arch/io.h></span><br><span> #include <assert.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <console/console.h></span><br><span> #include <gpio.h></span><br><span> #include <types.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/addressmap.h></span><br><span style="color: hsl(0, 100%, 40%);">-#include <soc/gpio.h></span><br><span> </span><br><span> enum {</span><br><span style="color: hsl(0, 100%, 40%);">- MAX_8173_GPIO = 134,</span><br><span style="color: hsl(0, 100%, 40%);">- MAX_GPIO_REG_BITS = 16,</span><br><span style="color: hsl(0, 100%, 40%);">- MAX_GPIO_MODE_PER_REG = 5,</span><br><span style="color: hsl(0, 100%, 40%);">- GPIO_MODE_BITS = 3,</span><br><span style="color: hsl(120, 100%, 40%);">+ MAX_GPIO_NUMBER = 134,</span><br><span> MAX_EINT_REG_BITS = 32,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-enum {</span><br><span style="color: hsl(0, 100%, 40%);">- GPIO_DIRECTION_IN = 0,</span><br><span style="color: hsl(0, 100%, 40%);">- GPIO_DIRECTION_OUT = 1,</span><br><span style="color: hsl(0, 100%, 40%);">-};</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-enum {</span><br><span style="color: hsl(0, 100%, 40%);">- GPIO_MODE = 0,</span><br><span style="color: hsl(0, 100%, 40%);">-};</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static void pos_bit_calc(u32 pin, u32 *pos, u32 *bit)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pos_bit_calc(gpio_t gpio, u32 *pos, u32 *bit)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- *pos = pin / MAX_GPIO_REG_BITS;</span><br><span style="color: hsl(0, 100%, 40%);">- *bit = pin % MAX_GPIO_REG_BITS;</span><br><span style="color: hsl(120, 100%, 40%);">+ *pos = GPIO_GET_ID(gpio) / MAX_GPIO_REG_BITS;</span><br><span style="color: hsl(120, 100%, 40%);">+ *bit = GPIO_GET_ID(gpio) % MAX_GPIO_REG_BITS;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pos_bit_calc_for_mode(u32 pin, u32 *pos, u32 *bit)</span><br><span style="color: hsl(120, 100%, 40%);">+static void pos_bit_calc_for_eint(gpio_t gpio, u32 *pos, u32 *bit)</span><br><span> {</span><br><span style="color: hsl(0, 100%, 40%);">- *pos = pin / MAX_GPIO_MODE_PER_REG;</span><br><span style="color: hsl(0, 100%, 40%);">- *bit = (pin % MAX_GPIO_MODE_PER_REG) * GPIO_MODE_BITS;</span><br><span style="color: hsl(120, 100%, 40%);">+ *pos = GPIO_GET_ID(gpio) / MAX_EINT_REG_BITS;</span><br><span style="color: hsl(120, 100%, 40%);">+ *bit = GPIO_GET_ID(gpio) % MAX_EINT_REG_BITS;</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static void pos_bit_calc_for_eint(u32 pin, u32 *pos, u32 *bit)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- *pos = pin / MAX_EINT_REG_BITS;</span><br><span style="color: hsl(0, 100%, 40%);">- *bit = pin % MAX_EINT_REG_BITS;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-static s32 gpio_set_dir(u32 pin, u32 dir)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- u32 pos;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 bit;</span><br><span style="color: hsl(0, 100%, 40%);">- u16 *reg;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- assert(pin <= MAX_8173_GPIO);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- pos_bit_calc(pin, &pos, &bit);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (dir == GPIO_DIRECTION_IN)</span><br><span style="color: hsl(0, 100%, 40%);">- reg = &mt8173_gpio->dir[pos].rst;</span><br><span style="color: hsl(0, 100%, 40%);">- else</span><br><span style="color: hsl(0, 100%, 40%);">- reg = &mt8173_gpio->dir[pos].set;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- write16(reg, 1L << bit);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return 0;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void gpio_set_pull(gpio_t pin, enum pull_enable enable,</span><br><span style="color: hsl(120, 100%, 40%);">+void gpio_set_pull(gpio_t gpio, enum pull_enable enable,</span><br><span> enum pull_select select)</span><br><span> {</span><br><span> u32 pos;</span><br><span> u32 bit;</span><br><span style="color: hsl(0, 100%, 40%);">- u16 *en_reg, *sel_reg;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 *en_reg, *sel_reg;</span><br><span style="color: hsl(120, 100%, 40%);">+ u32 pin = GPIO_GET_ID(gpio);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- assert(pin <= MAX_8173_GPIO);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- pos_bit_calc(pin, &pos, &bit);</span><br><span style="color: hsl(120, 100%, 40%);">+ pos_bit_calc(gpio, &pos, &bit);</span><br><span> </span><br><span> if (enable == GPIO_PULL_DISABLE) {</span><br><span style="color: hsl(0, 100%, 40%);">- en_reg = &mt8173_gpio->pullen[pos].rst;</span><br><span style="color: hsl(120, 100%, 40%);">+ en_reg = &mtk_gpio->pullen[pos].rst;</span><br><span> } else {</span><br><span> /* These pins' pulls can't be set through GPIO controller. */</span><br><span> assert(pin < 22 || pin > 27);</span><br><span>@@ -97,100 +55,21 @@</span><br><span> assert(pin < 100 || pin > 105);</span><br><span> assert(pin < 119 || pin > 124);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- en_reg = &mt8173_gpio->pullen[pos].set;</span><br><span style="color: hsl(120, 100%, 40%);">+ en_reg = &mtk_gpio->pullen[pos].set;</span><br><span> sel_reg = (select == GPIO_PULL_DOWN) ?</span><br><span style="color: hsl(0, 100%, 40%);">- (&mt8173_gpio->pullsel[pos].rst) :</span><br><span style="color: hsl(0, 100%, 40%);">- (&mt8173_gpio->pullsel[pos].set);</span><br><span style="color: hsl(120, 100%, 40%);">+ (&mtk_gpio->pullsel[pos].rst) :</span><br><span style="color: hsl(120, 100%, 40%);">+ (&mtk_gpio->pullsel[pos].set);</span><br><span> write16(sel_reg, 1L << bit);</span><br><span> }</span><br><span> write16(en_reg, 1L << bit);</span><br><span> }</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-int gpio_get(gpio_t pin)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- u32 pos;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 bit;</span><br><span style="color: hsl(0, 100%, 40%);">- u16 *reg;</span><br><span style="color: hsl(0, 100%, 40%);">- s32 data;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- assert(pin <= MAX_8173_GPIO);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- pos_bit_calc(pin, &pos, &bit);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- reg = &mt8173_gpio->din[pos].val;</span><br><span style="color: hsl(0, 100%, 40%);">- data = read32(reg);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- return (data & (1L << bit)) ? 1 : 0;</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void gpio_set(gpio_t pin, int output)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- u32 pos;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 bit;</span><br><span style="color: hsl(0, 100%, 40%);">- u16 *reg;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- assert(pin <= MAX_8173_GPIO);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- pos_bit_calc(pin, &pos, &bit);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- if (output == 0)</span><br><span style="color: hsl(0, 100%, 40%);">- reg = &mt8173_gpio->dout[pos].rst;</span><br><span style="color: hsl(0, 100%, 40%);">- else</span><br><span style="color: hsl(0, 100%, 40%);">- reg = &mt8173_gpio->dout[pos].set;</span><br><span style="color: hsl(0, 100%, 40%);">- write16(reg, 1L << bit);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void gpio_set_mode(gpio_t pin, int mode)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- u32 pos;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 bit;</span><br><span style="color: hsl(0, 100%, 40%);">- u32 mask = (1L << GPIO_MODE_BITS) - 1;</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- assert(pin <= MAX_8173_GPIO);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- pos_bit_calc_for_mode(pin, &pos, &bit);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">- clrsetbits_le32(&mt8173_gpio->mode[pos].val,</span><br><span style="color: hsl(0, 100%, 40%);">- mask << bit, mode << bit);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void gpio_input_pulldown(gpio_t gpio)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- gpio_set_pull(gpio, GPIO_PULL_ENABLE, GPIO_PULL_DOWN);</span><br><span style="color: hsl(0, 100%, 40%);">- gpio_set_dir(gpio, GPIO_DIRECTION_IN);</span><br><span style="color: hsl(0, 100%, 40%);">- gpio_set_mode(gpio, GPIO_MODE);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void gpio_input_pullup(gpio_t gpio)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- gpio_set_pull(gpio, GPIO_PULL_ENABLE, GPIO_PULL_UP);</span><br><span style="color: hsl(0, 100%, 40%);">- gpio_set_dir(gpio, GPIO_DIRECTION_IN);</span><br><span style="color: hsl(0, 100%, 40%);">- gpio_set_mode(gpio, GPIO_MODE);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void gpio_input(gpio_t gpio)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- gpio_set_pull(gpio, GPIO_PULL_DISABLE, GPIO_PULL_DOWN);</span><br><span style="color: hsl(0, 100%, 40%);">- gpio_set_dir(gpio, GPIO_DIRECTION_IN);</span><br><span style="color: hsl(0, 100%, 40%);">- gpio_set_mode(gpio, GPIO_MODE);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span style="color: hsl(0, 100%, 40%);">-void gpio_output(gpio_t gpio, int value)</span><br><span style="color: hsl(0, 100%, 40%);">-{</span><br><span style="color: hsl(0, 100%, 40%);">- gpio_set_pull(gpio, GPIO_PULL_DISABLE, GPIO_PULL_DOWN);</span><br><span style="color: hsl(0, 100%, 40%);">- gpio_set(gpio, value);</span><br><span style="color: hsl(0, 100%, 40%);">- gpio_set_dir(gpio, GPIO_DIRECTION_OUT);</span><br><span style="color: hsl(0, 100%, 40%);">- gpio_set_mode(gpio, GPIO_MODE);</span><br><span style="color: hsl(0, 100%, 40%);">-}</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> int gpio_eint_poll(gpio_t gpio)</span><br><span> {</span><br><span> u32 pos;</span><br><span> u32 bit;</span><br><span> u32 status;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- assert(gpio <= MAX_8173_GPIO);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> pos_bit_calc_for_eint(gpio, &pos, &bit);</span><br><span> </span><br><span> status = (read32(&mt8173_eint->sta.regs[pos]) >> bit) & 0x1;</span><br><span>@@ -206,8 +85,6 @@</span><br><span> u32 pos;</span><br><span> u32 bit, mask;</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">- assert(gpio <= MAX_8173_GPIO);</span><br><span style="color: hsl(0, 100%, 40%);">-</span><br><span> pos_bit_calc_for_eint(gpio, &pos, &bit);</span><br><span> mask = 1 << bit;</span><br><span> </span><br><span>diff --git a/src/soc/mediatek/mt8173/gpio_init.c b/src/soc/mediatek/mt8173/gpio_init.c</span><br><span>index 7f8313a..79ed316 100644</span><br><span>--- a/src/soc/mediatek/mt8173/gpio_init.c</span><br><span>+++ b/src/soc/mediatek/mt8173/gpio_init.c</span><br><span>@@ -49,18 +49,18 @@</span><br><span> /* EXMD control reg */</span><br><span> if (ext_power == GPIO_EINT_1P8V) {</span><br><span> /* exmd_ctrl[9:4] = b`000000, [3:0] = b`1010 */</span><br><span style="color: hsl(0, 100%, 40%);">- write16(&mt8173_gpio->exmd_ctrl[0].rst, 0x3F5);</span><br><span style="color: hsl(0, 100%, 40%);">- write16(&mt8173_gpio->exmd_ctrl[0].set, 0xA);</span><br><span style="color: hsl(120, 100%, 40%);">+ write16(&mtk_gpio->exmd_ctrl[0].rst, 0x3F5);</span><br><span style="color: hsl(120, 100%, 40%);">+ write16(&mtk_gpio->exmd_ctrl[0].set, 0xA);</span><br><span> } else if (ext_power == GPIO_EINT_3P3V) {</span><br><span> /* exmd_ctrl[9:4] = b`001100, [3:0] = b`1010 */</span><br><span style="color: hsl(0, 100%, 40%);">- write16(&mt8173_gpio->exmd_ctrl[0].rst, 0x335);</span><br><span style="color: hsl(0, 100%, 40%);">- write16(&mt8173_gpio->exmd_ctrl[0].set, 0xCA);</span><br><span style="color: hsl(120, 100%, 40%);">+ write16(&mtk_gpio->exmd_ctrl[0].rst, 0x335);</span><br><span style="color: hsl(120, 100%, 40%);">+ write16(&mtk_gpio->exmd_ctrl[0].set, 0xCA);</span><br><span> }</span><br><span> </span><br><span> /* other R/TDSEL */</span><br><span> /* msdc2_ctrl5 , bit[3:0] = b`1010 */</span><br><span style="color: hsl(0, 100%, 40%);">- write16(&mt8173_gpio->msdc2_ctrl5.set, 0xA);</span><br><span style="color: hsl(0, 100%, 40%);">- write16(&mt8173_gpio->msdc2_ctrl5.rst, 0x5);</span><br><span style="color: hsl(120, 100%, 40%);">+ write16(&mtk_gpio->msdc2_ctrl5.set, 0xA);</span><br><span style="color: hsl(120, 100%, 40%);">+ write16(&mtk_gpio->msdc2_ctrl5.rst, 0x5);</span><br><span> }</span><br><span> </span><br><span> void gpio_init(enum external_power ext_power)</span><br><span>diff --git a/src/soc/mediatek/mt8173/include/soc/gpio.h b/src/soc/mediatek/mt8173/include/soc/gpio.h</span><br><span>index 1c05e48..46361ce 100644</span><br><span>--- a/src/soc/mediatek/mt8173/include/soc/gpio.h</span><br><span>+++ b/src/soc/mediatek/mt8173/include/soc/gpio.h</span><br><span>@@ -19,6 +19,12 @@</span><br><span> #include <stdlib.h></span><br><span> #include <soc/addressmap.h></span><br><span> </span><br><span style="color: hsl(120, 100%, 40%);">+enum {</span><br><span style="color: hsl(120, 100%, 40%);">+ MAX_GPIO_REG_BITS = 16,</span><br><span style="color: hsl(120, 100%, 40%);">+ MAX_GPIO_MODE_PER_REG = 5,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_MODE_BITS = 3,</span><br><span style="color: hsl(120, 100%, 40%);">+};</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span> enum pull_enable {</span><br><span> GPIO_PULL_DISABLE = 0,</span><br><span> GPIO_PULL_ENABLE = 1,</span><br><span>@@ -34,15 +40,151 @@</span><br><span> GPIO_EINT_1P8V = 1,</span><br><span> };</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-typedef u32 gpio_t;</span><br><span style="color: hsl(120, 100%, 40%);">+#define GPIO_GET_ID(x) (x)</span><br><span style="color: hsl(120, 100%, 40%);">+</span><br><span style="color: hsl(120, 100%, 40%);">+typedef enum {</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_0 = 0,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_1 = 1,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_2 = 2,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_3 = 3,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_4 = 4,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_5 = 5,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_6 = 6,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_7 = 7,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_8 = 8,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_9 = 9,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_10 = 10,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_11 = 11,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_12 = 12,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_13 = 13,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_14 = 14,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_15 = 15,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_16 = 16,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_17 = 17,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_18 = 18,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_19 = 19,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_20 = 20,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_21 = 21,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_22 = 22,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_23 = 23,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_24 = 24,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_25 = 25,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_26 = 26,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_27 = 27,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_28 = 28,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_29 = 29,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_30 = 30,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_31 = 31,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_32 = 32,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_33 = 33,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_34 = 34,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_35 = 35,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_36 = 36,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_37 = 37,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_38 = 38,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_39 = 39,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_40 = 40,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_41 = 41,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_42 = 42,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_43 = 43,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_44 = 44,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_45 = 45,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_46 = 46,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_47 = 47,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_48 = 48,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_49 = 49,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_50 = 50,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_51 = 51,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_52 = 52,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_53 = 53,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_54 = 54,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_55 = 55,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_56 = 56,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_57 = 57,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_58 = 58,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_59 = 59,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_60 = 60,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_61 = 61,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_62 = 62,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_63 = 63,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_64 = 64,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_65 = 65,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_66 = 66,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_67 = 67,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_68 = 68,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_69 = 69,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_70 = 70,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_71 = 71,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_72 = 72,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_73 = 73,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_74 = 74,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_75 = 75,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_76 = 76,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_77 = 77,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_78 = 78,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_79 = 79,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_80 = 80,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_81 = 81,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_82 = 82,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_83 = 83,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_84 = 84,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_85 = 85,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_86 = 86,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_87 = 87,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_88 = 88,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_89 = 89,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_90 = 90,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_91 = 91,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_92 = 92,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_93 = 93,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_94 = 94,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_95 = 95,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_96 = 96,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_97 = 97,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_98 = 98,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_99 = 99,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_100 = 100,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_101 = 101,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_102 = 102,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_103 = 103,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_104 = 104,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_105 = 105,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_106 = 106,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_107 = 107,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_108 = 108,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_109 = 109,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_110 = 110,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_111 = 111,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_112 = 112,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_113 = 113,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_114 = 114,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_115 = 115,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_116 = 116,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_117 = 117,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_118 = 118,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_119 = 119,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_120 = 120,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_121 = 121,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_122 = 122,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_123 = 123,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_124 = 124,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_125 = 125,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_126 = 126,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_127 = 127,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_128 = 128,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_129 = 129,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_130 = 130,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_131 = 131,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_132 = 132,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_133 = 133,</span><br><span style="color: hsl(120, 100%, 40%);">+ GPIO_PAD_134 = 134,</span><br><span style="color: hsl(120, 100%, 40%);">+} gpio_t;</span><br><span> </span><br><span> struct val_regs {</span><br><span style="color: hsl(0, 100%, 40%);">- uint16_t val;</span><br><span style="color: hsl(0, 100%, 40%);">- uint16_t align1;</span><br><span style="color: hsl(0, 100%, 40%);">- uint16_t set;</span><br><span style="color: hsl(0, 100%, 40%);">- uint16_t align2;</span><br><span style="color: hsl(0, 100%, 40%);">- uint16_t rst;</span><br><span style="color: hsl(0, 100%, 40%);">- uint16_t align3[3];</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t val;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t set;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t rst;</span><br><span style="color: hsl(120, 100%, 40%);">+ uint32_t align;</span><br><span> };</span><br><span> </span><br><span> struct gpio_regs {</span><br><span>@@ -80,7 +222,7 @@</span><br><span> check_member(gpio_regs, msdc2_ctrl5, 0xcb0);</span><br><span> check_member(gpio_regs, hsic_ctrl[3], 0xe50);</span><br><span> </span><br><span style="color: hsl(0, 100%, 40%);">-static struct gpio_regs *const mt8173_gpio = (void *)(GPIO_BASE);</span><br><span style="color: hsl(120, 100%, 40%);">+static struct gpio_regs *const mtk_gpio = (void *)(GPIO_BASE);</span><br><span> </span><br><span> void gpio_set_pull(gpio_t gpio, enum pull_enable enable,</span><br><span> enum pull_select select);</span><br><span>diff --git a/src/soc/mediatek/mt8173/include/soc/pinmux.h b/src/soc/mediatek/mt8173/include/soc/pinmux.h</span><br><span>index 07c53a8..21f6ce8 100644</span><br><span>--- a/src/soc/mediatek/mt8173/include/soc/pinmux.h</span><br><span>+++ b/src/soc/mediatek/mt8173/include/soc/pinmux.h</span><br><span>@@ -26,141 +26,141 @@</span><br><span> PAD_##name##_FUNC_##func7 = 7</span><br><span> </span><br><span> enum {</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(0, EINT0, IRDA_PDN, I2S1_WS, AUD_SPDIF, UTXD0, RES5, RES6, DBG_MON_A_20),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(1, EINT1, IRDA_RXD, I2S1_BCK, SDA5, URXD0, RES5, RES6, DBG_MON_A_21),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(2, EINT2, IRDA_TXD, I2S1_MCK, SCL5, UTXD3, RES5, RES6, DBG_MON_A_22),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(3, EINT3, DSI1_TE, I2S1_DO_1, SDA3, URXD3, RES5, RES6, DBG_MON_A_23),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(4, EINT4, DISP_PWM1, I2S1_DO_2, SCL3, UCTS3, RES5, SFWP_B, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(5, EINT5, PCM1_CLK, I2S2_WS, SPI_CK_3, URTS3, AP_MD32_JTAG_TMS, SFOUT, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(6, EINT6, PCM1_SYNC, I2S2_BCK, SPI_MI_3, RES4, AP_MD32_JTAG_TCK, SFCS0, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(7, EINT7, PCM1_DI, I2S2_DI_1, SPI_MO_3, RES4, AP_MD32_JTAG_TDI, SFHOLD, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(8, EINT8, PCM1_DO, I2S2_DI_2, SPI_CS_3, AUD_SPDIF, AP_MD32_JTAG_TDO, SFIN, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(9, EINT9, USB_DRVVBUS_P0, I2S2_MCK, RES3, USB_DRVVBUS_P1, AP_MD32_JTAG_TRST, SFCK, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(10, EINT10, CLKM0, DSI1_TE, DISP_PWM1, PWM4, IRDA_RXD, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(11, EINT11, CLKM1, I2S3_WS, USB_DRVVBUS_P0, PWM5, IRDA_TXD, USB_DRVVBUS_P1, DBG_MON_B_30),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(12, EINT12, CLKM2, I2S3_BCK, SRCLKENA0, RES4, I2S2_WS, RES6, DBG_MON_B_32),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(13, EINT13, CLKM3, I2S3_MCK, SRCLKENA0, RES4, I2S2_BCK, RES6, DBG_MON_A_32),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(14, EINT14, CMDAT0, CMCSD0, RES3, CLKM2, RES5, RES6, DBG_MON_B_6),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(15, EINT15, CMDAT1, CMCSD1, CMFLASH, CLKM3, RES5, RES6, DBG_MON_B_29),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(16, IDDIG, IDDIG, CMFLASH, RES3, PWM5, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(17, WATCHDOG, WATCHDOG_AO, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(18, CEC, CEC, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(19, HDMISCK, HDMISCK, HDCP_SCL, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(20, HDMISD, HDMISD, HDCP_SDA, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(21, HTPLG, HTPLG, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(22, MSDC3_DAT0, MSDC3_DAT0, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(23, MSDC3_DAT1, MSDC3_DAT1, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(24, MSDC3_DAT2, MSDC3_DAT2, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(25, MSDC3_DAT3, MSDC3_DAT3, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(26, MSDC3_CLK, MSDC3_CLK, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(27, MSDC3_CMD, MSDC3_CMD, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(28, MSDC3_DSL, MSDC3_DSL, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(29, UCTS2, UCTS2, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(30, URTS2, URTS2, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(31, URXD2, URXD2, UTXD2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(32, UTXD2, UTXD2, URXD2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(33, DAICLK, MRG_CLK, PCM0_CLK, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(34, DAIPCMIN, MRG_DI, PCM0_DI, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(35, DAIPCMOUT, MRG_DO, PCM0_DO, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(36, DAISYNC, MRG_SYNC, PCM0_SYNC, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(37, EINT16, USB_DRVVBUS_P0, USB_DRVVBUS_P1, PWM0, PWM1, PWM2, CLKM0, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(38, CONN_RST, USB_DRVVBUS_P0, USB_DRVVBUS_P1, RES3, RES4, RES5, CLKM1, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(39, CM2MCLK, CM2MCLK, CMCSD0, RES3, RES4, RES5, RES6, DBG_MON_A_17),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(40, CMPCLK, CMPCLK, CMCSK, CMCSD2, RES4, RES5, RES6, DBG_MON_A_18),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(41, CMMCLK, CMMCLK, RES2, RES3, RES4, RES5, RES6, DBG_MON_A_19),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(42, DSI_TE, DSI_TE, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(43, SDA2, SDA2, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(44, SCL2, SCL2, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(45, SDA0, SDA0, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(46, SCL0, SCL0, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(47, RDN0_A, CMDAT2, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(48, RDP0_A, CMDAT3, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(49, RDN1_A, CMDAT4, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(50, RDP1_A, CMDAT5, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(51, RCN_A, CMDAT6, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(52, RCP_A, CMDAT7, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(53, RDN2_A, CMDAT8, CMCSD3, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(54, RDP2_A, CMDAT9, CMCSD2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(55, RDN3_A, CMHSYNC, CMCSD1, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(56, RDP3_A, CMVSYNC, CMCSD0, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(57, MSDC0_DAT0, MSDC0_DAT0, I2S1_WS, RES3, RES4, RES5, RES6, DBG_MON_B_7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(58, MSDC0_DAT1, MSDC0_DAT1, I2S1_BCK, RES3, RES4, RES5, RES6, DBG_MON_B_8),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(59, MSDC0_DAT2, MSDC0_DAT2, I2S1_MCK, RES3, RES4, RES5, RES6, DBG_MON_B_9),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(60, MSDC0_DAT3, MSDC0_DAT3, I2S1_DO_1, RES3, RES4, RES5, RES6, DBG_MON_B_10),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(61, MSDC0_DAT4, MSDC0_DAT4, I2S1_DO_2, RES3, RES4, RES5, RES6, DBG_MON_B_11),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(62, MSDC0_DAT5, MSDC0_DAT5, I2S2_WS, RES3, RES4, RES5, RES6, DBG_MON_B_12),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(63, MSDC0_DAT6, MSDC0_DAT6, I2S2_BCK, RES3, RES4, RES5, RES6, DBG_MON_B_13),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(64, MSDC0_DAT7, MSDC0_DAT7, I2S2_DI_1, RES3, RES4, RES5, RES6, DBG_MON_B_14),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(65, MSDC0_CLK, MSDC0_CLK, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_16),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(66, MSDC0_CMD, MSDC0_CMD, I2S2_DI_2, RES3, RES4, RES5, RES6, DBG_MON_B_15),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(67, MSDC0_DSL, MSDC0_DSL, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_17),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(68, MSDC0_RST, MSDC0_RSTB, I2S2_MCK, RES3, RES4, RES5, RES6, DBG_MON_B_18),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(69, SPI_CK, SPI_CK_0, I2S3_DO_1, PWM0, PWM5, I2S2_MCK, RES6, DBG_MON_B_19),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(70, SPI_MI, SPI_MI_0, I2S3_DO_2, PWM1, SPI_MO_0, I2S2_DI_1, DSI1_TE, DBG_MON_B_20),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(71, SPI_MO, SPI_MO_0, I2S3_DO_3, PWM2, SPI_MI_0, I2S2_DI_2, RES6, DBG_MON_B_21),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(72, SPI_CS, SPI_CS_0, I2S3_DO_4, PWM3, PWM6, DISP_PWM1, RES6, DBG_MON_B_22),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(73, MSDC1_DAT0, MSDC1_DAT0, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_24),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(74, MSDC1_DAT1, MSDC1_DAT1, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_25),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(75, MSDC1_DAT2, MSDC1_DAT2, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_26),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(76, MSDC1_DAT3, MSDC1_DAT3, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_27),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(77, MSDC1_CLK, MSDC1_CLK, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_28),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(78, MSDC1_CMD, MSDC1_CMD, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_23),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(79, PWRAP_SPI0_MI, PWRAP_SPIMI, PWRAP_SPIMO, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(80, PWRAP_SPI0_MO, PWRAP_SPIMO, PWRAP_SPIMI, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(81, PWRAP_SPI0_CK, PWRAP_SPICK, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(82, PWRAP_SPI0_CSN, PWRAP_SPICS, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(83, AUD_CLK_MOSI, AUD_CLK_MOSI, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(84, AUD_DAT_MISO, AUD_DAT_MISO, AUD_DAT_MOSI, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(85, AUD_DAT_MOSI, AUD_DAT_MOSI, AUD_DAT_MISO, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(86, RTC32K_CK, RTC32K_CK, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(87, DISP_PWM0, DISP_PWM0, DISP_PWM1, RES3, RES4, RES5, RES6, DBG_MON_B_31),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(88, SRCLKENAI, SRCLKENAI, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(89, SRCLKENAI2, SRCLKENAI2, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(90, SRCLKENA0, SRCLKENA0, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(91, SRCLKENA1, SRCLKENA1, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(92, PCM_CLK, PCM1_CLK, I2S0_BCK, RES3, RES4, RES5, RES6, DBG_MON_A_24),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(93, PCM_SYNC, PCM1_SYNC, I2S0_WS, RES3, RES4, RES5, RES6, DBG_MON_A_25),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(94, PCM_RX, PCM1_DI, I2S0_DI, RES3, RES4, RES5, RES6, DBG_MON_A_26),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(95, PCM_TX, PCM1_DO, I2S0_DO, RES3, RES4, RES5, RES6, DBG_MON_A_27),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(96, URXD1, URXD1, UTXD1, RES3, RES4, RES5, RES6, DBG_MON_A_28),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(97, UTXD1, UTXD1, URXD1, RES3, RES4, RES5, RES6, DBG_MON_A_29),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(98, URTS1, URTS1, UCTS1, RES3, RES4, RES5, RES6, DBG_MON_A_30),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(99, UCTS1, UCTS1, URTS1, RES3, RES4, RES5, RES6, DBG_MON_A_31),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(100, MSDC2_DAT0, MSDC2_DAT0, RES2, USB_DRVVBUS_P0, SDA5, USB_DRVVBUS_P1, RES6, DBG_MON_B_0),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(101, MSDC2_DAT1, MSDC2_DAT1, RES2, AUD_SPDIF, SCL5, RES5, RES6, DBG_MON_B_1),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(102, MSDC2_DAT2, MSDC2_DAT2, RES2, UTXD0, RES4, PWM0, SPI_CK_1, DBG_MON_B_2),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(103, MSDC2_DAT3, MSDC2_DAT3, RES2, URXD0, RES4, PWM1, SPI_MI_1, DBG_MON_B_3),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(104, MSDC2_CLK, MSDC2_CLK, RES2, UTXD3, SDA3, PWM2, SPI_MO_1, DBG_MON_B_4),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(105, MSDC2_CMD, MSDC2_CMD, RES2, URXD3, SCL3, PWM3, SPI_CS_1, DBG_MON_B_5),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(106, SDA3, SDA3, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(107, SCL3, SCL3, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(108, JTMS, JTMS, MFG_JTAG_TMS, RES3, RES4, AP_MD32_JTAG_TMS, DFD_TMS, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(109, JTCK, JTCK, MFG_JTAG_TCK, RES3, RES4, AP_MD32_JTAG_TCK, DFD_TCK, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(110, JTDI, JTDI, MFG_JTAG_TDI, RES3, RES4, AP_MD32_JTAG_TDI, DFD_TDI, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(111, JTDO, JTDO, MFG_JTAG_TDO, RES3, RES4, AP_MD32_JTAG_TDO, DFD_TDO, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(112, JTRST_B, JTRST_B, MFG_JTAG_TRSTN, RES3, RES4, AP_MD32_JTAG_TRST, DFD_NTRST, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(113, URXD0, URXD0, UTXD0, RES3, RES4, RES5, I2S2_WS, DBG_MON_A_0),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(114, UTXD0, UTXD0, URXD0, RES3, RES4, RES5, I2S2_BCK, DBG_MON_A_1),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(115, URTS0, URTS0, UCTS0, RES3, RES4, RES5, I2S2_MCK, DBG_MON_A_2),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(116, UCTS0, UCTS0, URTS0, RES3, RES4, RES5, I2S2_DI_1, DBG_MON_A_3),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(117, URXD3, URXD3, UTXD3, RES3, RES4, RES5, RES6, DBG_MON_A_9),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(118, UTXD3, UTXD3, URXD3, RES3, RES4, RES5, RES6, DBG_MON_A_10),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(119, KPROW0, KROW0, RES2, RES3, RES4, RES5, RES6, DBG_MON_A_11),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(120, KPROW1, KROW1, RES2, PWM6, RES4, RES5, RES6, DBG_MON_A_12),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(121, KPROW2, KROW2, IRDA_PDN, USB_DRVVBUS_P0, PWM4, USB_DRVVBUS_P1, RES6, DBG_MON_A_13),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(122, KPCOL0, KCOL0, RES2, RES3, RES4, RES5, RES6, DBG_MON_A_14),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(123, KPCOL1, KCOL1, IRDA_RXD, PWM5, RES4, RES5, RES6, DBG_MON_A_15),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(124, KPCOL2, KCOL2, IRDA_TXD, USB_DRVVBUS_P0, PWM3, USB_DRVVBUS_P1, RES6, DBG_MON_A_16),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(125, SDA1, SDA1, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(126, SCL1, SCL1, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(127, LCM_RST, LCM_RST, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(128, I2S0_LRCK, I2S0_WS, I2S1_WS, I2S2_WS, RES4, SPI_CK_2, RES6, DBG_MON_A_4),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(129, I2S0_BCK, I2S0_BCK, I2S1_BCK, I2S2_BCK, RES4, SPI_MI_2, RES6, DBG_MON_A_5),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(130, I2S0_MCK, I2S0_MCK, I2S1_MCK, I2S2_MCK, RES4, SPI_MO_2, RES6, DBG_MON_A_6),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(131, I2S0_DATA0, I2S0_DO, I2S1_DO_1, I2S2_DI_1, RES4, SPI_CS_2, RES6, DBG_MON_A_7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(132, I2S0_DATA1, I2S0_DI, I2S1_DO_2, I2S2_DI_2, RES4, RES5, RES6, DBG_MON_A_8),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(133, SDA4, SDA4, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(0, 100%, 40%);">- PINMUX_CONSTANTS(134, SCL4, SCL4, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_0, EINT0, IRDA_PDN, I2S1_WS, AUD_SPDIF, UTXD0, RES5, RES6, DBG_MON_A_20),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_1, EINT1, IRDA_RXD, I2S1_BCK, SDA5, URXD0, RES5, RES6, DBG_MON_A_21),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_2, EINT2, IRDA_TXD, I2S1_MCK, SCL5, UTXD3, RES5, RES6, DBG_MON_A_22),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_3, EINT3, DSI1_TE, I2S1_DO_1, SDA3, URXD3, RES5, RES6, DBG_MON_A_23),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_4, EINT4, DISP_PWM1, I2S1_DO_2, SCL3, UCTS3, RES5, SFWP_B, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_5, EINT5, PCM1_CLK, I2S2_WS, SPI_CK_3, URTS3, AP_MD32_JTAG_TMS, SFOUT, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_6, EINT6, PCM1_SYNC, I2S2_BCK, SPI_MI_3, RES4, AP_MD32_JTAG_TCK, SFCS0, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_7, EINT7, PCM1_DI, I2S2_DI_1, SPI_MO_3, RES4, AP_MD32_JTAG_TDI, SFHOLD, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_8, EINT8, PCM1_DO, I2S2_DI_2, SPI_CS_3, AUD_SPDIF, AP_MD32_JTAG_TDO, SFIN, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_9, EINT9, USB_DRVVBUS_P0, I2S2_MCK, RES3, USB_DRVVBUS_P1, AP_MD32_JTAG_TRST, SFCK, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_10, EINT10, CLKM0, DSI1_TE, DISP_PWM1, PWM4, IRDA_RXD, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_11, EINT11, CLKM1, I2S3_WS, USB_DRVVBUS_P0, PWM5, IRDA_TXD, USB_DRVVBUS_P1, DBG_MON_B_30),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_12, EINT12, CLKM2, I2S3_BCK, SRCLKENA0, RES4, I2S2_WS, RES6, DBG_MON_B_32),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_13, EINT13, CLKM3, I2S3_MCK, SRCLKENA0, RES4, I2S2_BCK, RES6, DBG_MON_A_32),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_14, EINT14, CMDAT0, CMCSD0, RES3, CLKM2, RES5, RES6, DBG_MON_B_6),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_15, EINT15, CMDAT1, CMCSD1, CMFLASH, CLKM3, RES5, RES6, DBG_MON_B_29),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_16, IDDIG, IDDIG, CMFLASH, RES3, PWM5, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_17, WATCHDOG, WATCHDOG_AO, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_18, CEC, CEC, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_19, HDMISCK, HDMISCK, HDCP_SCL, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_20, HDMISD, HDMISD, HDCP_SDA, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_21, HTPLG, HTPLG, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_22, MSDC3_DAT0, MSDC3_DAT0, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_23, MSDC3_DAT1, MSDC3_DAT1, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_24, MSDC3_DAT2, MSDC3_DAT2, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_25, MSDC3_DAT3, MSDC3_DAT3, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_26, MSDC3_CLK, MSDC3_CLK, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_27, MSDC3_CMD, MSDC3_CMD, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_28, MSDC3_DSL, MSDC3_DSL, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_29, UCTS2, UCTS2, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_30, URTS2, URTS2, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_31, URXD2, URXD2, UTXD2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_32, UTXD2, UTXD2, URXD2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_33, DAICLK, MRG_CLK, PCM0_CLK, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_34, DAIPCMIN, MRG_DI, PCM0_DI, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_35, DAIPCMOUT, MRG_DO, PCM0_DO, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_36, DAISYNC, MRG_SYNC, PCM0_SYNC, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_37, EINT16, USB_DRVVBUS_P0, USB_DRVVBUS_P1, PWM0, PWM1, PWM2, CLKM0, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_38, CONN_RST, USB_DRVVBUS_P0, USB_DRVVBUS_P1, RES3, RES4, RES5, CLKM1, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_39, CM2MCLK, CM2MCLK, CMCSD0, RES3, RES4, RES5, RES6, DBG_MON_A_17),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_40, CMPCLK, CMPCLK, CMCSK, CMCSD2, RES4, RES5, RES6, DBG_MON_A_18),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_41, CMMCLK, CMMCLK, RES2, RES3, RES4, RES5, RES6, DBG_MON_A_19),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_42, DSI_TE, DSI_TE, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_43, SDA2, SDA2, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_44, SCL2, SCL2, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_45, SDA0, SDA0, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_46, SCL0, SCL0, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_47, RDN0_A, CMDAT2, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_48, RDP0_A, CMDAT3, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_49, RDN1_A, CMDAT4, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_50, RDP1_A, CMDAT5, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_51, RCN_A, CMDAT6, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_52, RCP_A, CMDAT7, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_53, RDN2_A, CMDAT8, CMCSD3, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_54, RDP2_A, CMDAT9, CMCSD2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_55, RDN3_A, CMHSYNC, CMCSD1, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_56, RDP3_A, CMVSYNC, CMCSD0, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_57, MSDC0_DAT0, MSDC0_DAT0, I2S1_WS, RES3, RES4, RES5, RES6, DBG_MON_B_7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_58, MSDC0_DAT1, MSDC0_DAT1, I2S1_BCK, RES3, RES4, RES5, RES6, DBG_MON_B_8),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_59, MSDC0_DAT2, MSDC0_DAT2, I2S1_MCK, RES3, RES4, RES5, RES6, DBG_MON_B_9),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_60, MSDC0_DAT3, MSDC0_DAT3, I2S1_DO_1, RES3, RES4, RES5, RES6, DBG_MON_B_10),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_61, MSDC0_DAT4, MSDC0_DAT4, I2S1_DO_2, RES3, RES4, RES5, RES6, DBG_MON_B_11),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_62, MSDC0_DAT5, MSDC0_DAT5, I2S2_WS, RES3, RES4, RES5, RES6, DBG_MON_B_12),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_63, MSDC0_DAT6, MSDC0_DAT6, I2S2_BCK, RES3, RES4, RES5, RES6, DBG_MON_B_13),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_64, MSDC0_DAT7, MSDC0_DAT7, I2S2_DI_1, RES3, RES4, RES5, RES6, DBG_MON_B_14),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_65, MSDC0_CLK, MSDC0_CLK, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_16),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_66, MSDC0_CMD, MSDC0_CMD, I2S2_DI_2, RES3, RES4, RES5, RES6, DBG_MON_B_15),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_67, MSDC0_DSL, MSDC0_DSL, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_17),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_68, MSDC0_RST, MSDC0_RSTB, I2S2_MCK, RES3, RES4, RES5, RES6, DBG_MON_B_18),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_69, SPI_CK, SPI_CK_0, I2S3_DO_1, PWM0, PWM5, I2S2_MCK, RES6, DBG_MON_B_19),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_70, SPI_MI, SPI_MI_0, I2S3_DO_2, PWM1, SPI_MO_0, I2S2_DI_1, DSI1_TE, DBG_MON_B_20),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_71, SPI_MO, SPI_MO_0, I2S3_DO_3, PWM2, SPI_MI_0, I2S2_DI_2, RES6, DBG_MON_B_21),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_72, SPI_CS, SPI_CS_0, I2S3_DO_4, PWM3, PWM6, DISP_PWM1, RES6, DBG_MON_B_22),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_73, MSDC1_DAT0, MSDC1_DAT0, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_24),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_74, MSDC1_DAT1, MSDC1_DAT1, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_25),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_75, MSDC1_DAT2, MSDC1_DAT2, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_26),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_76, MSDC1_DAT3, MSDC1_DAT3, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_27),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_77, MSDC1_CLK, MSDC1_CLK, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_28),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_78, MSDC1_CMD, MSDC1_CMD, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_23),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_79, PWRAP_SPI0_MI, PWRAP_SPIMI, PWRAP_SPIMO, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_80, PWRAP_SPI0_MO, PWRAP_SPIMO, PWRAP_SPIMI, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_81, PWRAP_SPI0_CK, PWRAP_SPICK, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_82, PWRAP_SPI0_CSN, PWRAP_SPICS, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_83, AUD_CLK_MOSI, AUD_CLK_MOSI, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_84, AUD_DAT_MISO, AUD_DAT_MISO, AUD_DAT_MOSI, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_85, AUD_DAT_MOSI, AUD_DAT_MOSI, AUD_DAT_MISO, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_86, RTC32K_CK, RTC32K_CK, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_87, DISP_PWM0, DISP_PWM0, DISP_PWM1, RES3, RES4, RES5, RES6, DBG_MON_B_31),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_88, SRCLKENAI, SRCLKENAI, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_89, SRCLKENAI2, SRCLKENAI2, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_90, SRCLKENA0, SRCLKENA0, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_91, SRCLKENA1, SRCLKENA1, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_92, PCM_CLK, PCM1_CLK, I2S0_BCK, RES3, RES4, RES5, RES6, DBG_MON_A_24),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_93, PCM_SYNC, PCM1_SYNC, I2S0_WS, RES3, RES4, RES5, RES6, DBG_MON_A_25),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_94, PCM_RX, PCM1_DI, I2S0_DI, RES3, RES4, RES5, RES6, DBG_MON_A_26),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_95, PCM_TX, PCM1_DO, I2S0_DO, RES3, RES4, RES5, RES6, DBG_MON_A_27),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_96, URXD1, URXD1, UTXD1, RES3, RES4, RES5, RES6, DBG_MON_A_28),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_97, UTXD1, UTXD1, URXD1, RES3, RES4, RES5, RES6, DBG_MON_A_29),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_98, URTS1, URTS1, UCTS1, RES3, RES4, RES5, RES6, DBG_MON_A_30),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_99, UCTS1, UCTS1, URTS1, RES3, RES4, RES5, RES6, DBG_MON_A_31),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_100, MSDC2_DAT0, MSDC2_DAT0, RES2, USB_DRVVBUS_P0, SDA5, USB_DRVVBUS_P1, RES6, DBG_MON_B_0),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_101, MSDC2_DAT1, MSDC2_DAT1, RES2, AUD_SPDIF, SCL5, RES5, RES6, DBG_MON_B_1),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_102, MSDC2_DAT2, MSDC2_DAT2, RES2, UTXD0, RES4, PWM0, SPI_CK_1, DBG_MON_B_2),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_103, MSDC2_DAT3, MSDC2_DAT3, RES2, URXD0, RES4, PWM1, SPI_MI_1, DBG_MON_B_3),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_104, MSDC2_CLK, MSDC2_CLK, RES2, UTXD3, SDA3, PWM2, SPI_MO_1, DBG_MON_B_4),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_105, MSDC2_CMD, MSDC2_CMD, RES2, URXD3, SCL3, PWM3, SPI_CS_1, DBG_MON_B_5),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_106, SDA3, SDA3, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_107, SCL3, SCL3, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_108, JTMS, JTMS, MFG_JTAG_TMS, RES3, RES4, AP_MD32_JTAG_TMS, DFD_TMS, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_109, JTCK, JTCK, MFG_JTAG_TCK, RES3, RES4, AP_MD32_JTAG_TCK, DFD_TCK, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_110, JTDI, JTDI, MFG_JTAG_TDI, RES3, RES4, AP_MD32_JTAG_TDI, DFD_TDI, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_111, JTDO, JTDO, MFG_JTAG_TDO, RES3, RES4, AP_MD32_JTAG_TDO, DFD_TDO, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_112, JTRST_B, JTRST_B, MFG_JTAG_TRSTN, RES3, RES4, AP_MD32_JTAG_TRST, DFD_NTRST, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_113, URXD0, URXD0, UTXD0, RES3, RES4, RES5, I2S2_WS, DBG_MON_A_0),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_114, UTXD0, UTXD0, URXD0, RES3, RES4, RES5, I2S2_BCK, DBG_MON_A_1),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_115, URTS0, URTS0, UCTS0, RES3, RES4, RES5, I2S2_MCK, DBG_MON_A_2),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_116, UCTS0, UCTS0, URTS0, RES3, RES4, RES5, I2S2_DI_1, DBG_MON_A_3),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_117, URXD3, URXD3, UTXD3, RES3, RES4, RES5, RES6, DBG_MON_A_9),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_118, UTXD3, UTXD3, URXD3, RES3, RES4, RES5, RES6, DBG_MON_A_10),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_119, KPROW0, KROW0, RES2, RES3, RES4, RES5, RES6, DBG_MON_A_11),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_120, KPROW1, KROW1, RES2, PWM6, RES4, RES5, RES6, DBG_MON_A_12),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_121, KPROW2, KROW2, IRDA_PDN, USB_DRVVBUS_P0, PWM4, USB_DRVVBUS_P1, RES6, DBG_MON_A_13),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_122, KPCOL0, KCOL0, RES2, RES3, RES4, RES5, RES6, DBG_MON_A_14),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_123, KPCOL1, KCOL1, IRDA_RXD, PWM5, RES4, RES5, RES6, DBG_MON_A_15),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_124, KPCOL2, KCOL2, IRDA_TXD, USB_DRVVBUS_P0, PWM3, USB_DRVVBUS_P1, RES6, DBG_MON_A_16),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_125, SDA1, SDA1, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_126, SCL1, SCL1, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_127, LCM_RST, LCM_RST, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_128, I2S0_LRCK, I2S0_WS, I2S1_WS, I2S2_WS, RES4, SPI_CK_2, RES6, DBG_MON_A_4),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_129, I2S0_BCK, I2S0_BCK, I2S1_BCK, I2S2_BCK, RES4, SPI_MI_2, RES6, DBG_MON_A_5),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_130, I2S0_MCK, I2S0_MCK, I2S1_MCK, I2S2_MCK, RES4, SPI_MO_2, RES6, DBG_MON_A_6),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_131, I2S0_DATA0, I2S0_DO, I2S1_DO_1, I2S2_DI_1, RES4, SPI_CS_2, RES6, DBG_MON_A_7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_132, I2S0_DATA1, I2S0_DI, I2S1_DO_2, I2S2_DI_2, RES4, RES5, RES6, DBG_MON_A_8),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_133, SDA4, SDA4, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span style="color: hsl(120, 100%, 40%);">+ PINMUX_CONSTANTS(GPIO_PAD_134, SCL4, SCL4, RES2, RES3, RES4, RES5, RES6, RES7),</span><br><span> };</span><br><span> </span><br><span> #endif /* SOC_MEDIATEK_MT8173_PINMUX_H */</span><br><span></span><br></pre><p>To view, visit <a href="https://review.coreboot.org/27416">change 27416</a>. To unsubscribe, or for help writing mail filters, visit <a href="https://review.coreboot.org/settings">settings</a>.</p><div itemscope itemtype="http://schema.org/EmailMessage"><div itemscope itemprop="action" itemtype="http://schema.org/ViewAction"><link itemprop="url" href="https://review.coreboot.org/27416"/><meta itemprop="name" content="View Change"/></div></div>
<div style="display:none"> Gerrit-Project: coreboot </div>
<div style="display:none"> Gerrit-Branch: master </div>
<div style="display:none"> Gerrit-MessageType: newchange </div>
<div style="display:none"> Gerrit-Change-Id: Icdd1f2a1dd1bd64a7218bf9c63bd4a0af1acbcc0 </div>
<div style="display:none"> Gerrit-Change-Number: 27416 </div>
<div style="display:none"> Gerrit-PatchSet: 1 </div>
<div style="display:none"> Gerrit-Owner: Tristan Hsieh <tristan.shieh@mediatek.com> </div>